OpenCores
URL https://opencores.org/ocsvn/ha1588/ha1588/trunk

Subversion Repositories ha1588

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  • This comparison shows the changes necessary to convert path 
    /
    from Rev 25 to Rev 26
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  •

Rev 25 → Rev 26

/ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.c
4,9 → 4,9
#include "../dpiheader.h"
int ptp_drv_bfm_c(double fw_delay)
{
int cpu_addr_i;
int cpu_data_i;
int cpu_data_o;
unsigned int cpu_addr_i;
unsigned int cpu_data_i;
unsigned int cpu_data_o;
 
// LOAD RTC PERIOD AND ACC_MODULO
cpu_addr_i = 0x00000020;
34,6 → 34,30
cpu_addr_i = 0x00000000;
cpu_data_i = 0xA10;
cpu_wr(cpu_addr_i, cpu_data_i);
// READ RTC SEC AND NS
cpu_addr_i = 0x00000000;
cpu_data_i = 0x0;
cpu_wr(cpu_addr_i, cpu_data_i);
cpu_addr_i = 0x00000000;
cpu_data_i = 0x1;
cpu_wr(cpu_addr_i, cpu_data_i);
do {
cpu_addr_i = 0x00000000;
cpu_rd(cpu_addr_i, &cpu_data_o);
//printf("%08x\n", (cpu_data_o & 0x1));
} while ((cpu_data_o & 0x1) == 0x0);
cpu_addr_i = 0X00000040;
cpu_rd(cpu_addr_i, &cpu_data_o);
printf("\ntime: \n%08x\n", cpu_data_o);
cpu_addr_i = 0X00000044;
cpu_rd(cpu_addr_i, &cpu_data_o);
printf("%08x\n", cpu_data_o);
cpu_addr_i = 0X00000048;
cpu_rd(cpu_addr_i, &cpu_data_o);
printf("%08x\n", cpu_data_o);
cpu_addr_i = 0X0000004C;
cpu_rd(cpu_addr_i, &cpu_data_o);
printf("%08x\n", cpu_data_o);
// LOAD RTC SEC AND NS
cpu_addr_i = 0x00000010;
cpu_data_i = 0x0;
83,32 → 107,16
} while ((cpu_data_o & 0x1) == 0x0);
cpu_addr_i = 0X00000040;
cpu_rd(cpu_addr_i, &cpu_data_o);
printf("\ntime: \n%08x\n", cpu_data_o);
cpu_addr_i = 0X00000044;
cpu_rd(cpu_addr_i, &cpu_data_o);
printf("%08x\n", cpu_data_o);
cpu_addr_i = 0X00000048;
cpu_rd(cpu_addr_i, &cpu_data_o);
printf("%08x\n", cpu_data_o);
cpu_addr_i = 0X0000004C;
cpu_rd(cpu_addr_i, &cpu_data_o);
// READ RTC SEC AND NS
cpu_addr_i = 0x00000000;
cpu_data_i = 0x0;
cpu_wr(cpu_addr_i, cpu_data_i);
cpu_addr_i = 0x00000000;
cpu_data_i = 0x1;
cpu_wr(cpu_addr_i, cpu_data_i);
do {
cpu_addr_i = 0x00000000;
cpu_rd(cpu_addr_i, &cpu_data_o);
//printf("%08x\n", (cpu_data_o & 0x1));
} while ((cpu_data_o & 0x1) == 0x0);
cpu_addr_i = 0X00000040;
cpu_rd(cpu_addr_i, &cpu_data_o);
cpu_addr_i = 0X00000044;
cpu_rd(cpu_addr_i, &cpu_data_o);
cpu_addr_i = 0X00000048;
cpu_rd(cpu_addr_i, &cpu_data_o);
cpu_addr_i = 0X0000004C;
cpu_rd(cpu_addr_i, &cpu_data_o);
printf("%08x\n", cpu_data_o);
 
int i;
// POLL TSU RX STATUS
120,7 → 128,7
//printf("%08x\n", rx_queue_num);
} while (!(rx_queue_num > 0x2));
// READ TSU RX FIFO
for (i=rx_queue_num; i>=0; i--) {
for (i=rx_queue_num; i>0; i--) {
cpu_addr_i = 0x00000000;
cpu_data_i = 0x0;
cpu_wr(cpu_addr_i, cpu_data_i);
129,8 → 137,10
cpu_wr(cpu_addr_i, cpu_data_i);
cpu_addr_i = 0x00000050;
cpu_rd(cpu_addr_i, &cpu_data_o);
printf("\nRx stamp: \n%08x\n", cpu_data_o);
cpu_addr_i = 0x00000054;
cpu_rd(cpu_addr_i, &cpu_data_o);
printf("%08x\n", cpu_data_o);
}
// POLL TSU TX STATUS
int tx_queue_num;
141,7 → 151,7
//printf("%08x\n", tx_queue_num);
} while (!(tx_queue_num > 0x2));
// READ TSU TX FIFO
for (i=tx_queue_num; i>=0; i--) {
for (i=tx_queue_num; i>0; i--) {
cpu_addr_i = 0x00000000;
cpu_data_i = 0x0;
cpu_wr(cpu_addr_i, cpu_data_i);
150,8 → 160,10
cpu_wr(cpu_addr_i, cpu_data_i);
cpu_addr_i = 0x00000058;
cpu_rd(cpu_addr_i, &cpu_data_o);
printf("\nTx stamp: \n%08x\n", cpu_data_o);
cpu_addr_i = 0x0000005C;
cpu_rd(cpu_addr_i, &cpu_data_o);
printf("%08x\n", cpu_data_o);
}
 
// READ BACK ALL REGISTERS

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