OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /
    from Rev 25 to Rev 26
    ↔ Reverse comparison
  •

Rev 25 → Rev 26

/trunk/or1ksim/configure
782,7 → 782,7
 
PACKAGE=or1ksim
 
VERSION=1.2
VERSION=1.3
 
if test "`cd $srcdir && pwd`" != "`pwd`" && test -f $srcdir/config.status; then
{ echo "configure: error: source directory already configured; run "make distclean" there first" 1>&2; exit 1; }
1913,7 → 1913,8
esac
 
 
INCLUDES="-I\${top_srcdir}/cpu/common -I\${top_srcdir}/cpu/$CPU_ARCH -I\${top_srcdir}/cache -I\${top_srcdir}/mmu \
INCLUDES="-I\${top_srcdir}/cpu/common -I\${top_srcdir}/cpu/or1k \
-I\${top_srcdir}/cpu/$CPU_ARCH -I\${top_srcdir}/cache -I\${top_srcdir}/mmu \
-I\${top_srcdir}/bpb"
 
 
2021,7 → 2022,7
 
trap 'rm -fr `echo "Makefile bpb/Makefile cache/Makefile cpu/Makefile
cpu/common/Makefile cpu/or32/Makefile cpu/or16/Makefile
cpu/dlx/Makefile
cpu/or1k/Makefile cpu/dlx/Makefile
support/Makefile mmu/Makefile config.h" | sed "s/:[^ ]*//g"` conftest*; exit 1' 1 2 15
EOF
cat >> $CONFIG_STATUS <<EOF
2137,7 → 2138,7
 
CONFIG_FILES=\${CONFIG_FILES-"Makefile bpb/Makefile cache/Makefile cpu/Makefile
cpu/common/Makefile cpu/or32/Makefile cpu/or16/Makefile
cpu/dlx/Makefile
cpu/or1k/Makefile cpu/dlx/Makefile
support/Makefile mmu/Makefile"}
EOF
cat >> $CONFIG_STATUS <<\EOF
/trunk/or1ksim/configure.in
7,7 → 7,7
 
AC_INIT(cpu/or32/execute.c)
AC_CANONICAL_SYSTEM
AM_INIT_AUTOMAKE(or1ksim, 1.2)
AM_INIT_AUTOMAKE(or1ksim, 1.3)
AM_CONFIG_HEADER(config.h)
 
AC_REVISION([for or1ksim-1.2, version 2.14, from autoconf version] AC_ACVERSION)
93,7 → 93,8
AC_SUBST(CPU_ARCH)
 
dnl yuck
INCLUDES="-I\${top_srcdir}/cpu/common -I\${top_srcdir}/cpu/$CPU_ARCH -I\${top_srcdir}/cache -I\${top_srcdir}/mmu \
INCLUDES="-I\${top_srcdir}/cpu/common -I\${top_srcdir}/cpu/or1k \
-I\${top_srcdir}/cpu/$CPU_ARCH -I\${top_srcdir}/cache -I\${top_srcdir}/mmu \
-I\${top_srcdir}/bpb"
AC_SUBST(INCLUDES)
 
100,7 → 101,7
 
AC_OUTPUT([Makefile bpb/Makefile cache/Makefile cpu/Makefile
cpu/common/Makefile cpu/or32/Makefile cpu/or16/Makefile
cpu/dlx/Makefile
cpu/or1k/Makefile cpu/dlx/Makefile
support/Makefile mmu/Makefile],
[
# Makefile uses this timestamp file to record whether config.h is up to date.
/trunk/or1ksim/cpu/Makefile.in
88,7 → 88,7
host_cpu = @host_cpu@
host_os = @host_os@
 
SUBDIRS = common $(CPU_ARCH)
SUBDIRS = common or1k $(CPU_ARCH)
mkinstalldirs = $(SHELL) $(top_srcdir)/mkinstalldirs
CONFIG_HEADER = ../config.h
CONFIG_CLEAN_FILES =
/trunk/or1ksim/cpu/dlx/Makefile.in
10,7 → 10,7
# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
# PARTICULAR PURPOSE.
 
# Makefile -- Makefile for cpu architecture independent simulation
# Makefile -- Makefile for DLX architecture dependent simulation
# Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
#
# This file is part of OpenRISC 1000 Architectural Simulator.
/trunk/or1ksim/cpu/dlx/Makefile.am
1,4 → 1,4
# Makefile -- Makefile for cpu architecture independent simulation
# Makefile -- Makefile for DLX architecture dependent simulation
# Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
#
# This file is part of OpenRISC 1000 Architectural Simulator.
/trunk/or1ksim/cpu/or16/Makefile.in
10,7 → 10,7
# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
# PARTICULAR PURPOSE.
 
# Makefile -- Makefile for cpu architecture independent simulation
# Makefile -- Makefile for OR16 dependent simulation
# Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
#
# This file is part of OpenRISC 1000 Architectural Simulator.
/trunk/or1ksim/cpu/or16/execute.c
88,7 → 88,11
{
int regno;
regno = atoi(regstr + 1);
debug("eval_reg(%s)\n", regstr);
if (regstr && (*regstr == '%'))
regno = atoi(regstr + 2);
else
regno = atoi(regstr + 1);
 
if (regno < MAX_GPRS)
return reg[regno];
117,7 → 121,10
printf("Old:%.8lx New:%.8lx\n", eval_reg(regstr), value);
}
#endif
regno = atoi(regstr + 1);
if (regstr && (*regstr == '%'))
regno = atoi(regstr + 2);
else
regno = atoi(regstr + 1);
 
if (regno == 0) /* gpr0 is always zero */
value = 0;
160,13 → 167,13
if (*src == '#') /* immediate */
return 0;
else
if (strstr(src, "lo(") || strstr(src, "hi("))
if (strstr(src, "LO(") || strstr(src, "HI("))
return 0;
else
if (!strstr(src, "("))
if (*src == 'r') { /* src: reg direct */
if (*src == '%') { /* src: reg direct */
if (!strstr(dst, "("))
if (*dst == 'r')
if (*dst == '%')
if (strcmp(dst, src) == 0)
return 1; /* dst: reg direct */
else
180,11 → 187,11
else { /* src: register disp */
char *regstr;
regstr = strstr(src, "(r") + 1; /* regstr == "rXX)" */
regstr = strstr(src, "(%r") + 1; /* regstr == "rXX)" */
*strstr(regstr, ")") = '\0'; /* regstr == "rXX" */
 
if (!strstr(dst, "("))
if (*dst == 'r')
if (*dst == '%')
if (strcmp(dst, regstr) == 0)
return 1; /* dst: reg direct */
else
220,7 → 227,7
/* immediate */
return strtoul(operand, NULL, 0);
} else
if (strncmp(operand, "lo(", 3) == 0) {
if (strncmp(operand, "LO(", 3) == 0) {
*strchr(operand, ')') = '\0';
if ((operand[3] == '-') || isdigit(operand[3]))
return (unsigned long)strtol(&operand[3], NULL, 0) & 0xffff;
227,7 → 234,7
else
return eval_operand(&operand[3]) & 0xffff;
} else
if (strncmp(operand, "hi(", 3) == 0) {
if (strncmp(operand, "HI(", 3) == 0) {
*strchr(operand, ')') = '\0';
if ((operand[3] == '-') || isdigit(operand[3]))
return (unsigned long)strtol(&operand[3], NULL, 0) >> 16;
235,7 → 242,7
return eval_operand(&operand[3]) >> 16;
} else
if (!strstr(operand, "(")) /* not indirect but ...*/
if (*operand == 'r') /* ... register direct */
if (*operand == '%') /* ... register direct */
return eval_reg(operand);
else /* ... rel. or abs. address */
249,7 → 256,7
disp = strtol(operand, NULL, 0);
 
debug("eval_operand: disp=%u");
regstr = strstr(operand, "(r") + 1; /* regstr == "rXX)" */
regstr = strstr(operand, "(%r") + 1; /* regstr == "rXX)" */
*strstr(regstr, ")") = '\0'; /* regstr == "rXX" */
debug("eval_operand: regstr=%s", regstr);
memaddr = eval_reg(regstr) + disp;
277,7 → 284,7
}
else
if (!strstr(operand, "(")) /* not indirect but ...*/
if (*operand == 'r') /* ... register direct */
if (*operand == '%') /* ... register direct */
set_reg32(operand, value);
else { /* ... rel. or abs. address */
/* printf("INTERNAL ERROR: Can't set addr operand.\n");
299,7 → 306,7
disp = strtol(operand, NULL, 0);
printf("\n XXXXXX disp = %x", disp);
regstr = strstr(operand, "(r") + 1; /* regstr == "rXX)" */
regstr = strstr(operand, "(%r") + 1; /* regstr == "rXX)" */
*strstr(regstr, ")") = '\0'; /* regstr == "rXX" */
memaddr = eval_reg(regstr) + disp;
589,6 → 596,10
jpbr_flag = 2; /* for half-word insn */
cur->dependsrc1 = ccr_flag;
no_delay_slot = 1;
if (eval_operand(cur->op1) >= pc)
mstats.bnez.forward++;
else
mstats.bnez.backward++;
if (flag) {
pctemp = eval_operand(cur->op1);
mstats.bnez.taken++;
606,6 → 617,10
jpbr_flag = 2; /* for half-word insn */
cur->dependsrc1 = ccr_flag;
no_delay_slot = 1;
if (eval_operand(cur->op1) >= pc)
mstats.beqz.forward++;
else
mstats.beqz.backward++;
if (flag == 0) {
pctemp = eval_operand(cur->op1);
mstats.beqz.taken++;
1060,7 → 1075,7
 
/* strange insn */
if (strcmp(cur->insn, "simrdtsc") == 0) {
set_operand(cur->op1, supercycles);
set_operand(cur->op1, cycles);
} else
if (strcmp(cur->insn, "simprintf") == 0) {
unsigned long stackaddr, fmtaddr, args;
1074,9 → 1089,9
printf("at %.8lx\n", cur->insn_addr);
/* jump to exception service routine at 0x0700 */
cur->func_unit = jump;
pctemp = 0x0700;
/* pctemp = 0x0700;
 
cont_run = 0;
cont_run = 0; */
}
 
/* Dynamic, dependency stats. */
/trunk/or1ksim/cpu/or16/Makefile.am
1,4 → 1,4
# Makefile -- Makefile for cpu architecture independent simulation
# Makefile -- Makefile for OR16 dependent simulation
# Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
#
# This file is part of OpenRISC 1000 Architectural Simulator.
/trunk/or1ksim/cpu/common/abstract.h
20,14 → 20,14
#define MEMORY_LEN 100000
#define STACK_SIZE 10000
#define LABELNAME_LEN 30
#define INSNAME_LEN 13
#define OPERANDNAME_LEN 30
#define INSNAME_LEN 15
#define OPERANDNAME_LEN 50
 
/* This is an abstract memory type rather than physical memory type */
struct mem_entry {
unsigned char data;
unsigned char brk;
char label[LABELNAME_LEN]; /* label name (optinal) */
char label[LABELNAME_LEN]; /* label name (optional) */
char insn[INSNAME_LEN];
char op1[OPERANDNAME_LEN];
char op2[OPERANDNAME_LEN];
/trunk/or1ksim/cpu/common/parse.c
98,28 → 98,50
mem[freemem].data = *str;
}
 
void adddataword(char *num)
void adddataword(char *item)
{
mem[freemem].data = (char) (atol(num) >> 24);
mem[freemem + 1].data = (char) (atol(num) >> 16);
mem[freemem + 2].data = (char) (atol(num) >> 8);
mem[freemem + 3].data = (char) (atol(num));
unsigned long num;
if (isdigit(*item))
num = atol(item);
else
num = eval_label(item);
debug("adddataword: [0x%x] <= %x\n", freemem, num);
mem[freemem].data = (char) (num >> 24);
mem[freemem + 1].data = (char) (num >> 16);
mem[freemem + 2].data = (char) (num >> 8);
mem[freemem + 3].data = (char) (num);
freemem += 4;
}
 
void adddatahalf(char *num)
void adddatahalf(char *item)
{
mem[freemem].data = (char) (atol(num) >> 8);
mem[freemem + 1].data = (char) (atol(num));
unsigned long num;
if (isdigit(*item))
num = atol(item);
else
num = eval_label(item);
mem[freemem].data = (char) (num >> 8);
mem[freemem + 1].data = (char) (num);
freemem += 2;
}
 
void adddatabyte(char *num)
void adddatabyte(char *item)
{
mem[freemem].data = (char) (atol(num));
unsigned long num;
if (isdigit(*item))
num = atol(item);
else
num = eval_label(item);
 
mem[freemem].data = (char) (num);
freemem++;
}
 
/trunk/or1ksim/cpu/Makefile.am
2,5 → 2,4
#
#
 
SUBDIRS = common $(CPU_ARCH)
 
SUBDIRS = common or1k $(CPU_ARCH)
/trunk/or1ksim/cache/dcache_model.c
35,10 → 35,10
/* Data cache */
 
/* Number of DC sets (power of 2) */
#define DC_SETS 256
#define DC_SETS 128
 
/* Block size in bytes (1, 2, 4, 8, 16, 32 etc.) */
#define DC_BLOCK_SIZE 4
#define DC_BLOCK_SIZE 16
 
/* Number of DC ways (1, 2, 3 etc.). */
#define DC_WAYS 1
/trunk/or1ksim/cache/icache_model.c
35,10 → 35,10
/* Instruction cache */
 
/* Number of IC sets (power of 2) */
#define IC_SETS 256
#define IC_SETS 128
 
/* Block size in bytes (1, 2, 4, 8, 16, 32 etc.) */
#define IC_BLOCK_SIZE 4
#define IC_BLOCK_SIZE 16
 
/* Number of IC ways (1, 2, 3 etc.). */
#define IC_WAYS 1
/trunk/or1ksim/bpb/branch_predict.c
37,16 → 37,16
/* Branch prediction buffer */
 
/* Length of BPB */
#define BPB_LEN 128
#define BPB_LEN 1024
 
/* Number of BPB ways (1, 2, 3 etc.). */
#define BPB_WAYS 1
 
/* Number of prediction states (2, 4, 8 etc.). */
#define BPB_PSTATES 2
#define BPB_PSTATES 4
 
/* Number of usage states (2, 3, 4 etc.). */
#define BPB_USTATES 2
#define BPB_USTATES 3
 
/* branch prediction buffer entry */
struct bpb_entry {

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.