OpenCores
URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /
    from Rev 262 to Rev 263
    ↔ Reverse comparison
  •

Rev 262 → Rev 263

/trunk/gen_or1k_isa/sources/or32.c
594,7 → 594,7
type = 0;
/* In case we don't have any parameters, we add dummy read from r0. */
if (!(*args)) {
cur->type = type | OPTYPE_REG | OPTYPE_OP | OPTYPE_LAST;
cur->type = OPTYPE_REG | OPTYPE_OP | OPTYPE_LAST;
cur->data = 0;
debug("#%08X %08X\n", cur->type, cur->data);
cur++;
/trunk/gen_or1k_isa/sources/opcode/or32.c
594,7 → 594,7
type = 0;
/* In case we don't have any parameters, we add dummy read from r0. */
if (!(*args)) {
cur->type = type | OPTYPE_REG | OPTYPE_OP | OPTYPE_LAST;
cur->type = OPTYPE_REG | OPTYPE_OP | OPTYPE_LAST;
cur->data = 0;
debug("#%08X %08X\n", cur->type, cur->data);
cur++;
/trunk/insight/opcodes/or32.c
594,7 → 594,7
type = 0;
/* In case we don't have any parameters, we add dummy read from r0. */
if (!(*args)) {
cur->type = type | OPTYPE_REG | OPTYPE_OP | OPTYPE_LAST;
cur->type = OPTYPE_REG | OPTYPE_OP | OPTYPE_LAST;
cur->data = 0;
debug("#%08X %08X\n", cur->type, cur->data);
cur++;
/trunk/or1ksim/sim-config.h
85,20 → 85,27
MT_RANDOM
} type;
} memory;
struct {
unsigned long upr; /* Unit present register */
unsigned long ver, rev; /* Version register */
int superscalar; /* superscalara analysis */
int hazards; /* dependency hazards analysis */
int history; /* instruction stream history analysis */
int dependstats; /* dependency statistics */
int dependency; /* not sure: same as dependency statistics? */
int slp; /* not sure: stack analisys? */
} cpu;
 
int simdebug; /* Simulator debugging */
int profile; /* Is profiler running */
FILE *fprof; /* profiler file */
int iprompt; /* Interactive prompt */
int dependstats;/* Calculation of dependency statistics */
int dependency; /* Calculation of dependency (implied by dependstats) */
int history; /* Instruction stream history remembered by the simulator */
int superscalar;/* "Superscalar" simulation */
int slp;
int inhibit_server; /* Don't start up the JTAG proxy server */
int server_port; /* A user specified port number for services */
char* filename; /* Original Command Simulator file (CZ) */
char *script_file; /* Script file that should be used */
char *filename; /* Original Command Simulator file (CZ) */
};
 
extern struct config config;
/trunk/or1ksim/sim.cfg
4,6 → 4,18
type = random
end
 
section cpu
ver = 0x1200
rev = 0x0001
/* upr = */
superscalar = 0
hazards = 0
history = 0
dependstats = 0
dependency = 0
slp = 0
end
 
section mc
enabled = 1
baseaddr = 0xa0000000
/trunk/or1ksim/cpu/or32/execute.c
349,8 → 349,13
memset(reg, 0, sizeof(reg));
memset(iqueue, 0, sizeof(iqueue));
memset(icomplet, 0, sizeof(icomplet));
 
/* Cpu configuration */
mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_EXR | SPR_SR_SUPV);
mtspr(SPR_UPR, config.cpu.upr);
setsprbits(SPR_VR, SPR_VR_VER, config.cpu.ver);
setsprbits(SPR_VR, SPR_VR_REV, config.cpu.rev);
pcnext = 0x0; /* MM1409: All programs should start at reset vector entry! */
printf ("Starting at 0x%08x\n", pcnext);
pc = pcnext;
485,15 → 490,13
 
inline void analysis()
{
int i;
/* Here comes real execution someday... */
if (config.dependency)
if (config.cpu.dependency)
/* Instruction waits in completition buffer until retired. */
memcpy (&icomplet[0], &iqueue[0], sizeof (struct iqueue_entry));
 
if (config.history) {
if (config.cpu.history) {
int i;
 
/* History of execution */
for (i = HISTEXEC_LEN - 1; i; i--)
histexec[i] = histexec[i - 1];
563,7 → 566,7
or32_opcodes[cur->insn_index].exec();
}
 
if (config.dependstats) {
if (config.cpu.dependstats) {
/* Dynamic, dependency stats. */
adddstats((char *)insn_name(icomplet[0].insn_index), (char *)insn_name(iqueue[0].insn_index), 1, check_depend());
574,7 → 577,7
addsstats((char *)insn_name(iqueue[0].insn_index), 1, 0);
}
if (config.superscalar) {
if (config.cpu.superscalar) {
if ((cur->func_unit == branch) || (cur->func_unit == jump))
storecycles += 0;
/trunk/or1ksim/cpu/or32/or32.c
594,7 → 594,7
type = 0;
/* In case we don't have any parameters, we add dummy read from r0. */
if (!(*args)) {
cur->type = type | OPTYPE_REG | OPTYPE_OP | OPTYPE_LAST;
cur->type = OPTYPE_REG | OPTYPE_OP | OPTYPE_LAST;
cur->data = 0;
debug("#%08X %08X\n", cur->type, cur->data);
cur++;
/trunk/or1ksim/cpu/common/stats.c
160,7 → 160,7
 
void slp_checkaccess(unsigned long addr, char type)
{
if (!config.slp)
if (!config.cpu.slp)
return;
if (/*(addr < (MEMORY_START + MEMORY_LEN - 4000)) && MM1709: we have no knowledge of this anymore */
172,7 → 172,7
 
void slp_func_entry()
{
if (!config.slp)
if (!config.cpu.slp)
return;
if (++slp_stats.curdepth > slp_stats.maxdepth)
184,7 → 184,7
 
void slp_func_exit()
{
if (!config.slp)
if (!config.cpu.slp)
return;
slp_stats.curdepth--;
195,7 → 195,7
{
int i, all = 0, dependall = 0;
 
if (!config.dependstats) {
if (!config.cpu.dependstats) {
printf("Hazard analysis disabled. Enable it to see analysis results.\n");
return;
}
263,7 → 263,7
{
int i, all = 0, dependall = 0;
 
if (!config.slp) {
if (!config.cpu.slp) {
printf("SLP analysis disabled. Enable it to see analysis results.\n");
return;
}
/trunk/or1ksim/toplevel.c
79,7 → 79,7
void BlockJTAG(void);
 
/* CVS revision number. */
const char rcsrev[] = "$Revision: 1.32 $";
const char rcsrev[] = "$Revision: 1.33 $";
 
/* Continuos run versus single step tracing switch. */
int cont_run;
236,21 → 236,13
if (parse_args(argc, argv)) {
printf("Usage: %s [options] <filename>\n", argv[0]);
printf("Options:\n");
printf(" -v: version and copyright note\n");
printf(" -i: enable interactive command prompt\n");
printf(" -bpb: disable branch prediction buffer analysis\n");
printf(" -btic: disable branch prediction target insn cache analysis\n");
printf(" -hazards: disable dependency hazards analysis\n");
printf(" -history: disable instruction stream history analysis\n");
printf(" -superscalar: disable superscalar analysis\n");
printf(" -fast: disable BPB, BTIC, SLP, dependency hazards, history"
" analysis etc.\n");
printf(" -profile: generates profiling data.\n"); /* MM */
printf(" -upr <n>: set UPR to n\n");
printf(" -ver <n>: set VR[VER] to n\n");
printf(" -rev <n>: set VR[REV] to n\n");
printf(" -nosrv: do not launch JTAG proxy server\n"); /* (CZ) */
printf(" -srv <n>: launch JTAG proxy server on port <n>\n"); /* (CZ) */
printf(" -v\t\t version and copyright note\n");
printf(" -i\t\t enable interactive command prompt\n");
printf(" -f or --file\t change script file [sim.cfg]\n");
printf(" --bpb\t\t disable branch prediction buffer analysis\n");
printf(" --btic\t disable branch prediction target insn cache analysis\n");
printf(" --nosrv\t do not launch JTAG proxy server\n"); /* (CZ) */
printf(" --srv <n>\t launch JTAG proxy server on port <n>; [random]\n"); /* (CZ) */
exit(-1);
}
 
273,9 → 265,9
} else
fprintf(config.fprof, "+00000000 FFFFFFFF FFFFFFFF main\n");
}
 
/* Read configuration file. */
read_script_file("sim.cfg");
read_script_file(config.script_file);
init_labels();
init_breakpoints();
print_config();
/trunk/or1ksim/sim-config.c
32,12 → 32,37
unsigned long val;
memset(&config, 0, sizeof(config));
/* Sim */
config.script_file = "sim.cfg";
/* Memory */
config.memory.type = MT_PATTERN;
config.memory.pattern = 0;
config.memory.random_seed = -1; /* Generate new seed */
strcpy(config.memory.memory_table_file, "simmem.cfg");
 
/* Memory Controller */
config.mc.enabled = 0;
/* Uarts */
config.nuarts = 0;
config.uarts_enabled = 0;
/* DMAs */
config.ndmas = 0;
config.dmas_enabled = 0;
/* CPU */
config.cpu.superscalar = 0;
config.cpu.history = 0;
config.cpu.hazards = 0;
config.cpu.dependstats = 0;
config.cpu.dependency = 0;
config.cpu.slp = 0;
config.cpu.upr = SPR_UPR_UP | SPR_UPR_DCP | SPR_UPR_ICP | SPR_UPR_DMP
| SPR_UPR_IMP | SPR_UPR_OB32P | SPR_UPR_DUP | SPR_UPR_PICP
| SPR_UPR_PMP | SPR_UPR_TTP;
/* Old */
config.dc.tagtype = NONE/*VIRTUAL*/;
config.ic.tagtype = NONE/*VIRTUAL*/;
44,37 → 69,16
config.bp.bpb_sim = 1;
config.bp.btic_sim = 1;
config.clkcycle_ns = 4; /* 4 for 4ns (250MHz) */
strcpy (config.uarts[0].rxfile, "/tmp/uart0.rx");
strcpy (config.uarts[0].txfile, "/tmp/uart0.tx");
config.uarts[0].baseaddr = 0x80000000;
config.uarts[0].jitter = -1; /* Async behavior */
config.dmas[0].baseaddr = 0x90000000;
config.dmas[0].irq = INT_DMA;
config.ethernets[0].baseaddr = 0x88000000;
config.ethernets[0].dma = 0;
config.ethernets[0].tx_channel = 0;
config.ethernets[0].rx_channel = 1;
config.ethernets[0].rxfile = "/tmp/eth0.rx";
config.ethernets[0].txfile = "/tmp/eth0.tx";
config.ethernets[0].baseaddr = 0x88000000;
config.ethernets[0].dma = 0;
config.ethernets[0].tx_channel = 0;
config.ethernets[0].rx_channel = 1;
config.ethernets[0].rxfile = "/tmp/eth0.rx";
config.ethernets[0].txfile = "/tmp/eth0.tx";
config.simdebug = 0;
config.profile = 0;
config.iprompt = 0;
config.dependstats = 1;
config.dependency = 1;
config.history = 1;
config.superscalar = 1;
config.slp = 1;
config.profile = 0;
config.mc.enabled = 0;
 
mtspr(SPR_VR, SPR_VR_VER & 0x1200);
 
val = SPR_UPR_UP | SPR_UPR_DCP | SPR_UPR_ICP | SPR_UPR_DMP |
SPR_UPR_IMP | SPR_UPR_OB32P | SPR_UPR_DUP | SPR_UPR_PICP |
SPR_UPR_PMP | SPR_UPR_TTP;
 
mtspr(SPR_UPR, val);
}
 
int parse_args(int argc, char *argv[])
88,11 → 92,16
argc--;
argv++;
} else
if (strcmp(*argv, "-nosrv") == 0) { /* (CZ) */
if (strcmp(*argv, "-f") == 0 || strcmp(*argv, "--file") == 0) {
argv++; argc--;
config.script_file = argv[0];
argv++; argc--;
} else
if (strcmp(*argv, "--nosrv") == 0) { /* (CZ) */
config.inhibit_server = 1;
argv++; argc--;
} else
if (strcmp(*argv, "-srv") == 0) { /* (CZ) */
if (strcmp(*argv, "--srv") == 0) { /* (CZ) */
char *s;
if(!--argc)
return 1;
109,56 → 118,15
version();
exit(0);
} else
if (strcmp(*argv, "-bpb") == 0) {
if (strcmp(*argv, "--bpb") == 0) {
config.bp.bpb_sim = 0;
argv++; argc--;
} else
if (strcmp(*argv, "-hazards") == 0) {
config.dependstats = 0;
config.dependency = 0;
argv++; argc--;
} else
if (strcmp(*argv, "-history") == 0) {
config.history = 0;
argv++; argc--;
} else
if (strcmp(*argv, "-superscalar") == 0) {
config.superscalar = 0;
argv++; argc--;
} else
if (strcmp(*argv, "-fast") == 0) {
config.superscalar = 0;
config.history = 0;
config.dependstats = 0;
config.dependency = 0;
config.bp.bpb_sim = 0;
if (strcmp(*argv, "--btic") == 0) {
config.bp.btic_sim = 0;
config.slp = 0;
argv++; argc--;
} else
if (strcmp(*argv, "-btic") == 0) {
config.bp.btic_sim = 0;
argv++; argc--;
} else
if (strcmp(*argv, "-upr") == 0) {
argv++; argc--;
val = strtoul(*argv, NULL, 0);
mtspr(SPR_UPR, val);
argv++; argc--;
} else
if (strcmp(*argv, "-ver") == 0) {
argv++; argc--;
val = strtoul(*argv, NULL, 0);
setsprbits(SPR_VR, SPR_VR_VER, val);
argv++; argc--;
} else
if (strcmp(*argv, "-rev") == 0) {
argv++; argc--;
val = strtoul(*argv, NULL, 0);
setsprbits(SPR_VR, SPR_VR_REV, val);
argv++; argc--;
} else
if (strcmp(*argv, "-profile") == 0) {
if (strcmp(*argv, "--profile") == 0) {
config.profile = 1;
argv++; argc--;
} else {
229,7 → 197,8
{"mc", 0},
{"uart", 0},
{"dma", 0},
{"memory", 0}
{"memory", 0},
{"cpu", 0}
};
 
unsigned long tempL;
271,6 → 240,14
{4, "random_seed", "= %i", NULL, (void *)(&config.memory.random_seed)},
{4, "pattern", "= %i", NULL, (void *)(&config.memory.pattern)},
{4, "type", "= %255s", memory_type, (void *)(&tempS[0])},
{5, "ver", "= 0x%x", NULL, (void *)(&config.cpu.ver)},
{5, "ver", "= 0x%x", NULL, (void *)(&config.cpu.rev)},
{5, "upr", "= 0x%x", NULL, (void *)(&config.cpu.upr)},
{5, "superscalar", "= %i", NULL, (void *)(&config.cpu.superscalar)},
{5, "dependstats", "= %i", NULL, (void *)(&config.cpu.dependstats)},
{5, "dependency", "= %i", NULL, (void *)(&config.cpu.dependency)},
{5, "slp", "= %i", NULL, (void *)(&config.cpu.slp)}
};
 
int current_device = -1;
369,21 → 346,21
void read_script_file (char *filename)
{
FILE *f;
unsigned long memory_needed = 0;
char *home = getenv("HOME");
char ctmp[STR_SIZE];
int local = 1;
int section = 0;
FILE *f;
unsigned long memory_needed = 0;
char *home = getenv("HOME");
char ctmp[STR_SIZE];
int local = 1;
int section = 0;
 
sprintf(ctmp, "%s/.or1k/%s", home, filename);
if ((f = fopen (filename, "rt")) != NULL
|| home != NULL && !(local = 0) && (f = fopen (ctmp, "rt")) != NULL) {
unsigned long start, length;
char type[STR_SIZE];
int nparam;
int rd, wd;
printf ("Reading script file from '%s':\n", local ? filename : ctmp);
sprintf(ctmp, "%s/.or1k/%s", home, filename);
if ((f = fopen (filename, "rt")) != NULL
|| home != NULL && !(local = 0) && (f = fopen (ctmp, "rt")) != NULL) {
unsigned long start, length;
char type[STR_SIZE];
int nparam;
int rd, wd;
printf ("Reading script file from '%s':\n", local ? filename : ctmp);
while (!feof(f)) {
char param[STR_SIZE];
if (fscanf(f, "%s ", &param) != 1) break;
442,11 → 419,11
config_params[found].func();
}
}
fclose (f);
} else {
fprintf (stderr, "Cannot read script file from '%s',\nneither '%s'; assuming standard configuration.\n", filename, ctmp);
}
fclose (f);
} else {
fprintf (stderr, "Cannot read script file from '%s',\nneither '%s'; assuming standard configuration.\n", filename, ctmp);
}
 
/* Initialize memory table. */
sim_read_memory_table (config.memory.memory_table_file);
/* Initialize memory table. */
sim_read_memory_table (config.memory.memory_table_file);
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.