URL
https://opencores.org/ocsvn/uart_fpga_slow_control_migrated/uart_fpga_slow_control_migrated/trunk
Subversion Repositories uart_fpga_slow_control_migrated
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- This comparison shows the changes necessary to convert path
/
- from Rev 28 to Rev 29
- ↔ Reverse comparison
Rev 28 → Rev 29
/uart_fpga_slow_control/trunk/documents/RealTerm_line_commands.txt
0,0 → 1,51
BAUD |
PORT |
FRAMESIZE |
CAPFILE |
CAPCOUNT |
VISIBLE |
DISPLAY |
BIGEND |
FLOW |
EFLOW |
RTS |
DTR |
CLOSED |
OPEN |
TAB |
ECHO |
EBAUD |
HALF |
LFNL |
CAPTION |
CAPSECS |
CAPTURE |
CAPQUIT |
CAPDIRECT |
CAPHEX |
TIMESTAMP |
CONTROLS |
MONITOR |
DATA |
EDATA |
CHARDLY |
LINEDLY |
ROWS |
COLS |
SENDFILE |
SENDQUIT |
SENDDLY |
SENDREP |
FIRST |
SENDSTR |
SENDNUM |
CR |
LF |
SPY |
SCANPORTS |
HELP |
I2CADD |
SCROLLBACK |
COLORS |
INSTALL |
HEXCSV |
/uart_fpga_slow_control/trunk/documents/SoftwareFolder.txt
0,0 → 1,29
In this section we will try to give ideas on how to drive the UART from a PC |
besides the simple implementation with RealTerm. |
|
in the software folder of the project archive you will find: |
|
++ rtd_uart_test.bat : |
\ copy this bat file inside the RealTerm software folder to load the program (http://realterm.sourceforge.net/) |
passing parameter settings (uart port, speed, display size, etc) |
\ check "RealTerm_line_commands.txt" in the documentation folder for more parameters |
\ loads a file "Hex_commands.bin" (in BINARY format) and sends it over UART |
\ known strange behaviour of such method: |
> COLS=18 doesn't set the number of columns to 18 |
> relative paths or paths with "" don't work |
|
++ py_serial_control.py : |
\ custom very simple script to read and write the UART with Python (http://www.python.org/doc) |
\ uses the pySerial library (http://pyserial.sourceforge.net/) |
\ parses human readable parameters and translates them into the correct hex commands |
> e.g: >> update --> 0x8000 0x00000000 |
\ include a basic 'help' menu |
\ define your commands |
\ DEFINE the number of registers to expect back after an update |
\ to be implemented: |
> load parameters and commands from files |
> improve readback print on screen formatting |
> make a generic nregister readout |
|
py_serial il Linux friendly! :) |
Tested on Ubuntu 10.04 LTS |
/uart_fpga_slow_control/trunk/documents/Hex_commands.bin
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
uart_fpga_slow_control/trunk/documents/Hex_commands.bin
Property changes :
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## -0,0 +1 ##
+application/octet-stream
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Index: uart_fpga_slow_control/trunk/documents/OpenCores_description.txt
===================================================================
--- uart_fpga_slow_control/trunk/documents/OpenCores_description.txt (revision 28)
+++ uart_fpga_slow_control/trunk/documents/OpenCores_description.txt (revision 29)
@@ -24,10 +24,12 @@
Remotely control the logic from a PC:
~ Under Windows use RealTerm to simply send and receive HEX commands ( http://realterm.sourceforge.net/ ).
+~ Simple Python script to drive the uart via command line in linux (see software details tab above).
~ TCP/IP to UART bridging is just around the corner using inexpensive external devices.
+
crossplatform compatible (tested on Xilinx Virtex-5 and Altera Stratix-4 devices). Tested up to 1 Mbps with a 29.4912 MHz oscillator.
+
## Feeback:
-Give comments and feedback using the official core thread on the OpenCores forum:
-http://opencores.org/forum,Cores,0,4443
\ No newline at end of file
+Give comments and feedback using the official core thread on the OpenCores forum:
\ No newline at end of file