URL
https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk
Subversion Repositories open8_urisc
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 281 to Rev 282
- ↔ Reverse comparison
Rev 281 → Rev 282
/open8_urisc/trunk/VHDL/o8_sdlc_if.vhd
218,8 → 218,8
RD_TX_REGISTER, TX_INIT, |
TX_START_FLAG, TX_WAIT_START_FLAG, |
TX_MESG_DATA, TX_ADV_ADDR, TX_WAIT_MESG_DATA, |
TX_CRC_LB_WR, TX_CRC_LB_WAIT, |
TX_CRC_UB_WR, TX_CRC_UB_WAIT, |
TX_CRC_LB_WR, TX_WAIT_CRC_LB, |
TX_CRC_UB_WR, TX_WAIT_CRC_UB, |
TX_STOP_FLAG, TX_WAIT_STOP_FLAG, TX_SET_FLAG ); |
|
signal TX_FSM_State : TX_FSM_STATES := WR_CLOCK_STATE; |
696,9 → 696,9
when TX_CRC_LB_WR => |
TX_Wr_En <= '1'; |
TX_Wr_Data <= TX_CRC_Data_LB; |
TX_FSM_State <= TX_CRC_LB_WAIT; |
TX_FSM_State <= TX_WAIT_CRC_LB; |
|
when TX_CRC_LB_WAIT => |
when TX_WAIT_CRC_LB => |
if( TX_Req_Next = '1' )then |
TX_FSM_State <= TX_CRC_UB_WR; |
end if; |
706,9 → 706,9
when TX_CRC_UB_WR => |
TX_Wr_En <= '1'; |
TX_Wr_Data <= TX_CRC_Data_UB; |
TX_FSM_State <= TX_CRC_UB_WAIT; |
TX_FSM_State <= TX_WAIT_CRC_UB; |
|
when TX_CRC_UB_WAIT => |
when TX_WAIT_CRC_UB => |
if( TX_Req_Next = '1' )then |
TX_FSM_State <= TX_STOP_FLAG; |
end if; |