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/aes_decry_ip_128bit/trunk/rtl/Inv_Sub_4bytes.vhd
0,0 → 1,61
--************************************************************
--Copyright 2015, Ganesh Hegde < ghegde@opencores.org >
--
--This source file may be used and distributed without
--restriction provided that this copyright statement is not
--removed from the file and that any derivative work contains
--the original copyright notice and the associated disclaimer.
--
--This source is distributed in the hope that it will be
--useful, but WITHOUT ANY WARRANTY; without even the implied
--warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
--PURPOSE. See the GNU Lesser General Public License for more
--details.
--
--You should have received a copy of the GNU Lesser General
--Public License along with this source; if not, download it
--from http://www.opencores.org/lgpl.shtml
--
--*************************************************************
 
--*************************************************************
--This module will perform inverse byte substitution for the
--given input word.
--
--Logic type : Combinational
--*************************************************************
 
library ieee;
use ieee.std_logic_1164.all;
 
entity Inv_Sub_4bytes is
port(
word_in: in std_logic_vector(31 downto 0);
word_out: out std_logic_vector(31 downto 0)
);
end Inv_Sub_4bytes;
 
architecture Inv_Sub_4bytes_beh of Inv_Sub_4bytes is
signal b0,b1,b2,b3: std_logic_vector(7 downto 0);
component Inv_Sbox
port (
data_in: in std_logic_vector(7 downto 0);
data_out:out std_logic_vector(7 downto 0)
);
end component;
begin
b0<=word_in(31 downto 24);
b1<=word_in(23 downto 16);
b2<=word_in(15 downto 8);
b3<=word_in(7 downto 0);
Inst1:Inv_Sbox
port map(data_in=>b0,data_out=>word_out(31 downto 24));
Inst2:Inv_Sbox
port map(data_in=>b1,data_out=>word_out(23 downto 16));
Inst3:Inv_Sbox
port map(data_in=>b2,data_out=>word_out(15 downto 8));
Inst4:Inv_Sbox
port map(data_in=>b3,data_out=>word_out(7 downto 0));
end Inv_Sub_4bytes_beh;
/aes_decry_ip_128bit/trunk/rtl/x9.vhd
0,0 → 1,302
--************************************************************
--Copyright 2015, Ganesh Hegde < ghegde@opencores.org >
--
--This source file may be used and distributed without
--restriction provided that this copyright statement is not
--removed from the file and that any derivative work contains
--the original copyright notice and the associated disclaimer.
--
--This source is distributed in the hope that it will be
--useful, but WITHOUT ANY WARRANTY; without even the implied
--warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
--PURPOSE. See the GNU Lesser General Public License for more
--details.
--
--You should have received a copy of the GNU Lesser General
--Public License along with this source; if not, download it
--from http://www.opencores.org/lgpl.shtml
--
--*************************************************************
 
--*************************************************************
-- GF multiplication of input byte by 9
--Logic type : Combinational
--*************************************************************
 
library ieee;
use ieee.std_logic_1164.all;
 
entity x9 is
port (
--clk,reset : in std_logic;
data_in: in std_logic_vector(7 downto 0);
data_out:out std_logic_vector(7 downto 0)
);
end x9;
 
architecture beh_x9 of x9 is
begin
process(data_in)
begin
case(data_in) is
when x"00"=> data_out<=x"00";
when x"01"=> data_out<=x"09";
when x"02"=> data_out<=x"12";
when x"03"=> data_out<=x"1b";
when x"04"=> data_out<=x"24";
when x"05"=> data_out<=x"2d";
when x"06"=> data_out<=x"36";
when x"07"=> data_out<=x"3f";
when x"08"=> data_out<=x"48";
when x"09"=> data_out<=x"41";
when x"0a"=> data_out<=x"5a";
when x"0b"=> data_out<=x"53";
when x"0c"=> data_out<=x"6c";
when x"0d"=> data_out<=x"65";
when x"0e"=> data_out<=x"7e";
when x"0f"=> data_out<=x"77";
when x"10"=> data_out<=x"90";
when x"11"=> data_out<=x"99";
when x"12"=> data_out<=x"82";
when x"13"=> data_out<=x"8b";
when x"14"=> data_out<=x"b4";
when x"15"=> data_out<=x"bd";
when x"16"=> data_out<=x"a6";
when x"17"=> data_out<=x"af";
when x"18"=> data_out<=x"d8";
when x"19"=> data_out<=x"d1";
when x"1a"=> data_out<=x"ca";
when x"1b"=> data_out<=x"c3";
when x"1c"=> data_out<=x"fc";
when x"1d"=> data_out<=x"f5";
when x"1e"=> data_out<=x"ee";
when x"1f"=> data_out<=x"e7";
when x"20"=> data_out<=x"3b";
when x"21"=> data_out<=x"32";
when x"22"=> data_out<=x"29";
when x"23"=> data_out<=x"20";
when x"24"=> data_out<=x"1f";
when x"25"=> data_out<=x"16";
when x"26"=> data_out<=x"0d";
when x"27"=> data_out<=x"04";
when x"28"=> data_out<=x"73";
when x"29"=> data_out<=x"7a";
when x"2a"=> data_out<=x"61";
when x"2b"=> data_out<=x"68";
when x"2c"=> data_out<=x"57";
when x"2d"=> data_out<=x"5e";
when x"2e"=> data_out<=x"45";
when x"2f"=> data_out<=x"4c";
when x"30"=> data_out<=x"ab";
when x"31"=> data_out<=x"a2";
when x"32"=> data_out<=x"b9";
when x"33"=> data_out<=x"b0";
when x"34"=> data_out<=x"8f";
when x"35"=> data_out<=x"86";
when x"36"=> data_out<=x"9d";
when x"37"=> data_out<=x"94";
when x"38"=> data_out<=x"e3";
when x"39"=> data_out<=x"ea";
when x"3a"=> data_out<=x"f1";
when x"3b"=> data_out<=x"f8";
when x"3c"=> data_out<=x"c7";
when x"3d"=> data_out<=x"ce";
when x"3e"=> data_out<=x"d5";
when x"3f"=> data_out<=x"dc";
when x"40"=> data_out<=x"76";
when x"41"=> data_out<=x"7f";
when x"42"=> data_out<=x"64";
when x"43"=> data_out<=x"6d";
when x"44"=> data_out<=x"52";
when x"45"=> data_out<=x"5b";
when x"46"=> data_out<=x"40";
when x"47"=> data_out<=x"49";
when x"48"=> data_out<=x"3e";
when x"49"=> data_out<=x"37";
when x"4a"=> data_out<=x"2c";
when x"4b"=> data_out<=x"25";
when x"4c"=> data_out<=x"1a";
when x"4d"=> data_out<=x"13";
when x"4e"=> data_out<=x"08";
when x"4f"=> data_out<=x"01";
when x"50"=> data_out<=x"e6";
when x"51"=> data_out<=x"ef";
when x"52"=> data_out<=x"f4";
when x"53"=> data_out<=x"fd";
when x"54"=> data_out<=x"c2";
when x"55"=> data_out<=x"cb";
when x"56"=> data_out<=x"d0";
when x"57"=> data_out<=x"d9";
when x"58"=> data_out<=x"ae";
when x"59"=> data_out<=x"a7";
when x"5a"=> data_out<=x"bc";
when x"5b"=> data_out<=x"b5";
when x"5c"=> data_out<=x"8a";
when x"5d"=> data_out<=x"83";
when x"5e"=> data_out<=x"98";
when x"5f"=> data_out<=x"91";
when x"60"=> data_out<=x"4d";
when x"61"=> data_out<=x"44";
when x"62"=> data_out<=x"5f";
when x"63"=> data_out<=x"56";
when x"64"=> data_out<=x"69";
when x"65"=> data_out<=x"60";
when x"66"=> data_out<=x"7b";
when x"67"=> data_out<=x"72";
when x"68"=> data_out<=x"05";
when x"69"=> data_out<=x"0c";
when x"6a"=> data_out<=x"17";
when x"6b"=> data_out<=x"1e";
when x"6c"=> data_out<=x"21";
when x"6d"=> data_out<=x"28";
when x"6e"=> data_out<=x"33";
when x"6f"=> data_out<=x"3a";
when x"70"=> data_out<=x"dd";
when x"71"=> data_out<=x"d4";
when x"72"=> data_out<=x"cf";
when x"73"=> data_out<=x"c6";
when x"74"=> data_out<=x"f9";
when x"75"=> data_out<=x"f0";
when x"76"=> data_out<=x"eb";
when x"77"=> data_out<=x"e2";
when x"78"=> data_out<=x"95";
when x"79"=> data_out<=x"9c";
when x"7a"=> data_out<=x"87";
when x"7b"=> data_out<=x"8e";
when x"7c"=> data_out<=x"b1";
when x"7d"=> data_out<=x"b8";
when x"7e"=> data_out<=x"a3";
when x"7f"=> data_out<=x"aa";
when x"80"=> data_out<=x"ec";
when x"81"=> data_out<=x"e5";
when x"82"=> data_out<=x"fe";
when x"83"=> data_out<=x"f7";
when x"84"=> data_out<=x"c8";
when x"85"=> data_out<=x"c1";
when x"86"=> data_out<=x"da";
when x"87"=> data_out<=x"d3";
when x"88"=> data_out<=x"a4";
when x"89"=> data_out<=x"ad";
when x"8a"=> data_out<=x"b6";
when x"8b"=> data_out<=x"bf";
when x"8c"=> data_out<=x"80";
when x"8d"=> data_out<=x"89";
when x"8e"=> data_out<=x"92";
when x"8f"=> data_out<=x"9b";
when x"90"=> data_out<=x"7c";
when x"91"=> data_out<=x"75";
when x"92"=> data_out<=x"6e";
when x"93"=> data_out<=x"67";
when x"94"=> data_out<=x"58";
when x"95"=> data_out<=x"51";
when x"96"=> data_out<=x"4a";
when x"97"=> data_out<=x"43";
when x"98"=> data_out<=x"34";
when x"99"=> data_out<=x"3d";
when x"9a"=> data_out<=x"26";
when x"9b"=> data_out<=x"2f";
when x"9c"=> data_out<=x"10";
when x"9d"=> data_out<=x"19";
when x"9e"=> data_out<=x"02";
when x"9f"=> data_out<=x"0b";
when x"a0"=> data_out<=x"d7";
when x"a1"=> data_out<=x"de";
when x"a2"=> data_out<=x"c5";
when x"a3"=> data_out<=x"cc";
when x"a4"=> data_out<=x"f3";
when x"a5"=> data_out<=x"fa";
when x"a6"=> data_out<=x"e1";
when x"a7"=> data_out<=x"e8";
when x"a8"=> data_out<=x"9f";
when x"a9"=> data_out<=x"96";
when x"aa"=> data_out<=x"8d";
when x"ab"=> data_out<=x"84";
when x"ac"=> data_out<=x"bb";
when x"ad"=> data_out<=x"b2";
when x"ae"=> data_out<=x"a9";
when x"af"=> data_out<=x"a0";
when x"b0"=> data_out<=x"47";
when x"b1"=> data_out<=x"4e";
when x"b2"=> data_out<=x"55";
when x"b3"=> data_out<=x"5c";
when x"b4"=> data_out<=x"63";
when x"b5"=> data_out<=x"6a";
when x"b6"=> data_out<=x"71";
when x"b7"=> data_out<=x"78";
when x"b8"=> data_out<=x"0f";
when x"b9"=> data_out<=x"06";
when x"ba"=> data_out<=x"1d";
when x"bb"=> data_out<=x"14";
when x"bc"=> data_out<=x"2b";
when x"bd"=> data_out<=x"22";
when x"be"=> data_out<=x"39";
when x"bf"=> data_out<=x"30";
when x"c0"=> data_out<=x"9a";
when x"c1"=> data_out<=x"93";
when x"c2"=> data_out<=x"88";
when x"c3"=> data_out<=x"81";
when x"c4"=> data_out<=x"be";
when x"c5"=> data_out<=x"b7";
when x"c6"=> data_out<=x"ac";
when x"c7"=> data_out<=x"a5";
when x"c8"=> data_out<=x"d2";
when x"c9"=> data_out<=x"db";
when x"ca"=> data_out<=x"c0";
when x"cb"=> data_out<=x"c9";
when x"cc"=> data_out<=x"f6";
when x"cd"=> data_out<=x"ff";
when x"ce"=> data_out<=x"e4";
when x"cf"=> data_out<=x"ed";
when x"d0"=> data_out<=x"0a";
when x"d1"=> data_out<=x"03";
when x"d2"=> data_out<=x"18";
when x"d3"=> data_out<=x"11";
when x"d4"=> data_out<=x"2e";
when x"d5"=> data_out<=x"27";
when x"d6"=> data_out<=x"3c";
when x"d7"=> data_out<=x"35";
when x"d8"=> data_out<=x"42";
when x"d9"=> data_out<=x"4b";
when x"da"=> data_out<=x"50";
when x"db"=> data_out<=x"59";
when x"dc"=> data_out<=x"66";
when x"dd"=> data_out<=x"6f";
when x"de"=> data_out<=x"74";
when x"df"=> data_out<=x"7d";
when x"e0"=> data_out<=x"a1";
when x"e1"=> data_out<=x"a8";
when x"e2"=> data_out<=x"b3";
when x"e3"=> data_out<=x"ba";
when x"e4"=> data_out<=x"85";
when x"e5"=> data_out<=x"8c";
when x"e6"=> data_out<=x"97";
when x"e7"=> data_out<=x"9e";
when x"e8"=> data_out<=x"e9";
when x"e9"=> data_out<=x"e0";
when x"ea"=> data_out<=x"fb";
when x"eb"=> data_out<=x"f2";
when x"ec"=> data_out<=x"cd";
when x"ed"=> data_out<=x"c4";
when x"ee"=> data_out<=x"df";
when x"ef"=> data_out<=x"d6";
when x"f0"=> data_out<=x"31";
when x"f1"=> data_out<=x"38";
when x"f2"=> data_out<=x"23";
when x"f3"=> data_out<=x"2a";
when x"f4"=> data_out<=x"15";
when x"f5"=> data_out<=x"1c";
when x"f6"=> data_out<=x"07";
when x"f7"=> data_out<=x"0e";
when x"f8"=> data_out<=x"79";
when x"f9"=> data_out<=x"70";
when x"fa"=> data_out<=x"6b";
when x"fb"=> data_out<=x"62";
when x"fc"=> data_out<=x"5d";
when x"fd"=> data_out<=x"54";
when x"fe"=> data_out<=x"4f";
when others=> data_out<=x"46";
end case;
end process;
 
end beh_x9;
/aes_decry_ip_128bit/trunk/rtl/one_round_decrypt.vhd
0,0 → 1,92
--************************************************************
--Copyright 2015, Ganesh Hegde < ghegde@opencores.org >
--
--This source file may be used and distributed without
--restriction provided that this copyright statement is not
--removed from the file and that any derivative work contains
--the original copyright notice and the associated disclaimer.
--
--This source is distributed in the hope that it will be
--useful, but WITHOUT ANY WARRANTY; without even the implied
--warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
--PURPOSE. See the GNU Lesser General Public License for more
--details.
--
--You should have received a copy of the GNU Lesser General
--Public License along with this source; if not, download it
--from http://www.opencores.org/lgpl.shtml
--
--*************************************************************
 
--*************************************************************
-- One round of decryption is done
--Logic type : Combinational
--*************************************************************
 
library ieee;
use ieee.std_logic_1164.all;
 
entity one_round_decrypt is
port(
cipher : in std_logic_vector(127 downto 0);
text_out: out std_logic_vector(127 downto 0);
round_key: in std_logic_vector(127 downto 0)
);
end one_round_decrypt;
 
architecture beh_one_round_decrypt of one_round_decrypt is
 
component InvSub_addRk
port(
state_in : in std_logic_vector(127 downto 0);
state_out : out std_logic_vector(127 downto 0);
key : in std_logic_vector(127 downto 0)
);
end component;
 
component inv_mix_column
port(
column: in std_logic_vector(31 downto 0);
p0,p1,p2,p3: out std_logic_vector(31 downto 0)
);
end component;
 
signal p00,p01,p02,p03,
p10,p11,p12,p13,
p20,p21,p22,p23,
p30,p31,p32,p33:std_logic_vector(31 downto 0);
signal c0,c1,c2,c3:std_logic_vector(31 downto 0);
signal out0,out1,out2,out3: std_logic_vector(31 downto 0);
signal t0,t1,t2,t3:std_logic_vector(31 downto 0);
signal state_out: std_logic_vector(127 downto 0);
 
begin
InvSub_addRk_inst:InvSub_addRk
port map(state_in=>cipher,state_out=>state_out,key=>round_key);
inv_mix_column_inst0:inv_mix_column
port map(column=>c0,p0=>p00,p1=>p01,p2=>p02,p3=>p03);
inv_mix_column_inst1:inv_mix_column
port map(column=>c1,p0=>p10,p1=>p11,p2=>p12,p3=>p13);
inv_mix_column_inst2:inv_mix_column
port map(column=>c2,p0=>p20,p1=>p21,p2=>p22,p3=>p23);
inv_mix_column_inst3:inv_mix_column
port map(column=>c3,p0=>p30,p1=>p31,p2=>p32,p3=>p33);
c0<=state_out(127 downto 96);
c1<=state_out(95 downto 64);
c2<=state_out(63 downto 32);
c3<=state_out(31 downto 0);
out0 <= p00 xor p01 xor p02 xor p03;
out1 <= p10 xor p11 xor p12 xor p13;
out2 <= p20 xor p21 xor p22 xor p23;
out3 <= p30 xor p31 xor p32 xor p33;
text_out<=out0 & out1 & out2 & out3;
end beh_one_round_decrypt;
/aes_decry_ip_128bit/trunk/rtl/inv_mix_column.vhd
0,0 → 1,71
--************************************************************
--Copyright 2015, Ganesh Hegde < ghegde@opencores.org >
--
--This source file may be used and distributed without
--restriction provided that this copyright statement is not
--removed from the file and that any derivative work contains
--the original copyright notice and the associated disclaimer.
--
--This source is distributed in the hope that it will be
--useful, but WITHOUT ANY WARRANTY; without even the implied
--warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
--PURPOSE. See the GNU Lesser General Public License for more
--details.
--
--You should have received a copy of the GNU Lesser General
--Public License along with this source; if not, download it
--from http://www.opencores.org/lgpl.shtml
--
--*************************************************************
 
--*************************************************************
--Multiply one column
--
--Logic type : Combinational
--*************************************************************
 
 
library ieee;
use ieee.std_logic_1164.all;
 
entity inv_mix_column is
port(
column: in std_logic_vector(31 downto 0);
p0,p1,p2,p3: out std_logic_vector(31 downto 0)
);
end inv_mix_column;
 
architecture beh_inv_mix_column of inv_mix_column is
component GF_mul
port(
in_byte: in std_logic_vector(7 downto 0);
out_word: out std_logic_vector(31 downto 0)--0x0E,0x09,0x0D,0x0B
);
end component;
 
signal b0,b1,b2,b3: std_logic_vector(7 downto 0);
signal k0,k1,k2,k3: std_logic_vector(31 downto 0);
begin
 
GF_mul_inst1:GF_mul
port map(in_byte=>b0,out_word=>k0);
GF_mul_inst2:GF_mul
port map(in_byte=>b1,out_word=>k1);
GF_mul_inst3:GF_mul
port map(in_byte=>b2,out_word=>k2);
GF_mul_inst4:GF_mul
port map(in_byte=>b3,out_word=>k3);
b0 <= column(31 downto 24);
b1 <= column(23 downto 16);
b2 <= column(15 downto 8);
b3 <= column(7 downto 0);
p0 <= k0;
p1 <= k1(7 downto 0) & k1(31 downto 8);
p2 <= k2(15 downto 0) & k2(31 downto 16);
p3 <= k3(23 downto 0) & k3(31 downto 24);
end beh_inv_mix_column;
/aes_decry_ip_128bit/trunk/rtl/Inv_Sbox.vhd
0,0 → 1,300
--************************************************************
--Copyright 2015, Ganesh Hegde < ghegde@opencores.org >
--
--This source file may be used and distributed without
--restriction provided that this copyright statement is not
--removed from the file and that any derivative work contains
--the original copyright notice and the associated disclaimer.
--
--This source is distributed in the hope that it will be
--useful, but WITHOUT ANY WARRANTY; without even the implied
--warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
--PURPOSE. See the GNU Lesser General Public License for more
--details.
--
--You should have received a copy of the GNU Lesser General
--Public License along with this source; if not, download it
--from http://www.opencores.org/lgpl.shtml
--
--*************************************************************
 
--*************************************************************
--Inverse Sbox applied on input byte.
--Logic type : Combinational
--*************************************************************
 
 
library ieee;
use ieee.std_logic_1164.all;
 
entity Inv_Sbox is
port (
data_in: in std_logic_vector(7 downto 0);
data_out:out std_logic_vector(7 downto 0)
);
end Inv_Sbox;
 
architecture Inv_Sbox_beh of Inv_Sbox is
begin
process(data_in)
begin
case(data_in) is
when x"00"=> data_out<=x"52";
when x"01"=> data_out<=x"09";
when x"02"=> data_out<=x"6a";
when x"03"=> data_out<=x"d5";
when x"04"=> data_out<=x"30";
when x"05"=> data_out<=x"36";
when x"06"=> data_out<=x"a5";
when x"07"=> data_out<=x"38";
when x"08"=> data_out<=x"bf";
when x"09"=> data_out<=x"40";
when x"0a"=> data_out<=x"a3";
when x"0b"=> data_out<=x"9e";
when x"0c"=> data_out<=x"81";
when x"0d"=> data_out<=x"f3";
when x"0e"=> data_out<=x"d7";
when x"0f"=> data_out<=x"fb";
when x"10"=> data_out<=x"7c";
when x"11"=> data_out<=x"e3";
when x"12"=> data_out<=x"39";
when x"13"=> data_out<=x"82";
when x"14"=> data_out<=x"9b";
when x"15"=> data_out<=x"2f";
when x"16"=> data_out<=x"ff";
when x"17"=> data_out<=x"87";
when x"18"=> data_out<=x"34";
when x"19"=> data_out<=x"8e";
when x"1a"=> data_out<=x"43";
when x"1b"=> data_out<=x"44";
when x"1c"=> data_out<=x"c4";
when x"1d"=> data_out<=x"de";
when x"1e"=> data_out<=x"e9";
when x"1f"=> data_out<=x"cb";
when x"20"=> data_out<=x"54";
when x"21"=> data_out<=x"7b";
when x"22"=> data_out<=x"94";
when x"23"=> data_out<=x"32";
when x"24"=> data_out<=x"a6";
when x"25"=> data_out<=x"c2";
when x"26"=> data_out<=x"23";
when x"27"=> data_out<=x"3d";
when x"28"=> data_out<=x"ee";
when x"29"=> data_out<=x"4c";
when x"2a"=> data_out<=x"95";
when x"2b"=> data_out<=x"0b";
when x"2c"=> data_out<=x"42";
when x"2d"=> data_out<=x"fa";
when x"2e"=> data_out<=x"c3";
when x"2f"=> data_out<=x"4e";
when x"30"=> data_out<=x"08";
when x"31"=> data_out<=x"2e";
when x"32"=> data_out<=x"a1";
when x"33"=> data_out<=x"66";
when x"34"=> data_out<=x"28";
when x"35"=> data_out<=x"d9";
when x"36"=> data_out<=x"24";
when x"37"=> data_out<=x"b2";
when x"38"=> data_out<=x"76";
when x"39"=> data_out<=x"5b";
when x"3a"=> data_out<=x"a2";
when x"3b"=> data_out<=x"49";
when x"3c"=> data_out<=x"6d";
when x"3d"=> data_out<=x"8b";
when x"3e"=> data_out<=x"d1";
when x"3f"=> data_out<=x"25";
when x"40"=> data_out<=x"72";
when x"41"=> data_out<=x"f8";
when x"42"=> data_out<=x"f6";
when x"43"=> data_out<=x"64";
when x"44"=> data_out<=x"86";
when x"45"=> data_out<=x"68";
when x"46"=> data_out<=x"98";
when x"47"=> data_out<=x"16";
when x"48"=> data_out<=x"d4";
when x"49"=> data_out<=x"a4";
when x"4a"=> data_out<=x"5c";
when x"4b"=> data_out<=x"cc";
when x"4c"=> data_out<=x"5d";
when x"4d"=> data_out<=x"65";
when x"4e"=> data_out<=x"b6";
when x"4f"=> data_out<=x"92";
when x"50"=> data_out<=x"6c";
when x"51"=> data_out<=x"70";
when x"52"=> data_out<=x"48";
when x"53"=> data_out<=x"50";
when x"54"=> data_out<=x"fd";
when x"55"=> data_out<=x"ed";
when x"56"=> data_out<=x"b9";
when x"57"=> data_out<=x"da";
when x"58"=> data_out<=x"5e";
when x"59"=> data_out<=x"15";
when x"5a"=> data_out<=x"46";
when x"5b"=> data_out<=x"57";
when x"5c"=> data_out<=x"a7";
when x"5d"=> data_out<=x"8d";
when x"5e"=> data_out<=x"9d";
when x"5f"=> data_out<=x"84";
when x"60"=> data_out<=x"90";
when x"61"=> data_out<=x"d8";
when x"62"=> data_out<=x"ab";
when x"63"=> data_out<=x"00";
when x"64"=> data_out<=x"8c";
when x"65"=> data_out<=x"bc";
when x"66"=> data_out<=x"d3";
when x"67"=> data_out<=x"0a";
when x"68"=> data_out<=x"f7";
when x"69"=> data_out<=x"e4";
when x"6a"=> data_out<=x"58";
when x"6b"=> data_out<=x"05";
when x"6c"=> data_out<=x"b8";
when x"6d"=> data_out<=x"b3";
when x"6e"=> data_out<=x"45";
when x"6f"=> data_out<=x"06";
when x"70"=> data_out<=x"d0";
when x"71"=> data_out<=x"2c";
when x"72"=> data_out<=x"1e";
when x"73"=> data_out<=x"8f";
when x"74"=> data_out<=x"ca";
when x"75"=> data_out<=x"3f";
when x"76"=> data_out<=x"0f";
when x"77"=> data_out<=x"02";
when x"78"=> data_out<=x"c1";
when x"79"=> data_out<=x"af";
when x"7a"=> data_out<=x"bd";
when x"7b"=> data_out<=x"03";
when x"7c"=> data_out<=x"01";
when x"7d"=> data_out<=x"13";
when x"7e"=> data_out<=x"8a";
when x"7f"=> data_out<=x"6b";
when x"80"=> data_out<=x"3a";
when x"81"=> data_out<=x"91";
when x"82"=> data_out<=x"11";
when x"83"=> data_out<=x"41";
when x"84"=> data_out<=x"4f";
when x"85"=> data_out<=x"67";
when x"86"=> data_out<=x"dc";
when x"87"=> data_out<=x"ea";
when x"88"=> data_out<=x"97";
when x"89"=> data_out<=x"f2";
when x"8a"=> data_out<=x"cf";
when x"8b"=> data_out<=x"ce";
when x"8c"=> data_out<=x"f0";
when x"8d"=> data_out<=x"b4";
when x"8e"=> data_out<=x"e6";
when x"8f"=> data_out<=x"73";
when x"90"=> data_out<=x"96";
when x"91"=> data_out<=x"ac";
when x"92"=> data_out<=x"74";
when x"93"=> data_out<=x"22";
when x"94"=> data_out<=x"e7";
when x"95"=> data_out<=x"ad";
when x"96"=> data_out<=x"35";
when x"97"=> data_out<=x"85";
when x"98"=> data_out<=x"e2";
when x"99"=> data_out<=x"f9";
when x"9a"=> data_out<=x"37";
when x"9b"=> data_out<=x"e8";
when x"9c"=> data_out<=x"1c";
when x"9d"=> data_out<=x"75";
when x"9e"=> data_out<=x"df";
when x"9f"=> data_out<=x"6e";
when x"a0"=> data_out<=x"47";
when x"a1"=> data_out<=x"f1";
when x"a2"=> data_out<=x"1a";
when x"a3"=> data_out<=x"71";
when x"a4"=> data_out<=x"1d";
when x"a5"=> data_out<=x"29";
when x"a6"=> data_out<=x"c5";
when x"a7"=> data_out<=x"89";
when x"a8"=> data_out<=x"6f";
when x"a9"=> data_out<=x"b7";
when x"aa"=> data_out<=x"62";
when x"ab"=> data_out<=x"0e";
when x"ac"=> data_out<=x"aa";
when x"ad"=> data_out<=x"18";
when x"ae"=> data_out<=x"be";
when x"af"=> data_out<=x"1b";
when x"b0"=> data_out<=x"fc";
when x"b1"=> data_out<=x"56";
when x"b2"=> data_out<=x"3e";
when x"b3"=> data_out<=x"4b";
when x"b4"=> data_out<=x"c6";
when x"b5"=> data_out<=x"d2";
when x"b6"=> data_out<=x"79";
when x"b7"=> data_out<=x"20";
when x"b8"=> data_out<=x"9a";
when x"b9"=> data_out<=x"db";
when x"ba"=> data_out<=x"c0";
when x"bb"=> data_out<=x"fe";
when x"bc"=> data_out<=x"78";
when x"bd"=> data_out<=x"cd";
when x"be"=> data_out<=x"5a";
when x"bf"=> data_out<=x"f4";
when x"c0"=> data_out<=x"1f";
when x"c1"=> data_out<=x"dd";
when x"c2"=> data_out<=x"a8";
when x"c3"=> data_out<=x"33";
when x"c4"=> data_out<=x"88";
when x"c5"=> data_out<=x"07";
when x"c6"=> data_out<=x"c7";
when x"c7"=> data_out<=x"31";
when x"c8"=> data_out<=x"b1";
when x"c9"=> data_out<=x"12";
when x"ca"=> data_out<=x"10";
when x"cb"=> data_out<=x"59";
when x"cc"=> data_out<=x"27";
when x"cd"=> data_out<=x"80";
when x"ce"=> data_out<=x"ec";
when x"cf"=> data_out<=x"5f";
when x"d0"=> data_out<=x"60";
when x"d1"=> data_out<=x"51";
when x"d2"=> data_out<=x"7f";
when x"d3"=> data_out<=x"a9";
when x"d4"=> data_out<=x"19";
when x"d5"=> data_out<=x"b5";
when x"d6"=> data_out<=x"4a";
when x"d7"=> data_out<=x"0d";
when x"d8"=> data_out<=x"2d";
when x"d9"=> data_out<=x"e5";
when x"da"=> data_out<=x"7a";
when x"db"=> data_out<=x"9f";
when x"dc"=> data_out<=x"93";
when x"dd"=> data_out<=x"c9";
when x"de"=> data_out<=x"9c";
when x"df"=> data_out<=x"ef";
when x"e0"=> data_out<=x"a0";
when x"e1"=> data_out<=x"e0";
when x"e2"=> data_out<=x"3b";
when x"e3"=> data_out<=x"4d";
when x"e4"=> data_out<=x"ae";
when x"e5"=> data_out<=x"2a";
when x"e6"=> data_out<=x"f5";
when x"e7"=> data_out<=x"b0";
when x"e8"=> data_out<=x"c8";
when x"e9"=> data_out<=x"eb";
when x"ea"=> data_out<=x"bb";
when x"eb"=> data_out<=x"3c";
when x"ec"=> data_out<=x"83";
when x"ed"=> data_out<=x"53";
when x"ee"=> data_out<=x"99";
when x"ef"=> data_out<=x"61";
when x"f0"=> data_out<=x"17";
when x"f1"=> data_out<=x"2b";
when x"f2"=> data_out<=x"04";
when x"f3"=> data_out<=x"7e";
when x"f4"=> data_out<=x"ba";
when x"f5"=> data_out<=x"77";
when x"f6"=> data_out<=x"d6";
when x"f7"=> data_out<=x"26";
when x"f8"=> data_out<=x"e1";
when x"f9"=> data_out<=x"69";
when x"fa"=> data_out<=x"14";
when x"fb"=> data_out<=x"63";
when x"fc"=> data_out<=x"55";
when x"fd"=> data_out<=x"21";
when x"fe"=> data_out<=x"0c";
when others=> data_out<=x"7d";
end case;
end process;
end Inv_Sbox_beh;
/aes_decry_ip_128bit/trunk/rtl/key_schd/one_round_key.vhd
0,0 → 1,67
--************************************************************
--Copyright 2015, Ganesh Hegde < ghegde@opencores.org >
--
--This source file may be used and distributed without
--restriction provided that this copyright statement is not
--removed from the file and that any derivative work contains
--the original copyright notice and the associated disclaimer.
--
--This source is distributed in the hope that it will be
--useful, but WITHOUT ANY WARRANTY; without even the implied
--warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
--PURPOSE. See the GNU Lesser General Public License for more
--details.
--
--You should have received a copy of the GNU Lesser General
--Public License along with this source; if not, download it
--from http://www.opencores.org/lgpl.shtml
--
--*************************************************************
 
--*************************************************************
--This module generates one 128 bit key for next round given the current key as input.
--Logic type : Combinational
--*************************************************************
 
library ieee;
use ieee.std_logic_1164.all;
 
entity one_round_key is
port(
in_key: in std_logic_vector(127 downto 0);
out_key: out std_logic_vector(127 downto 0);
rcon: in std_logic_vector(7 downto 0)
);
end one_round_key;
 
architecture beh_one_round_key of one_round_key is
component Sub_4bytes
port(
word_in: in std_logic_vector(31 downto 0);
word_out: out std_logic_vector(31 downto 0)
);
end component;
 
signal k0,k1,k2,k3: std_logic_vector(31 downto 0);
signal k0out,k1out,k2out,k3out: std_logic_vector(31 downto 0);
signal k3_rot_sub,k3_rot:std_logic_vector(31 downto 0);
 
begin
k0 <= in_key(127 downto 96);
k1 <= in_key(95 downto 64);
k2 <= in_key(63 downto 32);
k3 <= in_key(31 downto 0);
k3_rot <= k3(23 downto 0) & k3(31 downto 24);
Sub_4bytes_inst:Sub_4bytes
port map(word_in=>k3_rot,word_out=>k3_rot_sub);
k0out <= k3_rot_sub xor k0 xor (rcon & x"000000");
k1out <= k0out xor k1;
k2out <= k1out xor k2;
k3out <= k2out xor k3;
out_key <= k0out & k1out & k2out & k3out;
end beh_one_round_key;
/aes_decry_ip_128bit/trunk/rtl/key_schd/Sub_4bytes.vhd
0,0 → 1,59
--************************************************************
--Copyright 2015, Ganesh Hegde < ghegde@opencores.org >
--
--This source file may be used and distributed without
--restriction provided that this copyright statement is not
--removed from the file and that any derivative work contains
--the original copyright notice and the associated disclaimer.
--
--This source is distributed in the hope that it will be
--useful, but WITHOUT ANY WARRANTY; without even the implied
--warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
--PURPOSE. See the GNU Lesser General Public License for more
--details.
--
--You should have received a copy of the GNU Lesser General
--Public License along with this source; if not, download it
--from http://www.opencores.org/lgpl.shtml
--
--*************************************************************
 
--*************************************************************
--This module will perform byte substitution for the given input word.
--Logic type : Combinational
--*************************************************************
 
library ieee;
use ieee.std_logic_1164.all;
 
entity Sub_4bytes is
port(
word_in: in std_logic_vector(31 downto 0);
word_out: out std_logic_vector(31 downto 0)
);
end Sub_4bytes;
 
architecture Sub_4bytes_beh of Sub_4bytes is
signal b0,b1,b2,b3: std_logic_vector(7 downto 0);
component Sbox
port (
data_in: in std_logic_vector(7 downto 0);
data_out:out std_logic_vector(7 downto 0)
);
end component;
begin
b0<=word_in(31 downto 24);
b1<=word_in(23 downto 16);
b2<=word_in(15 downto 8);
b3<=word_in(7 downto 0);
Inst1:Sbox
port map(data_in=>b0,data_out=>word_out(31 downto 24));
Inst2:Sbox
port map(data_in=>b1,data_out=>word_out(23 downto 16));
Inst3:Sbox
port map(data_in=>b2,data_out=>word_out(15 downto 8));
Inst4:Sbox
port map(data_in=>b3,data_out=>word_out(7 downto 0));
end Sub_4bytes_beh;
/aes_decry_ip_128bit/trunk/rtl/key_schd/singleport_RAM.vhd
0,0 → 1,68
--************************************************************
--Copyright 2015, Ganesh Hegde < ghegde@opencores.org >
--
--This source file may be used and distributed without
--restriction provided that this copyright statement is not
--removed from the file and that any derivative work contains
--the original copyright notice and the associated disclaimer.
--
--This source is distributed in the hope that it will be
--useful, but WITHOUT ANY WARRANTY; without even the implied
--warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
--PURPOSE. See the GNU Lesser General Public License for more
--details.
--
--You should have received a copy of the GNU Lesser General
--Public License along with this source; if not, download it
--from http://www.opencores.org/lgpl.shtml
--
--*************************************************************
 
--*************************************************************
-- Single port RAM module.
--Write latency : 1 clock cycle
-- Read latency : One clock cycle is consumed to register the address.
-- Data is valid there after.
--Logic type : Sequential
--*************************************************************
 
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
 
entity singleport_RAM is
port(
datain : in std_logic_vector(127 downto 0);
addr : in std_logic_vector(3 downto 0);
we,clk : in std_logic;
dataout: out std_logic_vector(127 downto 0)
);
end singleport_RAM;
 
architecture beh_singleport_RAM of singleport_RAM is
 
-- Build a 2-D array type for the RAM
subtype word_t is std_logic_vector(127 downto 0);
type memory is array (15 downto 0) of word_t;
-- Declare the RAM signal.
signal RAM:memory;
-- Register to hold the address
signal addr_reg : natural range 0 to 15;
signal ram_addr :natural range 0 to 15;
 
begin
process(clk)
begin
if clk'event and clk='1' then
if(we='1') then
RAM(ram_addr)<= datain;
end if;
-- Register the address for reading
addr_reg <= ram_addr;
end if;
end process;
dataout <= RAM(addr_reg);
ram_addr <= to_integer(unsigned(addr));
end beh_singleport_RAM;
/aes_decry_ip_128bit/trunk/rtl/key_schd/key_scheduler.vhd
0,0 → 1,151
--************************************************************
--Copyright 2015, Ganesh Hegde < ghegde@opencores.org >
--
--This source file may be used and distributed without
--restriction provided that this copyright statement is not
--removed from the file and that any derivative work contains
--the original copyright notice and the associated disclaimer.
--
--This source is distributed in the hope that it will be
--useful, but WITHOUT ANY WARRANTY; without even the implied
--warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
--PURPOSE. See the GNU Lesser General Public License for more
--details.
--
--You should have received a copy of the GNU Lesser General
--Public License along with this source; if not, download it
--from http://www.opencores.org/lgpl.shtml
--
--*************************************************************
 
--*************************************************************
--Top level entity for key scheduling.
--Note that module does not support reconfigurable key.To change
-- the key the module has to undergo a reset.
--Logic type : Sequential (11 cycle latency for the key to be ready)
--*************************************************************
 
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
 
entity key_scheduler is
port(
key_in : in std_logic_vector(127 downto 0);--Decryption Key
key_out : out std_logic_vector(127 downto 0);--Output key(one cycle delay)
valid_in : in std_logic;--Should be high when input key is valid
key_ready : out std_logic;--Asserted high when key_scheduler generated all the keys
round: in std_logic_vector(3 downto 0);--Which round key to access
clk,reset: in std_logic
);
end key_scheduler;
 
architecture beh_key_scheduler of key_scheduler is
--Single port RAM module 16x128
component singleport_RAM
port(
datain : in std_logic_vector(127 downto 0);
addr : in std_logic_vector(3 downto 0);
we,clk : in std_logic;
dataout: out std_logic_vector(127 downto 0)
);
end component;
component one_round_key
port(
in_key: in std_logic_vector(127 downto 0);
out_key: out std_logic_vector(127 downto 0);
rcon: in std_logic_vector(7 downto 0)
);
end component;
type state is (IDLE,ROUNDKEY,READY);
signal state_n,state_reg: state;
--RAM signals
signal we :std_logic;
signal ram_data_in,ram_data_out:std_logic_vector(127 downto 0);
signal ram_addr:std_logic_vector(3 downto 0);
--one_round_key signals
signal rcon_in : std_logic_vector(7 downto 0);
signal out_key : std_logic_vector(127 downto 0);
signal count_reg,count_n:unsigned(3 downto 0);
begin
--Instantiate single port RAM
singleport_RAM_inst:singleport_RAM
port map(datain=>ram_data_in,dataout=>ram_data_out,addr=>ram_addr,clk=>clk,we=>we);
--Instantiate round key calculator
one_round_key_inst:one_round_key
port map(in_key=>ram_data_out,out_key=>out_key,rcon=>rcon_in);
--State register
process(clk,reset)
begin
if(reset='1') then --Active High reset
state_reg<=IDLE;
count_reg<="1010";--10
elsif(clk'event and clk='1') then
state_reg <= state_n;
count_reg <= count_n;
end if;
end process;
--Next state logic
process(state_reg,valid_in,count_reg)
begin
case state_reg is
when IDLE =>
if(valid_in='1') then
count_n<=count_reg-1;
state_n<=ROUNDKEY;
else
state_n<=state_reg;
count_n<=count_reg;
end if;
when ROUNDKEY =>
if(count_reg = "0000") then
state_n<=READY;
count_n<=count_reg;
else
count_n<=count_reg-1;
state_n<=state_reg;
end if;
when READY=>
state_n<=state_reg;
count_n<=count_reg;
--No error case handle
end case;
end process;
 
--Output logic
with state_reg select
ram_data_in <= key_in when IDLE,
out_key when others;
we <= '1' when (state_reg=IDLE or state_reg = ROUNDKEY) else
'0';
with state_reg select
ram_addr <= std_logic_vector(count_reg) when IDLE,
std_logic_vector(count_reg) when ROUNDKEY,
round when others;
key_out <= ram_data_out;--Output is valid after one cycle.
key_ready<= '1' when state_reg = READY else
'0';
with count_reg select
rcon_in <= x"01" when "1001",
x"02" when "1000",
x"04" when "0111",
x"08" when "0110",
x"10" when "0101",
x"20" when "0100",
x"40" when "0011",
x"80" when "0010",
x"1B" when "0001",
x"36" when others;
end beh_key_scheduler;
/aes_decry_ip_128bit/trunk/rtl/key_schd/Redme.txt
0,0 → 1,151
This folder has RTL code for key scheduler.
/aes_decry_ip_128bit/trunk/rtl/key_schd/Sbox.vhd
0,0 → 1,302
--************************************************************
--Copyright 2015, Ganesh Hegde < ghegde@opencores.org >
--
--This source file may be used and distributed without
--restriction provided that this copyright statement is not
--removed from the file and that any derivative work contains
--the original copyright notice and the associated disclaimer.
--
--This source is distributed in the hope that it will be
--useful, but WITHOUT ANY WARRANTY; without even the implied
--warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
--PURPOSE. See the GNU Lesser General Public License for more
--details.
--
--You should have received a copy of the GNU Lesser General
--Public License along with this source; if not, download it
--from http://www.opencores.org/lgpl.shtml
--
--*************************************************************
 
--*************************************************************
--Inverse Sbox substitution given the input byte.
--Logic type : Combinational.
--*************************************************************
 
 
--Latency: 0 Cycles
 
library ieee;
use ieee.std_logic_1164.all;
 
entity Sbox is
port (
data_in: in std_logic_vector(7 downto 0);
data_out:out std_logic_vector(7 downto 0)
);
end Sbox;
 
architecture Sbox_beh of Sbox is
begin
process(data_in)
begin
case(data_in) is
when x"00"=> data_out<=x"63";
when x"01"=> data_out<=x"7c";
when x"02"=> data_out<=x"77";
when x"03"=> data_out<=x"7b";
when x"04"=> data_out<=x"f2";
when x"05"=> data_out<=x"6b";
when x"06"=> data_out<=x"6f";
when x"07"=> data_out<=x"c5";
when x"08"=> data_out<=x"30";
when x"09"=> data_out<=x"01";
when x"0a"=> data_out<=x"67";
when x"0b"=> data_out<=x"2b";
when x"0c"=> data_out<=x"fe";
when x"0d"=> data_out<=x"d7";
when x"0e"=> data_out<=x"ab";
when x"0f"=> data_out<=x"76";
when x"10"=> data_out<=x"ca";
when x"11"=> data_out<=x"82";
when x"12"=> data_out<=x"c9";
when x"13"=> data_out<=x"7d";
when x"14"=> data_out<=x"fa";
when x"15"=> data_out<=x"59";
when x"16"=> data_out<=x"47";
when x"17"=> data_out<=x"f0";
when x"18"=> data_out<=x"ad";
when x"19"=> data_out<=x"d4";
when x"1a"=> data_out<=x"a2";
when x"1b"=> data_out<=x"af";
when x"1c"=> data_out<=x"9c";
when x"1d"=> data_out<=x"a4";
when x"1e"=> data_out<=x"72";
when x"1f"=> data_out<=x"c0";
when x"20"=> data_out<=x"b7";
when x"21"=> data_out<=x"fd";
when x"22"=> data_out<=x"93";
when x"23"=> data_out<=x"26";
when x"24"=> data_out<=x"36";
when x"25"=> data_out<=x"3f";
when x"26"=> data_out<=x"f7";
when x"27"=> data_out<=x"cc";
when x"28"=> data_out<=x"34";
when x"29"=> data_out<=x"a5";
when x"2a"=> data_out<=x"e5";
when x"2b"=> data_out<=x"f1";
when x"2c"=> data_out<=x"71";
when x"2d"=> data_out<=x"d8";
when x"2e"=> data_out<=x"31";
when x"2f"=> data_out<=x"15";
when x"30"=> data_out<=x"04";
when x"31"=> data_out<=x"c7";
when x"32"=> data_out<=x"23";
when x"33"=> data_out<=x"c3";
when x"34"=> data_out<=x"18";
when x"35"=> data_out<=x"96";
when x"36"=> data_out<=x"05";
when x"37"=> data_out<=x"9a";
when x"38"=> data_out<=x"07";
when x"39"=> data_out<=x"12";
when x"3a"=> data_out<=x"80";
when x"3b"=> data_out<=x"e2";
when x"3c"=> data_out<=x"eb";
when x"3d"=> data_out<=x"27";
when x"3e"=> data_out<=x"b2";
when x"3f"=> data_out<=x"75";
when x"40"=> data_out<=x"09";
when x"41"=> data_out<=x"83";
when x"42"=> data_out<=x"2c";
when x"43"=> data_out<=x"1a";
when x"44"=> data_out<=x"1b";
when x"45"=> data_out<=x"6e";
when x"46"=> data_out<=x"5a";
when x"47"=> data_out<=x"a0";
when x"48"=> data_out<=x"52";
when x"49"=> data_out<=x"3b";
when x"4a"=> data_out<=x"d6";
when x"4b"=> data_out<=x"b3";
when x"4c"=> data_out<=x"29";
when x"4d"=> data_out<=x"e3";
when x"4e"=> data_out<=x"2f";
when x"4f"=> data_out<=x"84";
when x"50"=> data_out<=x"53";
when x"51"=> data_out<=x"d1";
when x"52"=> data_out<=x"00";
when x"53"=> data_out<=x"ed";
when x"54"=> data_out<=x"20";
when x"55"=> data_out<=x"fc";
when x"56"=> data_out<=x"b1";
when x"57"=> data_out<=x"5b";
when x"58"=> data_out<=x"6a";
when x"59"=> data_out<=x"cb";
when x"5a"=> data_out<=x"be";
when x"5b"=> data_out<=x"39";
when x"5c"=> data_out<=x"4a";
when x"5d"=> data_out<=x"4c";
when x"5e"=> data_out<=x"58";
when x"5f"=> data_out<=x"cf";
when x"60"=> data_out<=x"d0";
when x"61"=> data_out<=x"ef";
when x"62"=> data_out<=x"aa";
when x"63"=> data_out<=x"fb";
when x"64"=> data_out<=x"43";
when x"65"=> data_out<=x"4d";
when x"66"=> data_out<=x"33";
when x"67"=> data_out<=x"85";
when x"68"=> data_out<=x"45";
when x"69"=> data_out<=x"f9";
when x"6a"=> data_out<=x"02";
when x"6b"=> data_out<=x"7f";
when x"6c"=> data_out<=x"50";
when x"6d"=> data_out<=x"3c";
when x"6e"=> data_out<=x"9f";
when x"6f"=> data_out<=x"a8";
when x"70"=> data_out<=x"51";
when x"71"=> data_out<=x"a3";
when x"72"=> data_out<=x"40";
when x"73"=> data_out<=x"8f";
when x"74"=> data_out<=x"92";
when x"75"=> data_out<=x"9d";
when x"76"=> data_out<=x"38";
when x"77"=> data_out<=x"f5";
when x"78"=> data_out<=x"bc";
when x"79"=> data_out<=x"b6";
when x"7a"=> data_out<=x"da";
when x"7b"=> data_out<=x"21";
when x"7c"=> data_out<=x"10";
when x"7d"=> data_out<=x"ff";
when x"7e"=> data_out<=x"f3";
when x"7f"=> data_out<=x"d2";
when x"80"=> data_out<=x"cd";
when x"81"=> data_out<=x"0c";
when x"82"=> data_out<=x"13";
when x"83"=> data_out<=x"ec";
when x"84"=> data_out<=x"5f";
when x"85"=> data_out<=x"97";
when x"86"=> data_out<=x"44";
when x"87"=> data_out<=x"17";
when x"88"=> data_out<=x"c4";
when x"89"=> data_out<=x"a7";
when x"8a"=> data_out<=x"7e";
when x"8b"=> data_out<=x"3d";
when x"8c"=> data_out<=x"64";
when x"8d"=> data_out<=x"5d";
when x"8e"=> data_out<=x"19";
when x"8f"=> data_out<=x"73";
when x"90"=> data_out<=x"60";
when x"91"=> data_out<=x"81";
when x"92"=> data_out<=x"4f";
when x"93"=> data_out<=x"dc";
when x"94"=> data_out<=x"22";
when x"95"=> data_out<=x"2a";
when x"96"=> data_out<=x"90";
when x"97"=> data_out<=x"88";
when x"98"=> data_out<=x"46";
when x"99"=> data_out<=x"ee";
when x"9a"=> data_out<=x"b8";
when x"9b"=> data_out<=x"14";
when x"9c"=> data_out<=x"de";
when x"9d"=> data_out<=x"5e";
when x"9e"=> data_out<=x"0b";
when x"9f"=> data_out<=x"db";
when x"a0"=> data_out<=x"e0";
when x"a1"=> data_out<=x"32";
when x"a2"=> data_out<=x"3a";
when x"a3"=> data_out<=x"0a";
when x"a4"=> data_out<=x"49";
when x"a5"=> data_out<=x"06";
when x"a6"=> data_out<=x"24";
when x"a7"=> data_out<=x"5c";
when x"a8"=> data_out<=x"c2";
when x"a9"=> data_out<=x"d3";
when x"aa"=> data_out<=x"ac";
when x"ab"=> data_out<=x"62";
when x"ac"=> data_out<=x"91";
when x"ad"=> data_out<=x"95";
when x"ae"=> data_out<=x"e4";
when x"af"=> data_out<=x"79";
when x"b0"=> data_out<=x"e7";
when x"b1"=> data_out<=x"c8";
when x"b2"=> data_out<=x"37";
when x"b3"=> data_out<=x"6d";
when x"b4"=> data_out<=x"8d";
when x"b5"=> data_out<=x"d5";
when x"b6"=> data_out<=x"4e";
when x"b7"=> data_out<=x"a9";
when x"b8"=> data_out<=x"6c";
when x"b9"=> data_out<=x"56";
when x"ba"=> data_out<=x"f4";
when x"bb"=> data_out<=x"ea";
when x"bc"=> data_out<=x"65";
when x"bd"=> data_out<=x"7a";
when x"be"=> data_out<=x"ae";
when x"bf"=> data_out<=x"08";
when x"c0"=> data_out<=x"ba";
when x"c1"=> data_out<=x"78";
when x"c2"=> data_out<=x"25";
when x"c3"=> data_out<=x"2e";
when x"c4"=> data_out<=x"1c";
when x"c5"=> data_out<=x"a6";
when x"c6"=> data_out<=x"b4";
when x"c7"=> data_out<=x"c6";
when x"c8"=> data_out<=x"e8";
when x"c9"=> data_out<=x"dd";
when x"ca"=> data_out<=x"74";
when x"cb"=> data_out<=x"1f";
when x"cc"=> data_out<=x"4b";
when x"cd"=> data_out<=x"bd";
when x"ce"=> data_out<=x"8b";
when x"cf"=> data_out<=x"8a";
when x"d0"=> data_out<=x"70";
when x"d1"=> data_out<=x"3e";
when x"d2"=> data_out<=x"b5";
when x"d3"=> data_out<=x"66";
when x"d4"=> data_out<=x"48";
when x"d5"=> data_out<=x"03";
when x"d6"=> data_out<=x"f6";
when x"d7"=> data_out<=x"0e";
when x"d8"=> data_out<=x"61";
when x"d9"=> data_out<=x"35";
when x"da"=> data_out<=x"57";
when x"db"=> data_out<=x"b9";
when x"dc"=> data_out<=x"86";
when x"dd"=> data_out<=x"c1";
when x"de"=> data_out<=x"1d";
when x"df"=> data_out<=x"9e";
when x"e0"=> data_out<=x"e1";
when x"e1"=> data_out<=x"f8";
when x"e2"=> data_out<=x"98";
when x"e3"=> data_out<=x"11";
when x"e4"=> data_out<=x"69";
when x"e5"=> data_out<=x"d9";
when x"e6"=> data_out<=x"8e";
when x"e7"=> data_out<=x"94";
when x"e8"=> data_out<=x"9b";
when x"e9"=> data_out<=x"1e";
when x"ea"=> data_out<=x"87";
when x"eb"=> data_out<=x"e9";
when x"ec"=> data_out<=x"ce";
when x"ed"=> data_out<=x"55";
when x"ee"=> data_out<=x"28";
when x"ef"=> data_out<=x"df";
when x"f0"=> data_out<=x"8c";
when x"f1"=> data_out<=x"a1";
when x"f2"=> data_out<=x"89";
when x"f3"=> data_out<=x"0d";
when x"f4"=> data_out<=x"bf";
when x"f5"=> data_out<=x"e6";
when x"f6"=> data_out<=x"42";
when x"f7"=> data_out<=x"68";
when x"f8"=> data_out<=x"41";
when x"f9"=> data_out<=x"99";
when x"fa"=> data_out<=x"2d";
when x"fb"=> data_out<=x"0f";
when x"fc"=> data_out<=x"b0";
when x"fd"=> data_out<=x"54";
when x"fe"=> data_out<=x"bb";
when others=> data_out<=x"16";
end case;
end process;
end Sbox_beh;
/aes_decry_ip_128bit/trunk/rtl/AES_decrypter.vhd
0,0 → 1,158
--************************************************************
--Copyright 2015, Ganesh Hegde < ghegde@opencores.org >
--
--This source file may be used and distributed without
--restriction provided that this copyright statement is not
--removed from the file and that any derivative work contains
--the original copyright notice and the associated disclaimer.
--
--This source is distributed in the hope that it will be
--useful, but WITHOUT ANY WARRANTY; without even the implied
--warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
--PURPOSE. See the GNU Lesser General Public License for more
--details.
--
--You should have received a copy of the GNU Lesser General
--Public License along with this source; if not, download it
--from http://www.opencores.org/lgpl.shtml
--
--*************************************************************
 
--*************************************************************
--Top level entity for AES decryption IP.
--*************************************************************
 
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
 
entity AES_decrypter is
port(
cipher: in std_logic_vector(127 downto 0); --Cipher text
text_out: out std_logic_vector(127 downto 0); -- Decrypted output
key: in std_logic_vector(127 downto 0); --Cipher Key
k_valid,c_valid: in std_logic;--Asserted when either key, cipher is valid
ready:out std_logic;--Asserted high when IP is ready to accept the data(key or Cipher)
out_valid: out std_logic;--out_valid:Asserted high when decrypted cipher is on the bus.(IMP : **Output is valid only for one cycle)
clk,reset: in std_logic
);
end AES_decrypter;
 
architecture beh_AES_decrypter of AES_decrypter is
component key_scheduler
port(
key_in : in std_logic_vector(127 downto 0);--Decryption Key
key_out : out std_logic_vector(127 downto 0);
valid_in : in std_logic;--Should be high when input key is valid
key_ready : out std_logic;--Asserted high when key_scheduler generated all the keys
round: in std_logic_vector(3 downto 0);--Which round key to access
clk,reset: in std_logic
);
end component;
component one_round_decrypt
port(
cipher : in std_logic_vector(127 downto 0);
text_out: out std_logic_vector(127 downto 0);
round_key: in std_logic_vector(127 downto 0)
);
end component;
component InvSub_addRk
port(
state_in : in std_logic_vector(127 downto 0);
state_out : out std_logic_vector(127 downto 0);
key : in std_logic_vector(127 downto 0)
);
end component;
 
type state is (IDLE,KEYGEN,GETKY0,ROUND,FINALR,DELAY);
signal state_reg,state_n: state;
signal round_reg:unsigned(3 downto 0);
signal KS_key_ready:std_logic;
signal KS_key_out:std_logic_vector(127 downto 0);
signal KS_round:unsigned(3 downto 0);
signal one_round_out:std_logic_vector(127 downto 0);
signal cipher_reg,cipher_n,cipher_round0: std_logic_vector(127 downto 0);
begin
key_scheduler_inst:key_scheduler
port map(key_in=>key,key_out=>KS_key_out,valid_in=>k_valid,key_ready=>KS_key_ready,round=>std_logic_vector(KS_round),clk=>clk,reset=>reset);
one_round_decrypt_inst:one_round_decrypt
port map(cipher=>cipher_reg,text_out=>one_round_out,round_key=>KS_key_out);
InvSub_addRk_inst:InvSub_addRk
port map(state_in=>cipher_reg,state_out=>text_out,key=>KS_key_out);
--State register logic
process(clk,reset)
begin
if(reset='1') then
state_reg <= IDLE;
round_reg<=(others=>'0');
cipher_reg<=(others=>'0');
elsif(clk ' event and clk='1') then
state_reg <= state_n;
round_reg<=KS_round+1;
cipher_reg<=cipher_n;
end if;
end process;
--Next state logic
process(state_reg,c_valid,KS_key_ready,k_valid,round_reg)
begin
case state_reg is
when IDLE =>
if(k_valid='1') then
state_n <= KEYGEN;
else
state_n <= IDLE;
end if;
when KEYGEN =>
if(KS_key_ready='1') then
state_n <= GETKY0;--Unnecessary delay here??????
else
state_n <= KEYGEN;
end if;
when GETKY0 =>
if(c_valid='1') then
state_n<=DELAY;
else
state_n<=GETKY0;
end if;
when DELAY =>
state_n <= ROUND;
when ROUND=>
if(round_reg="1010") then
state_n<=FINALR;
else
state_n<=ROUND;
end if;
when FINALR=>
state_n<=GETKY0;
end case;
end process;
cipher_round0 <= KS_key_out xor cipher;
with state_reg select
KS_round <= "0000" when GETKY0,
round_reg when DELAY,
round_reg when ROUND,
"1010" when others;
with state_reg select
cipher_n <= cipher_round0 when DELAY,
one_round_out when others;
out_valid<='1' when state_reg=FINALR else
'0';
ready<='1' when state_reg=GETKY0 or state_reg=IDLE else
'0' ;
end beh_AES_decrypter;
/aes_decry_ip_128bit/trunk/rtl/xB.vhd
0,0 → 1,300
--************************************************************
--Copyright 2015, Ganesh Hegde < ghegde@opencores.org >
--
--This source file may be used and distributed without
--restriction provided that this copyright statement is not
--removed from the file and that any derivative work contains
--the original copyright notice and the associated disclaimer.
--
--This source is distributed in the hope that it will be
--useful, but WITHOUT ANY WARRANTY; without even the implied
--warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
--PURPOSE. See the GNU Lesser General Public License for more
--details.
--
--You should have received a copy of the GNU Lesser General
--Public License along with this source; if not, download it
--from http://www.opencores.org/lgpl.shtml
--
--*************************************************************
 
--*************************************************************
-- GF multiplication of input byte by 0xB
--Logic type : Combinational
--*************************************************************
library ieee;
use ieee.std_logic_1164.all;
 
entity xB is
port (
--clk,reset : in std_logic;
data_in: in std_logic_vector(7 downto 0);
data_out:out std_logic_vector(7 downto 0)
);
end xB;
 
architecture beh_xB of xB is
begin
process(data_in)
begin
case(data_in) is
when x"00"=> data_out<=x"00";
when x"01"=> data_out<=x"0b";
when x"02"=> data_out<=x"16";
when x"03"=> data_out<=x"1d";
when x"04"=> data_out<=x"2c";
when x"05"=> data_out<=x"27";
when x"06"=> data_out<=x"3a";
when x"07"=> data_out<=x"31";
when x"08"=> data_out<=x"58";
when x"09"=> data_out<=x"53";
when x"0a"=> data_out<=x"4e";
when x"0b"=> data_out<=x"45";
when x"0c"=> data_out<=x"74";
when x"0d"=> data_out<=x"7f";
when x"0e"=> data_out<=x"62";
when x"0f"=> data_out<=x"69";
when x"10"=> data_out<=x"b0";
when x"11"=> data_out<=x"bb";
when x"12"=> data_out<=x"a6";
when x"13"=> data_out<=x"ad";
when x"14"=> data_out<=x"9c";
when x"15"=> data_out<=x"97";
when x"16"=> data_out<=x"8a";
when x"17"=> data_out<=x"81";
when x"18"=> data_out<=x"e8";
when x"19"=> data_out<=x"e3";
when x"1a"=> data_out<=x"fe";
when x"1b"=> data_out<=x"f5";
when x"1c"=> data_out<=x"c4";
when x"1d"=> data_out<=x"cf";
when x"1e"=> data_out<=x"d2";
when x"1f"=> data_out<=x"d9";
when x"20"=> data_out<=x"7b";
when x"21"=> data_out<=x"70";
when x"22"=> data_out<=x"6d";
when x"23"=> data_out<=x"66";
when x"24"=> data_out<=x"57";
when x"25"=> data_out<=x"5c";
when x"26"=> data_out<=x"41";
when x"27"=> data_out<=x"4a";
when x"28"=> data_out<=x"23";
when x"29"=> data_out<=x"28";
when x"2a"=> data_out<=x"35";
when x"2b"=> data_out<=x"3e";
when x"2c"=> data_out<=x"0f";
when x"2d"=> data_out<=x"04";
when x"2e"=> data_out<=x"19";
when x"2f"=> data_out<=x"12";
when x"30"=> data_out<=x"cb";
when x"31"=> data_out<=x"c0";
when x"32"=> data_out<=x"dd";
when x"33"=> data_out<=x"d6";
when x"34"=> data_out<=x"e7";
when x"35"=> data_out<=x"ec";
when x"36"=> data_out<=x"f1";
when x"37"=> data_out<=x"fa";
when x"38"=> data_out<=x"93";
when x"39"=> data_out<=x"98";
when x"3a"=> data_out<=x"85";
when x"3b"=> data_out<=x"8e";
when x"3c"=> data_out<=x"bf";
when x"3d"=> data_out<=x"b4";
when x"3e"=> data_out<=x"a9";
when x"3f"=> data_out<=x"a2";
when x"40"=> data_out<=x"f6";
when x"41"=> data_out<=x"fd";
when x"42"=> data_out<=x"e0";
when x"43"=> data_out<=x"eb";
when x"44"=> data_out<=x"da";
when x"45"=> data_out<=x"d1";
when x"46"=> data_out<=x"cc";
when x"47"=> data_out<=x"c7";
when x"48"=> data_out<=x"ae";
when x"49"=> data_out<=x"a5";
when x"4a"=> data_out<=x"b8";
when x"4b"=> data_out<=x"b3";
when x"4c"=> data_out<=x"82";
when x"4d"=> data_out<=x"89";
when x"4e"=> data_out<=x"94";
when x"4f"=> data_out<=x"9f";
when x"50"=> data_out<=x"46";
when x"51"=> data_out<=x"4d";
when x"52"=> data_out<=x"50";
when x"53"=> data_out<=x"5b";
when x"54"=> data_out<=x"6a";
when x"55"=> data_out<=x"61";
when x"56"=> data_out<=x"7c";
when x"57"=> data_out<=x"77";
when x"58"=> data_out<=x"1e";
when x"59"=> data_out<=x"15";
when x"5a"=> data_out<=x"08";
when x"5b"=> data_out<=x"03";
when x"5c"=> data_out<=x"32";
when x"5d"=> data_out<=x"39";
when x"5e"=> data_out<=x"24";
when x"5f"=> data_out<=x"2f";
when x"60"=> data_out<=x"8d";
when x"61"=> data_out<=x"86";
when x"62"=> data_out<=x"9b";
when x"63"=> data_out<=x"90";
when x"64"=> data_out<=x"a1";
when x"65"=> data_out<=x"aa";
when x"66"=> data_out<=x"b7";
when x"67"=> data_out<=x"bc";
when x"68"=> data_out<=x"d5";
when x"69"=> data_out<=x"de";
when x"6a"=> data_out<=x"c3";
when x"6b"=> data_out<=x"c8";
when x"6c"=> data_out<=x"f9";
when x"6d"=> data_out<=x"f2";
when x"6e"=> data_out<=x"ef";
when x"6f"=> data_out<=x"e4";
when x"70"=> data_out<=x"3d";
when x"71"=> data_out<=x"36";
when x"72"=> data_out<=x"2b";
when x"73"=> data_out<=x"20";
when x"74"=> data_out<=x"11";
when x"75"=> data_out<=x"1a";
when x"76"=> data_out<=x"07";
when x"77"=> data_out<=x"0c";
when x"78"=> data_out<=x"65";
when x"79"=> data_out<=x"6e";
when x"7a"=> data_out<=x"73";
when x"7b"=> data_out<=x"78";
when x"7c"=> data_out<=x"49";
when x"7d"=> data_out<=x"42";
when x"7e"=> data_out<=x"5f";
when x"7f"=> data_out<=x"54";
when x"80"=> data_out<=x"f7";
when x"81"=> data_out<=x"fc";
when x"82"=> data_out<=x"e1";
when x"83"=> data_out<=x"ea";
when x"84"=> data_out<=x"db";
when x"85"=> data_out<=x"d0";
when x"86"=> data_out<=x"cd";
when x"87"=> data_out<=x"c6";
when x"88"=> data_out<=x"af";
when x"89"=> data_out<=x"a4";
when x"8a"=> data_out<=x"b9";
when x"8b"=> data_out<=x"b2";
when x"8c"=> data_out<=x"83";
when x"8d"=> data_out<=x"88";
when x"8e"=> data_out<=x"95";
when x"8f"=> data_out<=x"9e";
when x"90"=> data_out<=x"47";
when x"91"=> data_out<=x"4c";
when x"92"=> data_out<=x"51";
when x"93"=> data_out<=x"5a";
when x"94"=> data_out<=x"6b";
when x"95"=> data_out<=x"60";
when x"96"=> data_out<=x"7d";
when x"97"=> data_out<=x"76";
when x"98"=> data_out<=x"1f";
when x"99"=> data_out<=x"14";
when x"9a"=> data_out<=x"09";
when x"9b"=> data_out<=x"02";
when x"9c"=> data_out<=x"33";
when x"9d"=> data_out<=x"38";
when x"9e"=> data_out<=x"25";
when x"9f"=> data_out<=x"2e";
when x"a0"=> data_out<=x"8c";
when x"a1"=> data_out<=x"87";
when x"a2"=> data_out<=x"9a";
when x"a3"=> data_out<=x"91";
when x"a4"=> data_out<=x"a0";
when x"a5"=> data_out<=x"ab";
when x"a6"=> data_out<=x"b6";
when x"a7"=> data_out<=x"bd";
when x"a8"=> data_out<=x"d4";
when x"a9"=> data_out<=x"df";
when x"aa"=> data_out<=x"c2";
when x"ab"=> data_out<=x"c9";
when x"ac"=> data_out<=x"f8";
when x"ad"=> data_out<=x"f3";
when x"ae"=> data_out<=x"ee";
when x"af"=> data_out<=x"e5";
when x"b0"=> data_out<=x"3c";
when x"b1"=> data_out<=x"37";
when x"b2"=> data_out<=x"2a";
when x"b3"=> data_out<=x"21";
when x"b4"=> data_out<=x"10";
when x"b5"=> data_out<=x"1b";
when x"b6"=> data_out<=x"06";
when x"b7"=> data_out<=x"0d";
when x"b8"=> data_out<=x"64";
when x"b9"=> data_out<=x"6f";
when x"ba"=> data_out<=x"72";
when x"bb"=> data_out<=x"79";
when x"bc"=> data_out<=x"48";
when x"bd"=> data_out<=x"43";
when x"be"=> data_out<=x"5e";
when x"bf"=> data_out<=x"55";
when x"c0"=> data_out<=x"01";
when x"c1"=> data_out<=x"0a";
when x"c2"=> data_out<=x"17";
when x"c3"=> data_out<=x"1c";
when x"c4"=> data_out<=x"2d";
when x"c5"=> data_out<=x"26";
when x"c6"=> data_out<=x"3b";
when x"c7"=> data_out<=x"30";
when x"c8"=> data_out<=x"59";
when x"c9"=> data_out<=x"52";
when x"ca"=> data_out<=x"4f";
when x"cb"=> data_out<=x"44";
when x"cc"=> data_out<=x"75";
when x"cd"=> data_out<=x"7e";
when x"ce"=> data_out<=x"63";
when x"cf"=> data_out<=x"68";
when x"d0"=> data_out<=x"b1";
when x"d1"=> data_out<=x"ba";
when x"d2"=> data_out<=x"a7";
when x"d3"=> data_out<=x"ac";
when x"d4"=> data_out<=x"9d";
when x"d5"=> data_out<=x"96";
when x"d6"=> data_out<=x"8b";
when x"d7"=> data_out<=x"80";
when x"d8"=> data_out<=x"e9";
when x"d9"=> data_out<=x"e2";
when x"da"=> data_out<=x"ff";
when x"db"=> data_out<=x"f4";
when x"dc"=> data_out<=x"c5";
when x"dd"=> data_out<=x"ce";
when x"de"=> data_out<=x"d3";
when x"df"=> data_out<=x"d8";
when x"e0"=> data_out<=x"7a";
when x"e1"=> data_out<=x"71";
when x"e2"=> data_out<=x"6c";
when x"e3"=> data_out<=x"67";
when x"e4"=> data_out<=x"56";
when x"e5"=> data_out<=x"5d";
when x"e6"=> data_out<=x"40";
when x"e7"=> data_out<=x"4b";
when x"e8"=> data_out<=x"22";
when x"e9"=> data_out<=x"29";
when x"ea"=> data_out<=x"34";
when x"eb"=> data_out<=x"3f";
when x"ec"=> data_out<=x"0e";
when x"ed"=> data_out<=x"05";
when x"ee"=> data_out<=x"18";
when x"ef"=> data_out<=x"13";
when x"f0"=> data_out<=x"ca";
when x"f1"=> data_out<=x"c1";
when x"f2"=> data_out<=x"dc";
when x"f3"=> data_out<=x"d7";
when x"f4"=> data_out<=x"e6";
when x"f5"=> data_out<=x"ed";
when x"f6"=> data_out<=x"f0";
when x"f7"=> data_out<=x"fb";
when x"f8"=> data_out<=x"92";
when x"f9"=> data_out<=x"99";
when x"fa"=> data_out<=x"84";
when x"fb"=> data_out<=x"8f";
when x"fc"=> data_out<=x"be";
when x"fd"=> data_out<=x"b5";
when x"fe"=> data_out<=x"a8";
when others=> data_out<=x"a3";
end case;
end process;
 
end beh_xB;
/aes_decry_ip_128bit/trunk/rtl/gf_mul.vhd
0,0 → 1,90
--************************************************************
--Copyright 2015, Ganesh Hegde < ghegde@opencores.org >
--
--This source file may be used and distributed without
--restriction provided that this copyright statement is not
--removed from the file and that any derivative work contains
--the original copyright notice and the associated disclaimer.
--
--This source is distributed in the hope that it will be
--useful, but WITHOUT ANY WARRANTY; without even the implied
--warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
--PURPOSE. See the GNU Lesser General Public License for more
--details.
--
--You should have received a copy of the GNU Lesser General
--Public License along with this source; if not, download it
--from http://www.opencores.org/lgpl.shtml
--
--*************************************************************
 
--*************************************************************
-- Multiply given word with 0x0E,0x09,0x0D and 0x0B
-- This module does the job of GF multiplication of a given byte.
-- The output is a 32bit word such that MSByte to LSByte are
-- product(GF) of 0x0E,0x09,0x0D and 0x0B with input byte.
--
--Logic type : Combinational
--*************************************************************
 
library ieee;
use ieee.std_logic_1164.all;
 
entity GF_mul is
port(
in_byte: in std_logic_vector(7 downto 0);
out_word: out std_logic_vector(31 downto 0)--0x0E,0x09,0x0D,0x0B
);
end GF_mul;
 
architecture beh_GF_mul of GF_mul is
 
component xE
port (
--clk,reset : in std_logic;
data_in: in std_logic_vector(7 downto 0);
data_out:out std_logic_vector(7 downto 0)
);
end component;
component x9
port (
--clk,reset : in std_logic;
data_in: in std_logic_vector(7 downto 0);
data_out:out std_logic_vector(7 downto 0)
);
end component;
component xD
port (
--clk,reset : in std_logic;
data_in: in std_logic_vector(7 downto 0);
data_out:out std_logic_vector(7 downto 0)
);
end component;
component xB
port (
--clk,reset : in std_logic;
data_in: in std_logic_vector(7 downto 0);
data_out:out std_logic_vector(7 downto 0)
);
end component;
signal b0,b1,b2,b3:std_logic_vector(7 downto 0);
begin
xD_inst:xD
port map(data_in=>in_byte,data_out=>b2);
xE_inst:xE
port map(data_in=>in_byte,data_out=>b0);
x9_inst:x9
port map(data_in=>in_byte,data_out=>b1);
xB_inst:xB
port map(data_in=>in_byte,data_out=>b3);
out_word <= b0&b1&b2&b3;--0x0E,0x09,0x0D,0x0B
end beh_GF_mul;
/aes_decry_ip_128bit/trunk/rtl/README.txt
0,0 → 1,7
Inverse Cipher
InvShiftRows(state) // See Sec. 5.3.1
InvSubBytes(state) // See Sec. 5.3.2
AddRoundKey(state, w[round*Nb, (round+1)*Nb-1])
InvMixColumns(state) // See Sec. 5.3.
 
NOTE: Key scheduler same as encryption.
/aes_decry_ip_128bit/trunk/rtl/InvSub_addRk.vhd
0,0 → 1,88
--************************************************************
--Copyright 2015, Ganesh Hegde < ghegde@opencores.org >
--
--This source file may be used and distributed without
--restriction provided that this copyright statement is not
--removed from the file and that any derivative work contains
--the original copyright notice and the associated disclaimer.
--
--This source is distributed in the hope that it will be
--useful, but WITHOUT ANY WARRANTY; without even the implied
--warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
--PURPOSE. See the GNU Lesser General Public License for more
--details.
--
--You should have received a copy of the GNU Lesser General
--Public License along with this source; if not, download it
--from http://www.opencores.org/lgpl.shtml
--
--*************************************************************
 
--*************************************************************
-- First three round i.e Inv shift row, Inv Sub byte, Add round
-- key are performed.
--Logic type : Combinational
--*************************************************************
 
library ieee;
use ieee.std_logic_1164.all;
 
entity InvSub_addRk is
port(
state_in : in std_logic_vector(127 downto 0);
state_out : out std_logic_vector(127 downto 0);
key : in std_logic_vector(127 downto 0)
);
end InvSub_addRk;
 
architecture beh_InvSub_addRk of InvSub_addRk is
 
component Inv_Sub_4bytes
port(
word_in: in std_logic_vector(31 downto 0);
word_out: out std_logic_vector(31 downto 0)
);
end component;
 
signal shc0,shc1,shc2,shc3 : std_logic_vector(31 downto 0);--Inv shifted columns
signal c0,c1,c2,c3 : std_logic_vector(31 downto 0);
signal k0,k1,k2,k3 : std_logic_vector(31 downto 0);
signal isb0,isb1,isb2,isb3:std_logic_vector(31 downto 0);
signal w0,w1,w2,w3 : std_logic_vector(31 downto 0);
 
begin
Inv_Sub_4bytes_inst1:Inv_Sub_4bytes
port map(word_in=>shc0 , word_out=>isb0 );
Inv_Sub_4bytes_inst2:Inv_Sub_4bytes
port map(word_in=>shc1 , word_out=>isb1 );
Inv_Sub_4bytes_inst3:Inv_Sub_4bytes
port map(word_in=>shc2 , word_out=>isb2 );
Inv_Sub_4bytes_inst4:Inv_Sub_4bytes
port map(word_in=>shc3 , word_out=>isb3 );
k0 <= key(127 downto 96);
k1 <= key(95 downto 64);
k2 <= key(63 downto 32);
k3 <= key(31 downto 0);
c0 <= state_in(127 downto 96);
c1 <= state_in(95 downto 64);
c2 <= state_in(63 downto 32);
c3 <= state_in(31 downto 0);
shc0 <= c0(31 downto 24) & c3(23 downto 16) & c2(15 downto 8) & c1(7 downto 0);
shc1 <= c1(31 downto 24) & c0(23 downto 16) & c3(15 downto 8) & c2(7 downto 0);
shc2 <= c2(31 downto 24) & c1(23 downto 16) & c0(15 downto 8) & c3(7 downto 0);
shc3 <= c3(31 downto 24) & c2(23 downto 16) & c1(15 downto 8) & c0(7 downto 0);
w0 <= isb0 xor k0;
w1 <= isb1 xor k1;
w2 <= isb2 xor k2;
w3 <= isb3 xor k3;
state_out <= w0 & w1 & w2 & w3;
end beh_InvSub_addRk;
/aes_decry_ip_128bit/trunk/rtl/xD.vhd
0,0 → 1,302
--************************************************************
--Copyright 2015, Ganesh Hegde < ghegde@opencores.org >
--
--This source file may be used and distributed without
--restriction provided that this copyright statement is not
--removed from the file and that any derivative work contains
--the original copyright notice and the associated disclaimer.
--
--This source is distributed in the hope that it will be
--useful, but WITHOUT ANY WARRANTY; without even the implied
--warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
--PURPOSE. See the GNU Lesser General Public License for more
--details.
--
--You should have received a copy of the GNU Lesser General
--Public License along with this source; if not, download it
--from http://www.opencores.org/lgpl.shtml
--
--*************************************************************
 
--*************************************************************
-- GF multiplication of input byte by 0x0D
--Logic type : Combinational
--*************************************************************
 
library ieee;
use ieee.std_logic_1164.all;
 
entity xD is
port (
--clk,reset : in std_logic;
data_in: in std_logic_vector(7 downto 0);
data_out:out std_logic_vector(7 downto 0)
);
end xD;
 
architecture beh_xD of xD is
begin
process(data_in)
begin
case(data_in) is
when x"00"=> data_out<=x"00";
when x"01"=> data_out<=x"0d";
when x"02"=> data_out<=x"1a";
when x"03"=> data_out<=x"17";
when x"04"=> data_out<=x"34";
when x"05"=> data_out<=x"39";
when x"06"=> data_out<=x"2e";
when x"07"=> data_out<=x"23";
when x"08"=> data_out<=x"68";
when x"09"=> data_out<=x"65";
when x"0a"=> data_out<=x"72";
when x"0b"=> data_out<=x"7f";
when x"0c"=> data_out<=x"5c";
when x"0d"=> data_out<=x"51";
when x"0e"=> data_out<=x"46";
when x"0f"=> data_out<=x"4b";
when x"10"=> data_out<=x"d0";
when x"11"=> data_out<=x"dd";
when x"12"=> data_out<=x"ca";
when x"13"=> data_out<=x"c7";
when x"14"=> data_out<=x"e4";
when x"15"=> data_out<=x"e9";
when x"16"=> data_out<=x"fe";
when x"17"=> data_out<=x"f3";
when x"18"=> data_out<=x"b8";
when x"19"=> data_out<=x"b5";
when x"1a"=> data_out<=x"a2";
when x"1b"=> data_out<=x"af";
when x"1c"=> data_out<=x"8c";
when x"1d"=> data_out<=x"81";
when x"1e"=> data_out<=x"96";
when x"1f"=> data_out<=x"9b";
when x"20"=> data_out<=x"bb";
when x"21"=> data_out<=x"b6";
when x"22"=> data_out<=x"a1";
when x"23"=> data_out<=x"ac";
when x"24"=> data_out<=x"8f";
when x"25"=> data_out<=x"82";
when x"26"=> data_out<=x"95";
when x"27"=> data_out<=x"98";
when x"28"=> data_out<=x"d3";
when x"29"=> data_out<=x"de";
when x"2a"=> data_out<=x"c9";
when x"2b"=> data_out<=x"c4";
when x"2c"=> data_out<=x"e7";
when x"2d"=> data_out<=x"ea";
when x"2e"=> data_out<=x"fd";
when x"2f"=> data_out<=x"f0";
when x"30"=> data_out<=x"6b";
when x"31"=> data_out<=x"66";
when x"32"=> data_out<=x"71";
when x"33"=> data_out<=x"7c";
when x"34"=> data_out<=x"5f";
when x"35"=> data_out<=x"52";
when x"36"=> data_out<=x"45";
when x"37"=> data_out<=x"48";
when x"38"=> data_out<=x"03";
when x"39"=> data_out<=x"0e";
when x"3a"=> data_out<=x"19";
when x"3b"=> data_out<=x"14";
when x"3c"=> data_out<=x"37";
when x"3d"=> data_out<=x"3a";
when x"3e"=> data_out<=x"2d";
when x"3f"=> data_out<=x"20";
when x"40"=> data_out<=x"6d";
when x"41"=> data_out<=x"60";
when x"42"=> data_out<=x"77";
when x"43"=> data_out<=x"7a";
when x"44"=> data_out<=x"59";
when x"45"=> data_out<=x"54";
when x"46"=> data_out<=x"43";
when x"47"=> data_out<=x"4e";
when x"48"=> data_out<=x"05";
when x"49"=> data_out<=x"08";
when x"4a"=> data_out<=x"1f";
when x"4b"=> data_out<=x"12";
when x"4c"=> data_out<=x"31";
when x"4d"=> data_out<=x"3c";
when x"4e"=> data_out<=x"2b";
when x"4f"=> data_out<=x"26";
when x"50"=> data_out<=x"bd";
when x"51"=> data_out<=x"b0";
when x"52"=> data_out<=x"a7";
when x"53"=> data_out<=x"aa";
when x"54"=> data_out<=x"89";
when x"55"=> data_out<=x"84";
when x"56"=> data_out<=x"93";
when x"57"=> data_out<=x"9e";
when x"58"=> data_out<=x"d5";
when x"59"=> data_out<=x"d8";
when x"5a"=> data_out<=x"cf";
when x"5b"=> data_out<=x"c2";
when x"5c"=> data_out<=x"e1";
when x"5d"=> data_out<=x"ec";
when x"5e"=> data_out<=x"fb";
when x"5f"=> data_out<=x"f6";
when x"60"=> data_out<=x"d6";
when x"61"=> data_out<=x"db";
when x"62"=> data_out<=x"cc";
when x"63"=> data_out<=x"c1";
when x"64"=> data_out<=x"e2";
when x"65"=> data_out<=x"ef";
when x"66"=> data_out<=x"f8";
when x"67"=> data_out<=x"f5";
when x"68"=> data_out<=x"be";
when x"69"=> data_out<=x"b3";
when x"6a"=> data_out<=x"a4";
when x"6b"=> data_out<=x"a9";
when x"6c"=> data_out<=x"8a";
when x"6d"=> data_out<=x"87";
when x"6e"=> data_out<=x"90";
when x"6f"=> data_out<=x"9d";
when x"70"=> data_out<=x"06";
when x"71"=> data_out<=x"0b";
when x"72"=> data_out<=x"1c";
when x"73"=> data_out<=x"11";
when x"74"=> data_out<=x"32";
when x"75"=> data_out<=x"3f";
when x"76"=> data_out<=x"28";
when x"77"=> data_out<=x"25";
when x"78"=> data_out<=x"6e";
when x"79"=> data_out<=x"63";
when x"7a"=> data_out<=x"74";
when x"7b"=> data_out<=x"79";
when x"7c"=> data_out<=x"5a";
when x"7d"=> data_out<=x"57";
when x"7e"=> data_out<=x"40";
when x"7f"=> data_out<=x"4d";
when x"80"=> data_out<=x"da";
when x"81"=> data_out<=x"d7";
when x"82"=> data_out<=x"c0";
when x"83"=> data_out<=x"cd";
when x"84"=> data_out<=x"ee";
when x"85"=> data_out<=x"e3";
when x"86"=> data_out<=x"f4";
when x"87"=> data_out<=x"f9";
when x"88"=> data_out<=x"b2";
when x"89"=> data_out<=x"bf";
when x"8a"=> data_out<=x"a8";
when x"8b"=> data_out<=x"a5";
when x"8c"=> data_out<=x"86";
when x"8d"=> data_out<=x"8b";
when x"8e"=> data_out<=x"9c";
when x"8f"=> data_out<=x"91";
when x"90"=> data_out<=x"0a";
when x"91"=> data_out<=x"07";
when x"92"=> data_out<=x"10";
when x"93"=> data_out<=x"1d";
when x"94"=> data_out<=x"3e";
when x"95"=> data_out<=x"33";
when x"96"=> data_out<=x"24";
when x"97"=> data_out<=x"29";
when x"98"=> data_out<=x"62";
when x"99"=> data_out<=x"6f";
when x"9a"=> data_out<=x"78";
when x"9b"=> data_out<=x"75";
when x"9c"=> data_out<=x"56";
when x"9d"=> data_out<=x"5b";
when x"9e"=> data_out<=x"4c";
when x"9f"=> data_out<=x"41";
when x"a0"=> data_out<=x"61";
when x"a1"=> data_out<=x"6c";
when x"a2"=> data_out<=x"7b";
when x"a3"=> data_out<=x"76";
when x"a4"=> data_out<=x"55";
when x"a5"=> data_out<=x"58";
when x"a6"=> data_out<=x"4f";
when x"a7"=> data_out<=x"42";
when x"a8"=> data_out<=x"09";
when x"a9"=> data_out<=x"04";
when x"aa"=> data_out<=x"13";
when x"ab"=> data_out<=x"1e";
when x"ac"=> data_out<=x"3d";
when x"ad"=> data_out<=x"30";
when x"ae"=> data_out<=x"27";
when x"af"=> data_out<=x"2a";
when x"b0"=> data_out<=x"b1";
when x"b1"=> data_out<=x"bc";
when x"b2"=> data_out<=x"ab";
when x"b3"=> data_out<=x"a6";
when x"b4"=> data_out<=x"85";
when x"b5"=> data_out<=x"88";
when x"b6"=> data_out<=x"9f";
when x"b7"=> data_out<=x"92";
when x"b8"=> data_out<=x"d9";
when x"b9"=> data_out<=x"d4";
when x"ba"=> data_out<=x"c3";
when x"bb"=> data_out<=x"ce";
when x"bc"=> data_out<=x"ed";
when x"bd"=> data_out<=x"e0";
when x"be"=> data_out<=x"f7";
when x"bf"=> data_out<=x"fa";
when x"c0"=> data_out<=x"b7";
when x"c1"=> data_out<=x"ba";
when x"c2"=> data_out<=x"ad";
when x"c3"=> data_out<=x"a0";
when x"c4"=> data_out<=x"83";
when x"c5"=> data_out<=x"8e";
when x"c6"=> data_out<=x"99";
when x"c7"=> data_out<=x"94";
when x"c8"=> data_out<=x"df";
when x"c9"=> data_out<=x"d2";
when x"ca"=> data_out<=x"c5";
when x"cb"=> data_out<=x"c8";
when x"cc"=> data_out<=x"eb";
when x"cd"=> data_out<=x"e6";
when x"ce"=> data_out<=x"f1";
when x"cf"=> data_out<=x"fc";
when x"d0"=> data_out<=x"67";
when x"d1"=> data_out<=x"6a";
when x"d2"=> data_out<=x"7d";
when x"d3"=> data_out<=x"70";
when x"d4"=> data_out<=x"53";
when x"d5"=> data_out<=x"5e";
when x"d6"=> data_out<=x"49";
when x"d7"=> data_out<=x"44";
when x"d8"=> data_out<=x"0f";
when x"d9"=> data_out<=x"02";
when x"da"=> data_out<=x"15";
when x"db"=> data_out<=x"18";
when x"dc"=> data_out<=x"3b";
when x"dd"=> data_out<=x"36";
when x"de"=> data_out<=x"21";
when x"df"=> data_out<=x"2c";
when x"e0"=> data_out<=x"0c";
when x"e1"=> data_out<=x"01";
when x"e2"=> data_out<=x"16";
when x"e3"=> data_out<=x"1b";
when x"e4"=> data_out<=x"38";
when x"e5"=> data_out<=x"35";
when x"e6"=> data_out<=x"22";
when x"e7"=> data_out<=x"2f";
when x"e8"=> data_out<=x"64";
when x"e9"=> data_out<=x"69";
when x"ea"=> data_out<=x"7e";
when x"eb"=> data_out<=x"73";
when x"ec"=> data_out<=x"50";
when x"ed"=> data_out<=x"5d";
when x"ee"=> data_out<=x"4a";
when x"ef"=> data_out<=x"47";
when x"f0"=> data_out<=x"dc";
when x"f1"=> data_out<=x"d1";
when x"f2"=> data_out<=x"c6";
when x"f3"=> data_out<=x"cb";
when x"f4"=> data_out<=x"e8";
when x"f5"=> data_out<=x"e5";
when x"f6"=> data_out<=x"f2";
when x"f7"=> data_out<=x"ff";
when x"f8"=> data_out<=x"b4";
when x"f9"=> data_out<=x"b9";
when x"fa"=> data_out<=x"ae";
when x"fb"=> data_out<=x"a3";
when x"fc"=> data_out<=x"80";
when x"fd"=> data_out<=x"8d";
when x"fe"=> data_out<=x"9a";
when others=> data_out<=x"97";
end case;
end process;
 
end beh_xD;
/aes_decry_ip_128bit/trunk/rtl/xE.vhd
0,0 → 1,301
--************************************************************
--Copyright 2015, Ganesh Hegde < ghegde@opencores.org >
--
--This source file may be used and distributed without
--restriction provided that this copyright statement is not
--removed from the file and that any derivative work contains
--the original copyright notice and the associated disclaimer.
--
--This source is distributed in the hope that it will be
--useful, but WITHOUT ANY WARRANTY; without even the implied
--warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
--PURPOSE. See the GNU Lesser General Public License for more
--details.
--
--You should have received a copy of the GNU Lesser General
--Public License along with this source; if not, download it
--from http://www.opencores.org/lgpl.shtml
--
--*************************************************************
 
--*************************************************************
-- GF multiplication of input byte by 0x0E
--Logic type : Combinational
--*************************************************************
library ieee;
use ieee.std_logic_1164.all;
 
entity xE is
port (
--clk,reset : in std_logic;
data_in: in std_logic_vector(7 downto 0);
data_out:out std_logic_vector(7 downto 0)
);
end xE;
 
architecture beh_xE of xE is
begin
process(data_in)
begin
case(data_in) is
when x"00"=> data_out<=x"00";
when x"01"=> data_out<=x"0e";
when x"02"=> data_out<=x"1c";
when x"03"=> data_out<=x"12";
when x"04"=> data_out<=x"38";
when x"05"=> data_out<=x"36";
when x"06"=> data_out<=x"24";
when x"07"=> data_out<=x"2a";
when x"08"=> data_out<=x"70";
when x"09"=> data_out<=x"7e";
when x"0a"=> data_out<=x"6c";
when x"0b"=> data_out<=x"62";
when x"0c"=> data_out<=x"48";
when x"0d"=> data_out<=x"46";
when x"0e"=> data_out<=x"54";
when x"0f"=> data_out<=x"5a";
when x"10"=> data_out<=x"e0";
when x"11"=> data_out<=x"ee";
when x"12"=> data_out<=x"fc";
when x"13"=> data_out<=x"f2";
when x"14"=> data_out<=x"d8";
when x"15"=> data_out<=x"d6";
when x"16"=> data_out<=x"c4";
when x"17"=> data_out<=x"ca";
when x"18"=> data_out<=x"90";
when x"19"=> data_out<=x"9e";
when x"1a"=> data_out<=x"8c";
when x"1b"=> data_out<=x"82";
when x"1c"=> data_out<=x"a8";
when x"1d"=> data_out<=x"a6";
when x"1e"=> data_out<=x"b4";
when x"1f"=> data_out<=x"ba";
when x"20"=> data_out<=x"db";
when x"21"=> data_out<=x"d5";
when x"22"=> data_out<=x"c7";
when x"23"=> data_out<=x"c9";
when x"24"=> data_out<=x"e3";
when x"25"=> data_out<=x"ed";
when x"26"=> data_out<=x"ff";
when x"27"=> data_out<=x"f1";
when x"28"=> data_out<=x"ab";
when x"29"=> data_out<=x"a5";
when x"2a"=> data_out<=x"b7";
when x"2b"=> data_out<=x"b9";
when x"2c"=> data_out<=x"93";
when x"2d"=> data_out<=x"9d";
when x"2e"=> data_out<=x"8f";
when x"2f"=> data_out<=x"81";
when x"30"=> data_out<=x"3b";
when x"31"=> data_out<=x"35";
when x"32"=> data_out<=x"27";
when x"33"=> data_out<=x"29";
when x"34"=> data_out<=x"03";
when x"35"=> data_out<=x"0d";
when x"36"=> data_out<=x"1f";
when x"37"=> data_out<=x"11";
when x"38"=> data_out<=x"4b";
when x"39"=> data_out<=x"45";
when x"3a"=> data_out<=x"57";
when x"3b"=> data_out<=x"59";
when x"3c"=> data_out<=x"73";
when x"3d"=> data_out<=x"7d";
when x"3e"=> data_out<=x"6f";
when x"3f"=> data_out<=x"61";
when x"40"=> data_out<=x"ad";
when x"41"=> data_out<=x"a3";
when x"42"=> data_out<=x"b1";
when x"43"=> data_out<=x"bf";
when x"44"=> data_out<=x"95";
when x"45"=> data_out<=x"9b";
when x"46"=> data_out<=x"89";
when x"47"=> data_out<=x"87";
when x"48"=> data_out<=x"dd";
when x"49"=> data_out<=x"d3";
when x"4a"=> data_out<=x"c1";
when x"4b"=> data_out<=x"cf";
when x"4c"=> data_out<=x"e5";
when x"4d"=> data_out<=x"eb";
when x"4e"=> data_out<=x"f9";
when x"4f"=> data_out<=x"f7";
when x"50"=> data_out<=x"4d";
when x"51"=> data_out<=x"43";
when x"52"=> data_out<=x"51";
when x"53"=> data_out<=x"5f";
when x"54"=> data_out<=x"75";
when x"55"=> data_out<=x"7b";
when x"56"=> data_out<=x"69";
when x"57"=> data_out<=x"67";
when x"58"=> data_out<=x"3d";
when x"59"=> data_out<=x"33";
when x"5a"=> data_out<=x"21";
when x"5b"=> data_out<=x"2f";
when x"5c"=> data_out<=x"05";
when x"5d"=> data_out<=x"0b";
when x"5e"=> data_out<=x"19";
when x"5f"=> data_out<=x"17";
when x"60"=> data_out<=x"76";
when x"61"=> data_out<=x"78";
when x"62"=> data_out<=x"6a";
when x"63"=> data_out<=x"64";
when x"64"=> data_out<=x"4e";
when x"65"=> data_out<=x"40";
when x"66"=> data_out<=x"52";
when x"67"=> data_out<=x"5c";
when x"68"=> data_out<=x"06";
when x"69"=> data_out<=x"08";
when x"6a"=> data_out<=x"1a";
when x"6b"=> data_out<=x"14";
when x"6c"=> data_out<=x"3e";
when x"6d"=> data_out<=x"30";
when x"6e"=> data_out<=x"22";
when x"6f"=> data_out<=x"2c";
when x"70"=> data_out<=x"96";
when x"71"=> data_out<=x"98";
when x"72"=> data_out<=x"8a";
when x"73"=> data_out<=x"84";
when x"74"=> data_out<=x"ae";
when x"75"=> data_out<=x"a0";
when x"76"=> data_out<=x"b2";
when x"77"=> data_out<=x"bc";
when x"78"=> data_out<=x"e6";
when x"79"=> data_out<=x"e8";
when x"7a"=> data_out<=x"fa";
when x"7b"=> data_out<=x"f4";
when x"7c"=> data_out<=x"de";
when x"7d"=> data_out<=x"d0";
when x"7e"=> data_out<=x"c2";
when x"7f"=> data_out<=x"cc";
when x"80"=> data_out<=x"41";
when x"81"=> data_out<=x"4f";
when x"82"=> data_out<=x"5d";
when x"83"=> data_out<=x"53";
when x"84"=> data_out<=x"79";
when x"85"=> data_out<=x"77";
when x"86"=> data_out<=x"65";
when x"87"=> data_out<=x"6b";
when x"88"=> data_out<=x"31";
when x"89"=> data_out<=x"3f";
when x"8a"=> data_out<=x"2d";
when x"8b"=> data_out<=x"23";
when x"8c"=> data_out<=x"09";
when x"8d"=> data_out<=x"07";
when x"8e"=> data_out<=x"15";
when x"8f"=> data_out<=x"1b";
when x"90"=> data_out<=x"a1";
when x"91"=> data_out<=x"af";
when x"92"=> data_out<=x"bd";
when x"93"=> data_out<=x"b3";
when x"94"=> data_out<=x"99";
when x"95"=> data_out<=x"97";
when x"96"=> data_out<=x"85";
when x"97"=> data_out<=x"8b";
when x"98"=> data_out<=x"d1";
when x"99"=> data_out<=x"df";
when x"9a"=> data_out<=x"cd";
when x"9b"=> data_out<=x"c3";
when x"9c"=> data_out<=x"e9";
when x"9d"=> data_out<=x"e7";
when x"9e"=> data_out<=x"f5";
when x"9f"=> data_out<=x"fb";
when x"a0"=> data_out<=x"9a";
when x"a1"=> data_out<=x"94";
when x"a2"=> data_out<=x"86";
when x"a3"=> data_out<=x"88";
when x"a4"=> data_out<=x"a2";
when x"a5"=> data_out<=x"ac";
when x"a6"=> data_out<=x"be";
when x"a7"=> data_out<=x"b0";
when x"a8"=> data_out<=x"ea";
when x"a9"=> data_out<=x"e4";
when x"aa"=> data_out<=x"f6";
when x"ab"=> data_out<=x"f8";
when x"ac"=> data_out<=x"d2";
when x"ad"=> data_out<=x"dc";
when x"ae"=> data_out<=x"ce";
when x"af"=> data_out<=x"c0";
when x"b0"=> data_out<=x"7a";
when x"b1"=> data_out<=x"74";
when x"b2"=> data_out<=x"66";
when x"b3"=> data_out<=x"68";
when x"b4"=> data_out<=x"42";
when x"b5"=> data_out<=x"4c";
when x"b6"=> data_out<=x"5e";
when x"b7"=> data_out<=x"50";
when x"b8"=> data_out<=x"0a";
when x"b9"=> data_out<=x"04";
when x"ba"=> data_out<=x"16";
when x"bb"=> data_out<=x"18";
when x"bc"=> data_out<=x"32";
when x"bd"=> data_out<=x"3c";
when x"be"=> data_out<=x"2e";
when x"bf"=> data_out<=x"20";
when x"c0"=> data_out<=x"ec";
when x"c1"=> data_out<=x"e2";
when x"c2"=> data_out<=x"f0";
when x"c3"=> data_out<=x"fe";
when x"c4"=> data_out<=x"d4";
when x"c5"=> data_out<=x"da";
when x"c6"=> data_out<=x"c8";
when x"c7"=> data_out<=x"c6";
when x"c8"=> data_out<=x"9c";
when x"c9"=> data_out<=x"92";
when x"ca"=> data_out<=x"80";
when x"cb"=> data_out<=x"8e";
when x"cc"=> data_out<=x"a4";
when x"cd"=> data_out<=x"aa";
when x"ce"=> data_out<=x"b8";
when x"cf"=> data_out<=x"b6";
when x"d0"=> data_out<=x"0c";
when x"d1"=> data_out<=x"02";
when x"d2"=> data_out<=x"10";
when x"d3"=> data_out<=x"1e";
when x"d4"=> data_out<=x"34";
when x"d5"=> data_out<=x"3a";
when x"d6"=> data_out<=x"28";
when x"d7"=> data_out<=x"26";
when x"d8"=> data_out<=x"7c";
when x"d9"=> data_out<=x"72";
when x"da"=> data_out<=x"60";
when x"db"=> data_out<=x"6e";
when x"dc"=> data_out<=x"44";
when x"dd"=> data_out<=x"4a";
when x"de"=> data_out<=x"58";
when x"df"=> data_out<=x"56";
when x"e0"=> data_out<=x"37";
when x"e1"=> data_out<=x"39";
when x"e2"=> data_out<=x"2b";
when x"e3"=> data_out<=x"25";
when x"e4"=> data_out<=x"0f";
when x"e5"=> data_out<=x"01";
when x"e6"=> data_out<=x"13";
when x"e7"=> data_out<=x"1d";
when x"e8"=> data_out<=x"47";
when x"e9"=> data_out<=x"49";
when x"ea"=> data_out<=x"5b";
when x"eb"=> data_out<=x"55";
when x"ec"=> data_out<=x"7f";
when x"ed"=> data_out<=x"71";
when x"ee"=> data_out<=x"63";
when x"ef"=> data_out<=x"6d";
when x"f0"=> data_out<=x"d7";
when x"f1"=> data_out<=x"d9";
when x"f2"=> data_out<=x"cb";
when x"f3"=> data_out<=x"c5";
when x"f4"=> data_out<=x"ef";
when x"f5"=> data_out<=x"e1";
when x"f6"=> data_out<=x"f3";
when x"f7"=> data_out<=x"fd";
when x"f8"=> data_out<=x"a7";
when x"f9"=> data_out<=x"a9";
when x"fa"=> data_out<=x"bb";
when x"fb"=> data_out<=x"b5";
when x"fc"=> data_out<=x"9f";
when x"fd"=> data_out<=x"91";
when x"fe"=> data_out<=x"83";
when others=> data_out<=x"8d";
end case;
end process;
 
end beh_xE;

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