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URL https://opencores.org/ocsvn/apbtoaes128/apbtoaes128/trunk

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/apbtoaes128/trunk/testbench/aes_tb_vpi.v
0,0 → 1,210
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
module AES_GLADIC_tb;
 
reg PCLK;
wire PRESETn;
wire PSEL;
wire PENABLE;
wire PWRITE;
 
wire [31:0] PWDATA;
wire [31:0] PADDR;
wire [31:0] PRDATA;
 
 
wire PREADY;
wire PSLVERR;
 
wire int_ccf;
wire int_err;
wire dma_req_wr;
wire dma_req_rd;
 
wire [3:0] core_addr;
 
assign core_addr = PADDR[5:2];
 
aes_ip DUT (
 
.PCLK (PCLK),
.PRESETn (PRESETn),
.PENABLE (PENABLE),
.PSEL (PSEL),
.PWDATA (PWDATA),
.PADDR (core_addr),
.PWRITE(PWRITE),
.PRDATA (PRDATA),
.PREADY (PREADY),
.PSLVERR (PSLVERR),
.int_ccf(int_ccf),
.int_err(int_err),
.dma_req_wr(dma_req_wr),
.dma_req_rd(dma_req_rd)
);
 
integer i;
 
initial
begin
$dumpfile("AES_GLADIC_tb.vcd");
$dumpvars(0,AES_GLADIC_tb);
$init;
$init_reset;
end
 
initial PCLK = 1'b0;
always #(5) PCLK = ~PCLK;
 
//
always@(posedge PCLK)
$bfm_encryption_ecb_aes128;
 
always@(posedge PCLK)
$bfm_encryption_ecb_dma_aes128;
 
always@(posedge PCLK)
$bfm_encryption_ccfie_ecb_aes128;
 
//
always@(posedge PCLK)
$bfm_key_generation_ecb_aes128;
 
always@(posedge PCLK)
$bfm_key_generation_dma_ecb_aes128;
 
always@(posedge PCLK)
$bfm_key_generation_ccfie_ecb_aes128;
 
//
always@(posedge PCLK)
$bfm_decryption_ecb_aes128;
 
always@(posedge PCLK)
$bfm_decryption_ecb_dma_aes128;
 
always@(posedge PCLK)
$bfm_decryption_ccfie_ecb_aes128;
 
//
always@(posedge PCLK)
$bfm_derivation_decryption_ecb_aes128;
 
always@(posedge PCLK)
$bfm_derivation_decryption_dma_ecb_aes128;
 
always@(posedge PCLK)
$bfm_derivation_decryption_ccfie_ecb_aes128;
 
//
always@(posedge PCLK)
$bfm_wr_aes128;
 
always@(posedge PCLK)
$bfm_wr_error_dinr_aes128;
 
always@(posedge PCLK)
$bfm_wr_error_doutr_aes128;
 
//
always@(posedge PCLK)
$bfm_generate_type;
 
//
always@(posedge PCLK)
$reset_aes128;
 
//
always@(posedge PCLK)
$monitor_aes;
 
//
always@(negedge PRESETn)
$init;
 
always@(posedge PCLK)
begin
while( i != 1)
begin
@(posedge PCLK);
end
$finish();
end
 
 
 
endmodule
/apbtoaes128/trunk/work/run.sh
0,0 → 1,4
g++ -c -fpic ../pli/env_aes.c -std=c++11 -Wwrite-strings -fpermissive
g++ -shared -o env_aes.vpi env_aes.o -lvpi -std=c++11 -Wwrite-strings -fpermissive
iverilog -oenv_aes.vvp ../testbench/aes_tb_vpi.v ../rtl/*.v
vvp -M. -menv_aes env_aes.vvp
/apbtoaes128/trunk/work/README
0,0 → 1,12
Hi folks,
 
10 - 20 - 2014
 
Opencores encourages the use of free tools for synthesis, but so far have not seen a proposal for verification IPs in the present moment and not dedicated myself to look on the site if there were people who would be doing what I'm doing. I am providing a system designed to verify the functionality of AES128 environment. Still not finished and still need to document about the process of verification of the same. Until then has only checking the ECB still lacks the test piece with CBC and CTR.
 
I chose the icarus verilog because it already had a previous experience with it and it provides a PLI interface that enables the use of C/C++.
 
I will post bugs to be solved by Design. Be patient more updates will come.
 
 
IF you want to test another cases on env go to aes_bfm_generate.h and change type_bfm = ECB_KEY_GEN_CCFIE to another constatnt where can be see on env_aes.c
/apbtoaes128/trunk/pli/env_aes.c
0,0 → 1,432
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
 
#include "../../iverilog/vpi_user.h"
//#include <vpi_user.h>
#include <iostream>
#include <random>
 
 
s_vpi_value v_generate;
 
s_vpi_value v_ecb;
s_vpi_time t_ecb;
 
s_vpi_value v_wr;
s_vpi_time t_wr;
 
s_vpi_value v_reset;
s_vpi_time t_reset;
 
 
s_vpi_value v_initial;
s_vpi_time t_initial;
 
 
unsigned long int a;
unsigned long int b;
unsigned long int c;
unsigned long int d;
 
int type_bfm;
 
int STATE;
int STATE_RESET;
 
int counter;
 
int flag;
 
int reset_counter;
int counter_reset_enter;
int counter_reset_wait;
int FIPS_ENABLE;
 
int RESET_GENERATED;
int PACKETS_GENERATED;
 
int counter_write;
int counter_read;
int counter_wait;
 
/*AES REGISTERS*/
#define ADDR_AES_CR 0
#define ADDR_AES_SR 4
#define ADDR_AES_DINR 8
 
#define ADDR_AES_DOUTR 12
#define ADDR_AES_KEYR0 16
#define ADDR_AES_KEYR1 20
#define ADDR_AES_KEYR2 24
#define ADDR_AES_KEYR3 28
 
#define ADDR_AES_IVR0 32
#define ADDR_AES_IVR1 36
#define ADDR_AES_IVR2 40
#define ADDR_AES_IVR3 44
 
int vector_address[11];
 
/*STATE MACHINE TO WORK WITH BFM*/
#define IDLE 0
#define WRITE 1
#define WAIT 2
#define READ_RESULTS 3
 
#define WRITE_DINR 4
#define READ_DOUTR 5
#define WAIT_SR 6
#define RESET_SR 7
#define READ_KEY_GEN 8
 
 
/*STATE MACHINE TO WORK WITH BFM RESET*/
#define ENTER_RESET 9
#define WAIT_RESET 10
#define GET_OUT_RESET 11
 
 
#define AES_WR_ONLY 99
#define AES_WR_ERROR_DINR_ONLY 100
#define AES_WR_ERROR_DOUTR_ONLY 100
 
/*TEST USING NAMES TO ENABLE BFMs*/
#define ECB_ENCRYPTION 1
#define ECB_DECRYPTION 2
#define ECB_KEY_GEN 3
#define ECB_DERIVATION_DECRYPTION 4
 
#define ECB_ENCRYPTION_DMA 5
#define ECB_DECRYPTION_DMA 6
#define ECB_KEY_GEN_DMA 7
#define ECB_DERIVATION_DECRYPTION_DMA 8
 
#define ECB_ENCRYPTION_CCFIE 9
#define ECB_DECRYPTION_CCFIE 10
#define ECB_DERIVATION_DECRYPTION_CCFIE 11
#define ECB_KEY_GEN_CCFIE 12
 
/*TYPE CONFIGURATION USED TO INSERT DATA ON DUT*/
#define FIPS 0
#define RANDOM_DATA 1
 
 
/*MAX PACKETS GENERATION*/
#define MAX_ITERATIONS 17
 
/*MAX RESET GENERATION */
#define MAX_RESET_TIMES 4
 
/*THIS INCLUDE IS USED TO GENERATE DATA DO BE INSERTED ON DUT*/
unsigned char TEXT_FIPS_NOT_DERIVATED[] = {0x00,0x11,0x22,0x33,0x44,0x55,0x66,0x77,0x88,0x99,0xAA,0xBB,0xCC,0xDD,0xEE,0xFF};
unsigned char KEY_FIPS_NOT_DERIVATED[] = {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,0x0A,0x0B,0x0C,0x0D,0x0E,0x0F};
 
unsigned char TEXT_FIPS_DERIVATED[] = {0x69,0xC4,0xE0,0xD8,0x6A,0x7B,0x04,0x30,0xD8,0xCD,0xB7,0x80,0x70,0xB4,0xC5,0x5A};
unsigned char KEY_FIPS_DERIVATED[] = {0x13,0x11,0x1D,0x7F,0xE3,0x94,0x4A,0x17,0xF3,0x07,0xA7,0x8B,0x4D,0x2B,0x30,0xC5};
 
/*BFM CONTROL FLOW*/
#include "aes_bfm_generate.h"
 
/*BASIC TEST WRITE READ*/
#include "aes_bfm_wr.h"
#include "bfm_error/aes_bfm_wr_error_dinr.h"
#include "bfm_error/aes_bfm_wr_error_doutr.h"
 
/*ECB TEST CASES*/
#include "bfm_ecb/aes_bfm_encryption_ecb.h"
#include "bfm_ecb/aes_bfm_decryption_ecb.h"
#include "bfm_ecb/aes_bfm_derivation_decryption_ecb.h"
#include "bfm_ecb/aes_bfm_key_generation_ecb.h"
 
#include "bfm_ecb/aes_bfm_decryption_dma_ecb.h"
#include "bfm_ecb/aes_bfm_encryption_dma_ecb.h"
#include "bfm_ecb/aes_bfm_key_generation_dma_ecb.h"
#include "bfm_ecb/aes_bfm_derivation_decryption_dma_ecb.h"
 
 
#include "bfm_ecb/aes_bfm_encryption_ccfie_ecb.h"
#include "bfm_ecb/aes_bfm_decryption_ccfie_ecb.h"
#include "bfm_ecb/aes_bfm_derivation_decryption_ccfie_ecb.h"
#include "bfm_ecb/aes_bfm_key_generation_ccfie_ecb.h"
 
#include "aes_init.h"
#include "aes_monitor.h"
#include "aes_bfm_reset.h"
#include "aes_init_reset.h"
 
 
void AES_GLADIC_register()
{
 
s_vpi_systf_data tf_data;
 
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$bfm_generate_type";
tf_data.calltf = aes_bfm_generate_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
 
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$bfm_wr_aes128";
tf_data.calltf = aes_bfm_wr_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
//DMA WITH ERROR
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$bfm_wr_error_dinr_aes128";
tf_data.calltf = aes_bfm_wr_error_dinr_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$bfm_wr_error_doutr_aes128";
tf_data.calltf = aes_bfm_wr_error_doutr_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
// ENCRYPTION
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$bfm_encryption_ecb_aes128";
tf_data.calltf = aes_bfm_encryption_ecb_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$bfm_encryption_ecb_dma_aes128";
tf_data.calltf = aes_bfm_encryption_ecb_dma_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$bfm_encryption_ccfie_ecb_aes128";
tf_data.calltf = aes_bfm_encryption_ccfie_ecb_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
//DECRYPTION
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$bfm_decryption_ecb_aes128";
tf_data.calltf = aes_bfm_decryption_ecb_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$bfm_decryption_ecb_dma_aes128";
tf_data.calltf = aes_bfm_decryption_ecb_dma_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$bfm_decryption_ccfie_ecb_aes128";
tf_data.calltf = aes_bfm_decryption_ccfie_ecb_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
//DERIVATION DECRYPTION
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$bfm_derivation_decryption_ecb_aes128";
tf_data.calltf = aes_bfm_derivation_decryption_ecb_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$bfm_derivation_decryption_dma_ecb_aes128";
tf_data.calltf = aes_bfm_derivation_decryption_dma_ecb_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$bfm_derivation_decryption_ccfie_ecb_aes128";
tf_data.calltf = aes_bfm_derivation_decryption_ccfie_ecb_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
//KEY DERIVATION
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$bfm_key_generation_ecb_aes128";
tf_data.calltf = aes_bfm_key_generation_ecb_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$bfm_key_generation_dma_ecb_aes128";
tf_data.calltf = aes_bfm_key_generation_dma_ecb_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
 
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$bfm_key_generation_ccfie_ecb_aes128";
tf_data.calltf = aes_bfm_key_generation_ccfie_ecb_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
// RESET BFM
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$reset_aes128";
tf_data.calltf = aes_reset_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
//ENV CONFIGURATION
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$init";
tf_data.calltf = init_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$init_reset";
tf_data.calltf = init_reset_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
tf_data.type = vpiSysTask;
tf_data.sysfunctype = 0;
tf_data.tfname = "$monitor_aes";
tf_data.calltf = mon_calltf;
tf_data.compiletf = 0;
tf_data.sizetf = 0;
tf_data.user_data = 0;
vpi_register_systf(&tf_data);
 
}
 
 
void (*vlog_startup_routines[])() = {
AES_GLADIC_register,
0
};
 
/apbtoaes128/trunk/pli/aes_init.h
0,0 → 1,169
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
 
static int init_calltf(char*user_data)
{
 
vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
vpiHandle PWDATA = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);
vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);
vpiHandle PSEL = vpi_handle_by_name("AES_GLADIC_tb.PSEL", NULL);
vpiHandle PWRITE = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);
vpiHandle PADDR = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);
vpiHandle PRDATA = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);
vpiHandle PREADY = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);
vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);
vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);
vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);
vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);
vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);
vpiHandle i = vpi_handle_by_name("AES_GLADIC_tb.i", NULL);
 
 
 
//type_bfm = AES_WR_ONLY;
 
 
STATE = IDLE;
 
 
counter_write = 0;
counter_read = 0;
PACKETS_GENERATED = 0;
counter = 0;
reset_counter = 0;
flag = 0;
 
a = 0;
b = 0;
c = 0;
d = 0;
 
/* WRITE READ
vector_address[0]= ADDR_AES_CR;
vector_address[1]= ADDR_AES_SR;
vector_address[2]= ADDR_AES_DINR;
vector_address[3]= ADDR_AES_DOUTR;
vector_address[4]= ADDR_AES_KEYR3;
vector_address[5]= ADDR_AES_KEYR2;
vector_address[6]= ADDR_AES_KEYR1;
vector_address[7]= ADDR_AES_KEYR0;
vector_address[8]= ADDR_AES_IVR3;
vector_address[9]= ADDR_AES_IVR2;
vector_address[10]=ADDR_AES_IVR1;
vector_address[11]=ADDR_AES_IVR0;
*/
 
 
vector_address[0]= ADDR_AES_CR;
vector_address[1]= ADDR_AES_KEYR0;
vector_address[2]= ADDR_AES_KEYR1;
vector_address[3]= ADDR_AES_KEYR2;
vector_address[4]= ADDR_AES_KEYR3;
vector_address[5]= ADDR_AES_IVR3;
vector_address[6]= ADDR_AES_IVR2;
vector_address[7]= ADDR_AES_IVR1;
vector_address[8]= ADDR_AES_IVR0;
vector_address[9]= ADDR_AES_CR;
 
 
/*
vector_address[0]= ADDR_AES_CR;
vector_address[1]= ADDR_AES_SR;
vector_address[2]= ADDR_AES_DINR;
vector_address[3]= ADDR_AES_DOUTR;
vector_address[4]= ADDR_AES_KEYR3;
vector_address[5]= ADDR_AES_KEYR2;
vector_address[6]= ADDR_AES_KEYR1;
vector_address[7]= ADDR_AES_KEYR0;
vector_address[8]= ADDR_AES_IVR3;
vector_address[9]= ADDR_AES_IVR2;
vector_address[10]=ADDR_AES_IVR1;
vector_address[11]=ADDR_AES_IVR0;
*/
v_initial.format=vpiIntVal;
 
v_initial.value.integer = 0;
vpi_put_value(PENABLE, &v_initial, NULL, vpiNoDelay);
vpi_put_value(PSEL , &v_initial, NULL, vpiNoDelay);
vpi_put_value(PADDR, &v_initial, NULL, vpiNoDelay);
vpi_put_value(i, &v_initial, NULL, vpiNoDelay);
vpi_put_value(PWRITE, &v_initial, NULL, vpiNoDelay);
vpi_put_value(PWDATA, &v_initial, NULL, vpiNoDelay);
 
 
 
return 0;
}
/apbtoaes128/trunk/pli/aes_init_reset.h
0,0 → 1,87
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
 
static int init_reset_calltf(char*user_data)
{
 
STATE_RESET = IDLE;
RESET_GENERATED= 0;
 
reset_counter = 0;
counter_reset_enter = 0;
counter_reset_wait = 0;
 
return 0;
}
/apbtoaes128/trunk/pli/aes_bfm_reset.h
0,0 → 1,171
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
static int aes_reset_calltf(char*user_data)
{
 
vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
 
std::random_device rd_counter;
std::uniform_int_distribution<int> counter(1,50);
 
std::mt19937 rd;
std::uniform_real_distribution<> time(0,50);
 
v_reset.format=vpiIntVal;
 
//printf("STATE_RESET : %i\n",STATE_RESET);
//printf("MAX_RESET_TIMES : %i\n",MAX_RESET_TIMES);
//printf("RESET_GENERATED : %i\n",RESET_GENERATED);
switch(STATE_RESET)
{
 
case IDLE:
 
if(RESET_GENERATED > MAX_RESET_TIMES)
{
STATE_RESET = IDLE;
}else
{
 
STATE_RESET = ENTER_RESET;
 
v_reset.value.integer = 0;
t_reset.type = vpiScaledRealTime;
t_reset.real = time(rd);
v_wr.format=vpiIntVal;
v_reset.value.integer = 0;
vpi_put_value(PRESETn, &v_reset, &t_reset, vpiTransportDelay);
 
counter_reset_wait = counter(rd_counter);
 
}
 
counter_reset_enter=0;
counter_reset_wait=0;
 
 
break;
 
case ENTER_RESET:
if(counter_reset_enter >= counter_reset_wait)
{
v_reset.value.integer = 0;
t_reset.type = vpiScaledRealTime;
t_reset.real = time(rd);
v_wr.format=vpiIntVal;
v_reset.value.integer = 1;
vpi_put_value(PRESETn,&v_reset, &t_reset, vpiTransportDelay);
 
STATE_RESET = GET_OUT_RESET;
}
 
counter_reset_enter++;
break;
 
case GET_OUT_RESET:
 
counter_reset_wait=0;
counter_reset_enter=0;
 
STATE_RESET = WAIT_RESET;
 
counter_reset_wait = counter(rd_counter);
 
break;
 
case WAIT_RESET:
if(counter_reset_enter >= counter_reset_wait)
{
STATE_RESET = IDLE;
counter_reset_wait=0;
counter_reset_enter=0;
RESET_GENERATED++;
 
}
counter_reset_enter++;
 
 
break;
 
}
 
return 0;
}
 
/apbtoaes128/trunk/pli/aes_monitor.h
0,0 → 1,99
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
static int mon_calltf(char*user_data)
{
 
vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
vpiHandle PWDATA = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);
vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);
vpiHandle PWRITE = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);
vpiHandle PADDR = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);
vpiHandle PRDATA = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);
vpiHandle PREADY = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);
vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);
vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);
vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);
vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);
vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);
vpiHandle i = vpi_handle_by_name("AES_GLADIC_tb.i", NULL);
 
if(type_bfm == 2)
{
 
 
}
 
return 0;
}
/apbtoaes128/trunk/pli/aes_bfm_wr.h
0,0 → 1,332
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
static int aes_bfm_wr_calltf(char*user_data)
{
 
vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
vpiHandle PWDATA = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);
vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);
vpiHandle PSEL = vpi_handle_by_name("AES_GLADIC_tb.PSEL", NULL);
vpiHandle PWRITE = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);
vpiHandle PADDR = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);
vpiHandle PRDATA = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);
vpiHandle PREADY = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);
vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);
vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);
vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);
vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);
vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);
 
v_wr.format=vpiIntVal;
 
 
std::random_device rd;
std::uniform_int_distribution<long int> data_in(0,4294967295);
 
 
v_wr.format=vpiIntVal;
vpi_get_value(PRESETn, &v_wr);
 
 
if(type_bfm == AES_WR_ONLY && v_wr.value.integer == 1)
{
 
//printf("%i\n",STATE);
switch(STATE)
{
 
case IDLE:
 
 
if(PACKETS_GENERATED >= MAX_ITERATIONS)
{
STATE = IDLE;
type_bfm = 0;
 
}else
{
STATE = WRITE;
counter = 0;
 
v_wr.value.integer = vector_address[0];
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 4094;
vpi_put_value(PWDATA, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 1;
vpi_put_value(PWRITE, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 1;
vpi_put_value(PSEL, &v_wr, NULL, vpiNoDelay);
}
 
 
break;
 
case WRITE:
 
if(counter == 0)
{
 
counter_write++;
counter++;
 
v_wr.value.integer = 1;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
 
v_wr.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 0;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
t_wr.type = vpiScaledRealTime;
t_wr.real = 0;
v_wr.format=vpiIntVal;
 
if(FIPS_ENABLE == FIPS)
{
 
if(vector_address[counter_write] == ADDR_AES_KEYR3 || vector_address[counter_write] == ADDR_AES_IVR3)
{
a = a | KEY_FIPS_NOT_DERIVATED[0];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[1];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[2];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[3];
v_wr.value.integer = a;
}
 
 
if(vector_address[counter_write] == ADDR_AES_KEYR2 || vector_address[counter_write] == ADDR_AES_IVR2)
{
b = b | KEY_FIPS_NOT_DERIVATED[4];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[5];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[6];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[7];
v_wr.value.integer = b;
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR1 || vector_address[counter_write] == ADDR_AES_IVR1)
{
 
c = c | KEY_FIPS_NOT_DERIVATED[8];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[9];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[10];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[11];
v_wr.value.integer = c;
 
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR0 || vector_address[counter_write] == ADDR_AES_IVR0)
{
d = d | KEY_FIPS_NOT_DERIVATED[12];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[13];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[14];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[15];
v_wr.value.integer = d;
}
 
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_wr.value.integer = data_in(rd);
}
vpi_put_value(PWDATA, &v_wr, &t_wr, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
 
v_wr.value.integer = 1;
vpi_put_value(PSEL, &v_wr, NULL, vpiNoDelay);
 
counter=0;
}
 
if(counter_write == 12)
{
STATE =WAIT;
counter_write = 0;
 
}
 
 
break;
 
case WAIT:
 
v_wr.value.integer = 0;
vpi_put_value(PWRITE, &v_wr, NULL, vpiNoDelay);
 
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
vpi_put_value(PWDATA, &v_wr, &t_wr, vpiTransportDelay);
 
if(counter_wait == 5)
{
 
STATE = READ_RESULTS;
counter_wait=0;
v_wr.value.integer = vector_address[0];
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
 
}else
{
 
counter_wait++;
 
}
break;
 
case READ_RESULTS:
 
 
 
if(counter == 0)
{
 
v_wr.value.integer = 1;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
counter_read++;
counter++;
 
}else if(counter == 1)
{
counter++;
 
 
v_wr.value.integer = 0;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = vector_address[counter_read];
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 0;
vpi_put_value(PWDATA, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 1;
vpi_put_value(PSEL, &v_wr, NULL, vpiNoDelay);
 
counter=0;
 
}
 
if(counter_read == 12)
{
STATE = IDLE;
counter_read = 0;
PACKETS_GENERATED = PACKETS_GENERATED + 1;
 
v_wr.value.integer = 0;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
}
 
break;
}
 
 
}
 
 
return 0;
}
/apbtoaes128/trunk/pli/aes_bfm_generate.h
0,0 → 1,117
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
static int aes_bfm_generate_calltf(char*user_data)
{
 
 
vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
vpiHandle i = vpi_handle_by_name("AES_GLADIC_tb.i", NULL);
 
v_generate.format=vpiIntVal;
vpi_get_value(PRESETn, &v_generate);
 
if(v_generate.value.integer == 1)
{
 
FIPS_ENABLE = FIPS;
// type_bfm = AES_WR_ONLY;
// type_bfm = AES_WR_ERROR_DINR_ONLY;
// type_bfm = AES_WR_ERROR_DOUTR_ONLY;
 
// type_bfm = ECB_ENCRYPTION;
// type_bfm = ECB_DECRYPTION;
// type_bfm = ECB_KEY_GEN;
// type_bfm = ECB_DERIVATION_DECRYPTION;
 
// type_bfm = ECB_ENCRYPTION_DMA;
// type_bfm = ECB_DECRYPTION_DMA;
// type_bfm = ECB_KEY_GEN_DMA;
// type_bfm = ECB_DERIVATION_DECRYPTION_DMA;
 
// type_bfm = ECB_ENCRYPTION_CCFIE;
// type_bfm = ECB_DECRYPTION_CCFIE;
// type_bfm = ECB_DERIVATION_DECRYPTION_CCFIE;
type_bfm = ECB_KEY_GEN_CCFIE;
 
 
if(PACKETS_GENERATED == MAX_ITERATIONS)
{
v_generate.value.integer = 1;
vpi_put_value(i, &v_generate, NULL, vpiNoDelay);
}
}
 
return 0;
}
/apbtoaes128/trunk/pli/bfm_ecb/aes_bfm_derivation_decryption_ecb.h
0,0 → 1,528
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
static int aes_bfm_derivation_decryption_ecb_calltf(char*user_data)
{
 
vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
vpiHandle PWDATA = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);
vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);
vpiHandle PSEL = vpi_handle_by_name("AES_GLADIC_tb.PSEL", NULL);
vpiHandle PWRITE = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);
vpiHandle PADDR = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);
vpiHandle PRDATA = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);
vpiHandle PREADY = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);
vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);
vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);
vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);
vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);
vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);
 
std::random_device rd;
std::uniform_int_distribution<long int> data_in(0,4294967295);
v_ecb.format=vpiIntVal;
 
vpi_get_value(PRESETn, &v_ecb);
 
 
//printf("%i\n",STATE);
 
 
if(type_bfm == ECB_DERIVATION_DECRYPTION && v_ecb.value.integer == 1)
{
 
switch(STATE)
{
case IDLE:
 
if(PACKETS_GENERATED >= MAX_ITERATIONS)
{
 
STATE = IDLE;
type_bfm = 0;
 
}else
{
STATE = WRITE;
counter = 0;
 
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
v_ecb.value.integer = vector_address[0];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
}
 
break;
case WRITE:
if(counter == 0)
{
 
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter_write < 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
if(FIPS_ENABLE == FIPS)
{
 
if(vector_address[counter_write] == ADDR_AES_KEYR3 || vector_address[counter_write] == ADDR_AES_IVR3)
{
a = a | KEY_FIPS_NOT_DERIVATED[0];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[1];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[2];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[3];
v_ecb.value.integer = a;
}
 
 
if(vector_address[counter_write] == ADDR_AES_KEYR2 || vector_address[counter_write] == ADDR_AES_IVR2)
{
b = b | KEY_FIPS_NOT_DERIVATED[4];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[5];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[6];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[7];
v_ecb.value.integer = b;
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR1 || vector_address[counter_write] == ADDR_AES_IVR1)
{
 
c = c | KEY_FIPS_NOT_DERIVATED[8];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[9];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[10];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[11];
v_ecb.value.integer = c;
 
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR0 || vector_address[counter_write] == ADDR_AES_IVR0)
{
d = d | KEY_FIPS_NOT_DERIVATED[12];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[13];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[14];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[15];
v_ecb.value.integer = d;
}
 
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
 
//vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
}
//ENABLE CR
if(counter_write == 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = 25;//data_in(rd);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
//WRITE DINR
if(counter_write > 9 && counter_write < 14) //WRITE DINR
{
 
v_ecb.value.integer = ADDR_AES_DINR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
 
if(FIPS_ENABLE == FIPS)
{
 
if(counter_write == 10)
{
a = a | TEXT_FIPS_DERIVATED[0];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[1];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[2];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[3];
v_ecb.value.integer = a;
 
}else if(counter_write == 11)
{
b = b | TEXT_FIPS_DERIVATED[4];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[5];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[6];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[7];
v_ecb.value.integer = b;
 
}else if(counter_write == 12 )
{
 
c = c | TEXT_FIPS_DERIVATED[8];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[9];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[10];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[11];
v_ecb.value.integer = c;
 
}else if(counter_write == 13 )
{
d = d | TEXT_FIPS_DERIVATED[12];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[13];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[14];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[15];
v_ecb.value.integer = d;
 
}
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
//vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
 
 
}
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
if(counter_write == 14)
{
counter_write = 0;
 
STATE =WAIT_SR;
}
 
break;
 
case WAIT_SR:
 
v_ecb.value.integer = ADDR_AES_SR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
if(counter == 0)
{
 
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
v_ecb.value.integer = 0;
vpi_get_value(PRDATA,&v_ecb);
 
if(v_ecb.value.integer == 1)
{
STATE = READ_DOUTR;
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = ADDR_AES_DOUTR;
vpi_put_value(PADDR, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
break;
 
 
case READ_DOUTR:
 
 
if(counter == 0)
{
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter_read++;
counter++;
 
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
if(counter_read < 4)
{
v_ecb.value.integer = ADDR_AES_DOUTR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
if(counter_read == 4)
{
v_ecb.value.integer = ADDR_AES_KEYR3;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
if(counter_read == 5)
{
v_ecb.value.integer = ADDR_AES_KEYR2;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
 
if(counter_read == 6)
{
v_ecb.value.integer = ADDR_AES_KEYR1;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
if(counter_read == 7)
{
v_ecb.value.integer = ADDR_AES_KEYR0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
if(counter_read == 8)
{
v_ecb.value.integer = ADDR_AES_IVR3;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
if(counter_read == 9)
{
v_ecb.value.integer = ADDR_AES_IVR2;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
if(counter_read == 10)
{
v_ecb.value.integer = ADDR_AES_IVR1;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
if(counter_read == 11)
{
v_ecb.value.integer = ADDR_AES_IVR0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
counter = 0;
}
 
if(counter_read == 12 )
{
STATE = RESET_SR;
counter_read = 0;
counter_write = 0;
 
}
 
break;
 
case RESET_SR:
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 128;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter == 0)
{
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
counter=0;
 
}
 
if(counter_write == 1)
{
STATE =IDLE;
counter_write = 0;
counter=0;
PACKETS_GENERATED = PACKETS_GENERATED + 1;
}
 
 
break;
 
}
}
 
return 0;
}
/apbtoaes128/trunk/pli/bfm_ecb/aes_bfm_key_generation_dma_ecb.h
0,0 → 1,432
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
static int aes_bfm_key_generation_dma_ecb_calltf(char*user_data)
{
 
vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
vpiHandle PWDATA = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);
vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);
vpiHandle PSEL = vpi_handle_by_name("AES_GLADIC_tb.PSEL", NULL);
vpiHandle PWRITE = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);
vpiHandle PADDR = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);
vpiHandle PRDATA = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);
vpiHandle PREADY = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);
vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);
vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);
vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);
vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);
vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);
 
std::random_device rd;
std::uniform_int_distribution<long int> data_in(0,4294967295);
v_ecb.format=vpiIntVal;
 
vpi_get_value(PRESETn, &v_ecb);
 
 
//printf("%i\n",STATE);
 
 
if(type_bfm == ECB_KEY_GEN_DMA && v_ecb.value.integer == 1)
{
 
switch(STATE)
{
case IDLE:
 
if(PACKETS_GENERATED >= MAX_ITERATIONS)
{
 
STATE = IDLE;
type_bfm = 0;
 
}else
{
STATE = WRITE;
counter = 0;
 
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
v_ecb.value.integer = vector_address[0];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
}
 
break;
case WRITE:
if(counter == 0)
{
 
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter_write < 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
 
if(FIPS_ENABLE == FIPS)
{
 
if(vector_address[counter_write] == ADDR_AES_KEYR3 || vector_address[counter_write] == ADDR_AES_IVR3)
{
a = a | KEY_FIPS_NOT_DERIVATED[0];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[1];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[2];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[3];
v_ecb.value.integer = a;
}
 
 
if(vector_address[counter_write] == ADDR_AES_KEYR2 || vector_address[counter_write] == ADDR_AES_IVR2)
{
b = b | KEY_FIPS_NOT_DERIVATED[4];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[5];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[6];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[7];
v_ecb.value.integer = b;
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR1 || vector_address[counter_write] == ADDR_AES_IVR1)
{
 
c = c | KEY_FIPS_NOT_DERIVATED[8];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[9];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[10];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[11];
v_ecb.value.integer = c;
 
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR0 || vector_address[counter_write] == ADDR_AES_IVR0)
{
d = d | KEY_FIPS_NOT_DERIVATED[12];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[13];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[14];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[15];
v_ecb.value.integer = d;
}
 
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
 
//vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
}
 
if(counter_write == 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = 6153;
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
if(counter_write == 10)
{
counter_write = 0;
counter_read = 0;
 
STATE =WAIT_SR;
 
 
}
 
break;
 
case WAIT_SR:
 
v_ecb.value.integer = ADDR_AES_SR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
if(counter == 0)
{
 
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
v_ecb.value.integer = 0;
vpi_get_value(PRDATA,&v_ecb);
 
if(v_ecb.value.integer == 1)
{
STATE = READ_KEY_GEN;
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 10;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = ADDR_AES_KEYR3;
vpi_put_value(PADDR, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
break;
 
 
case READ_KEY_GEN:
 
 
if(counter == 0)
{
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter_read++;
counter++;
 
 
 
}else if(counter == 1)
{
 
if(counter_read == 0)
{
v_ecb.value.integer = ADDR_AES_KEYR3;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
}
 
 
if(counter_read == 1)
{
v_ecb.value.integer = ADDR_AES_KEYR2;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
}
 
 
if(counter_read == 2)
{
v_ecb.value.integer = ADDR_AES_KEYR1;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
}
 
if(counter_read == 3)
{
v_ecb.value.integer = ADDR_AES_KEYR0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
}
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter = 0;
}
 
if(counter_read == 4)
{
STATE = RESET_SR;
counter_write = 0;
counter_read = 0;
}
 
break;
 
case RESET_SR:
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 128;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter == 0)
{
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
counter=0;
 
}
 
if(counter_write == 1)
{
STATE =IDLE;
counter_write = 0;
counter=0;
PACKETS_GENERATED = PACKETS_GENERATED + 1;
}
 
 
break;
 
}
}
 
return 0;
}
/apbtoaes128/trunk/pli/bfm_ecb/aes_bfm_derivation_decryption_dma_ecb.h
0,0 → 1,528
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
static int aes_bfm_derivation_decryption_dma_ecb_calltf(char*user_data)
{
 
vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
vpiHandle PWDATA = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);
vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);
vpiHandle PSEL = vpi_handle_by_name("AES_GLADIC_tb.PSEL", NULL);
vpiHandle PWRITE = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);
vpiHandle PADDR = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);
vpiHandle PRDATA = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);
vpiHandle PREADY = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);
vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);
vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);
vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);
vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);
vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);
 
std::random_device rd;
std::uniform_int_distribution<long int> data_in(0,4294967295);
v_ecb.format=vpiIntVal;
 
vpi_get_value(PRESETn, &v_ecb);
 
 
//printf("%i\n",STATE);
 
 
if(type_bfm == ECB_DERIVATION_DECRYPTION_DMA && v_ecb.value.integer == 1)
{
 
switch(STATE)
{
case IDLE:
 
if(PACKETS_GENERATED >= MAX_ITERATIONS)
{
 
STATE = IDLE;
type_bfm = 0;
 
}else
{
STATE = WRITE;
counter = 0;
 
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
v_ecb.value.integer = vector_address[0];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
}
 
break;
case WRITE:
if(counter == 0)
{
 
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter_write < 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
if(FIPS_ENABLE == FIPS)
{
 
if(vector_address[counter_write] == ADDR_AES_KEYR3 || vector_address[counter_write] == ADDR_AES_IVR3)
{
a = a | KEY_FIPS_NOT_DERIVATED[0];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[1];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[2];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[3];
v_ecb.value.integer = a;
}
 
 
if(vector_address[counter_write] == ADDR_AES_KEYR2 || vector_address[counter_write] == ADDR_AES_IVR2)
{
b = b | KEY_FIPS_NOT_DERIVATED[4];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[5];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[6];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[7];
v_ecb.value.integer = b;
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR1 || vector_address[counter_write] == ADDR_AES_IVR1)
{
 
c = c | KEY_FIPS_NOT_DERIVATED[8];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[9];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[10];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[11];
v_ecb.value.integer = c;
 
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR0 || vector_address[counter_write] == ADDR_AES_IVR0)
{
d = d | KEY_FIPS_NOT_DERIVATED[12];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[13];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[14];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[15];
v_ecb.value.integer = d;
}
 
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
 
//vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
}
//ENABLE CR
if(counter_write == 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = 6169;
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
//WRITE DINR
if(counter_write > 9 && counter_write < 14) //WRITE DINR
{
 
v_ecb.value.integer = ADDR_AES_DINR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
 
if(FIPS_ENABLE == FIPS)
{
 
if(counter_write == 10)
{
a = a | TEXT_FIPS_DERIVATED[0];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[1];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[2];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[3];
v_ecb.value.integer = a;
 
}else if(counter_write == 11)
{
b = b | TEXT_FIPS_DERIVATED[4];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[5];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[6];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[7];
v_ecb.value.integer = b;
 
}else if(counter_write == 12 )
{
 
c = c | TEXT_FIPS_DERIVATED[8];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[9];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[10];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[11];
v_ecb.value.integer = c;
 
}else if(counter_write == 13 )
{
d = d | TEXT_FIPS_DERIVATED[12];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[13];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[14];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[15];
v_ecb.value.integer = d;
 
}
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
//vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
 
 
}
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
if(counter_write == 14)
{
counter_write = 0;
 
STATE =WAIT_SR;
}
 
break;
 
case WAIT_SR:
 
v_ecb.value.integer = ADDR_AES_SR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
if(counter == 0)
{
 
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
v_ecb.value.integer = 0;
vpi_get_value(PRDATA,&v_ecb);
 
if(v_ecb.value.integer == 1)
{
STATE = READ_DOUTR;
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = ADDR_AES_DOUTR;
vpi_put_value(PADDR, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
break;
 
 
case READ_DOUTR:
 
 
if(counter == 0)
{
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter_read++;
counter++;
 
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
if(counter_read < 4)
{
v_ecb.value.integer = ADDR_AES_DOUTR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
if(counter_read == 4)
{
v_ecb.value.integer = ADDR_AES_KEYR3;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
if(counter_read == 5)
{
v_ecb.value.integer = ADDR_AES_KEYR2;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
 
if(counter_read == 6)
{
v_ecb.value.integer = ADDR_AES_KEYR1;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
if(counter_read == 7)
{
v_ecb.value.integer = ADDR_AES_KEYR0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
if(counter_read == 8)
{
v_ecb.value.integer = ADDR_AES_IVR3;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
if(counter_read == 9)
{
v_ecb.value.integer = ADDR_AES_IVR2;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
if(counter_read == 10)
{
v_ecb.value.integer = ADDR_AES_IVR1;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
if(counter_read == 11)
{
v_ecb.value.integer = ADDR_AES_IVR0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
counter = 0;
}
 
if(counter_read == 12 )
{
STATE = RESET_SR;
counter_read = 0;
counter_write = 0;
 
}
 
break;
 
case RESET_SR:
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 128;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter == 0)
{
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
counter=0;
 
}
 
if(counter_write == 1)
{
STATE =IDLE;
counter_write = 0;
counter=0;
PACKETS_GENERATED = PACKETS_GENERATED + 1;
}
 
 
break;
 
}
}
 
return 0;
}
/apbtoaes128/trunk/pli/bfm_ecb/aes_bfm_decryption_ccfie_ecb.h
0,0 → 1,481
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
static int aes_bfm_decryption_ccfie_ecb_calltf(char*user_data)
{
 
vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
vpiHandle PWDATA = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);
vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);
vpiHandle PSEL = vpi_handle_by_name("AES_GLADIC_tb.PSEL", NULL);
vpiHandle PWRITE = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);
vpiHandle PADDR = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);
vpiHandle PRDATA = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);
vpiHandle PREADY = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);
vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);
vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);
vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);
vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);
vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);
 
std::random_device rd;
std::uniform_int_distribution<long int> data_in(0,4294967295);
v_ecb.format=vpiIntVal;
 
vpi_get_value(PRESETn, &v_ecb);
 
 
//printf("%i\n",STATE);
 
 
if(type_bfm == ECB_DECRYPTION_CCFIE && v_ecb.value.integer == 1)
{
 
switch(STATE)
{
case IDLE:
 
if(PACKETS_GENERATED >= MAX_ITERATIONS)
{
 
STATE = IDLE;
type_bfm = 0;
 
}else
{
STATE = WRITE;
counter = 0;
 
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
v_ecb.value.integer = vector_address[0];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
}
 
break;
case WRITE:
if(counter == 0)
{
 
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter_write < 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
if(FIPS_ENABLE == FIPS)
{
 
if(vector_address[counter_write] == ADDR_AES_KEYR3 || vector_address[counter_write] == ADDR_AES_IVR3)
{
a = a | KEY_FIPS_DERIVATED[0];
a = a << 8;
a = a | KEY_FIPS_DERIVATED[1];
a = a << 8;
a = a | KEY_FIPS_DERIVATED[2];
a = a << 8;
a = a | KEY_FIPS_DERIVATED[3];
v_ecb.value.integer = a;
}
 
 
if(vector_address[counter_write] == ADDR_AES_KEYR2 || vector_address[counter_write] == ADDR_AES_IVR2)
{
b = b | KEY_FIPS_DERIVATED[4];
b = b << 8;
b = b | KEY_FIPS_DERIVATED[5];
b = b << 8;
b = b | KEY_FIPS_DERIVATED[6];
b = b << 8;
b = b | KEY_FIPS_DERIVATED[7];
v_ecb.value.integer = b;
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR1 || vector_address[counter_write] == ADDR_AES_IVR1)
{
 
c = c | KEY_FIPS_DERIVATED[8];
c = c << 8;
c = c | KEY_FIPS_DERIVATED[9];
c = c << 8;
c = c | KEY_FIPS_DERIVATED[10];
c = c << 8;
c = c | KEY_FIPS_DERIVATED[11];
v_ecb.value.integer = c;
 
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR0 || vector_address[counter_write] == ADDR_AES_IVR0)
{
d = d | KEY_FIPS_DERIVATED[12];
d = d << 8;
d = d | KEY_FIPS_DERIVATED[13];
d = d << 8;
d = d | KEY_FIPS_DERIVATED[14];
d = d << 8;
d = d | KEY_FIPS_DERIVATED[15];
v_ecb.value.integer = d;
}
 
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
 
//vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
}
 
if(counter_write == 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = 529;
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
 
if(counter_write > 9 && counter_write < 14) //WRITE DINR
{
 
v_ecb.value.integer = ADDR_AES_DINR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
 
if(FIPS_ENABLE == FIPS)
{
 
if(counter_write == 10)
{
a = a | TEXT_FIPS_DERIVATED[0];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[1];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[2];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[3];
v_ecb.value.integer = a;
 
}else if(counter_write == 11)
{
b = b | TEXT_FIPS_DERIVATED[4];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[5];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[6];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[7];
v_ecb.value.integer = b;
 
}else if(counter_write == 12 )
{
 
c = c | TEXT_FIPS_DERIVATED[8];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[9];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[10];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[11];
v_ecb.value.integer = c;
 
}else if(counter_write == 13 )
{
d = d | TEXT_FIPS_DERIVATED[12];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[13];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[14];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[15];
v_ecb.value.integer = d;
 
}
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
//vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
 
 
}
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
if(counter_write == 14)
{
counter_write = 0;
 
STATE =WAIT_SR;
 
 
 
 
 
}
 
break;
 
case WAIT_SR:
 
v_ecb.value.integer = ADDR_AES_SR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
if(counter == 0)
{
 
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
v_ecb.value.integer = 0;
vpi_get_value(PRDATA,&v_ecb);
 
if(v_ecb.value.integer == 1)
{
STATE = READ_DOUTR;
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = ADDR_AES_DOUTR;
vpi_put_value(PADDR, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
break;
 
 
case READ_DOUTR:
 
 
if(counter == 0)
{
 
v_ecb.value.integer = ADDR_AES_DOUTR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter_write++;
counter++;
 
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter = 0;
}
 
if(counter_write == 4)
{
STATE = RESET_SR;
counter_write = 0;
 
}
 
break;
 
case RESET_SR:
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 128;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter == 0)
{
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
counter=0;
 
}
 
if(counter_write == 1)
{
STATE =IDLE;
counter_write = 0;
counter=0;
PACKETS_GENERATED = PACKETS_GENERATED + 1;
}
 
 
break;
 
}
}
 
return 0;
}
/apbtoaes128/trunk/pli/bfm_ecb/aes_bfm_encryption_ecb.h
0,0 → 1,472
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
static int aes_bfm_encryption_ecb_calltf(char*user_data)
{
 
vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
vpiHandle PWDATA = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);
vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);
vpiHandle PSEL = vpi_handle_by_name("AES_GLADIC_tb.PSEL", NULL);
vpiHandle PWRITE = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);
vpiHandle PADDR = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);
vpiHandle PRDATA = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);
vpiHandle PREADY = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);
vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);
vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);
vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);
vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);
vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);
 
std::random_device rd;
std::uniform_int_distribution<long int> data_in(0,4294967295);
v_ecb.format=vpiIntVal;
 
vpi_get_value(PRESETn, &v_ecb);
 
 
//printf("%i\n",STATE);
 
 
if(type_bfm == ECB_ENCRYPTION && v_ecb.value.integer == 1)
{
 
switch(STATE)
{
case IDLE:
 
if(PACKETS_GENERATED >= MAX_ITERATIONS)
{
 
STATE = IDLE;
type_bfm = 0;
 
}else
{
STATE = WRITE;
counter = 0;
 
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
v_ecb.value.integer = vector_address[0];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
}
 
break;
case WRITE:
 
 
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
if(counter == 0)
{
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
 
 
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
if(counter_write < 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, &t_ecb, vpiTransportDelay);
 
if(FIPS_ENABLE == FIPS)
{
 
if(vector_address[counter_write] == ADDR_AES_KEYR3 || vector_address[counter_write] == ADDR_AES_IVR3)
{
a = a | KEY_FIPS_NOT_DERIVATED[0];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[1];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[2];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[3];
v_ecb.value.integer = a;
}
 
 
if(vector_address[counter_write] == ADDR_AES_KEYR2 || vector_address[counter_write] == ADDR_AES_IVR2)
{
b = b | KEY_FIPS_NOT_DERIVATED[4];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[5];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[6];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[7];
v_ecb.value.integer = b;
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR1 || vector_address[counter_write] == ADDR_AES_IVR1)
{
 
c = c | KEY_FIPS_NOT_DERIVATED[8];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[9];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[10];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[11];
v_ecb.value.integer = c;
 
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR0 || vector_address[counter_write] == ADDR_AES_IVR0)
{
d = d | KEY_FIPS_NOT_DERIVATED[12];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[13];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[14];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[15];
v_ecb.value.integer = d;
}
 
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
 
}else if(counter_write == 9)//ENABLE CR
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
}else if(counter_write > 9 && counter_write < 14) //WRITE DINR
{
 
v_ecb.value.integer = ADDR_AES_DINR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
 
if(FIPS_ENABLE == FIPS)
{
 
if(counter_write == 10)
{
a = a | TEXT_FIPS_NOT_DERIVATED[0];
a = a << 8;
a = a | TEXT_FIPS_NOT_DERIVATED[1];
a = a << 8;
a = a | TEXT_FIPS_NOT_DERIVATED[2];
a = a << 8;
a = a | TEXT_FIPS_NOT_DERIVATED[3];
v_ecb.value.integer = a;
 
}else if(counter_write == 11)
{
b = b | TEXT_FIPS_NOT_DERIVATED[4];
b = b << 8;
b = b | TEXT_FIPS_NOT_DERIVATED[5];
b = b << 8;
b = b | TEXT_FIPS_NOT_DERIVATED[6];
b = b << 8;
b = b | TEXT_FIPS_NOT_DERIVATED[7];
v_ecb.value.integer = b;
 
}else if(counter_write == 12 )
{
 
c = c | TEXT_FIPS_NOT_DERIVATED[8];
c = c << 8;
c = c | TEXT_FIPS_NOT_DERIVATED[9];
c = c << 8;
c = c | TEXT_FIPS_NOT_DERIVATED[10];
c = c << 8;
c = c | TEXT_FIPS_NOT_DERIVATED[11];
v_ecb.value.integer = c;
 
}else if(counter_write == 13 )
{
d = d | TEXT_FIPS_NOT_DERIVATED[12];
d = d << 8;
d = d | TEXT_FIPS_NOT_DERIVATED[13];
d = d << 8;
d = d | TEXT_FIPS_NOT_DERIVATED[14];
d = d << 8;
d = d | TEXT_FIPS_NOT_DERIVATED[15];
v_ecb.value.integer = d;
 
}
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
 
 
}
counter=0;
 
}
 
 
 
if(counter_write == 14)
{
counter_write = 0;
STATE = WAIT_SR;
}
 
break;
 
case WAIT_SR:
 
v_ecb.value.integer = ADDR_AES_SR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
if(counter == 0)
{
 
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
v_ecb.value.integer = 0;
vpi_get_value(PRDATA,&v_ecb);
 
if(v_ecb.value.integer == 1)
{
STATE = READ_DOUTR;
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 10;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = ADDR_AES_DOUTR;
vpi_put_value(PADDR, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
break;
 
 
case READ_DOUTR:
 
 
if(counter == 0)
{
 
v_ecb.value.integer = ADDR_AES_DOUTR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter_write++;
counter++;
 
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter = 0;
}
 
if(counter_write == 4)
{
STATE = RESET_SR;
counter_write = 0;
}
 
break;
 
case RESET_SR:
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 128;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter == 0)
{
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
counter=0;
 
}
 
if(counter_write == 1)
{
STATE =IDLE;
counter_write = 0;
counter=0;
 
PACKETS_GENERATED = PACKETS_GENERATED + 1;
}
 
 
break;
 
}
}
 
return 0;
}
/apbtoaes128/trunk/pli/bfm_ecb/aes_bfm_encryption_dma_ecb.h
0,0 → 1,481
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
static int aes_bfm_encryption_ecb_dma_calltf(char*user_data)
{
 
vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
vpiHandle PWDATA = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);
vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);
vpiHandle PSEL = vpi_handle_by_name("AES_GLADIC_tb.PSEL", NULL);
vpiHandle PWRITE = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);
vpiHandle PADDR = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);
vpiHandle PRDATA = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);
vpiHandle PREADY = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);
vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);
vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);
vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);
vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);
vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);
 
std::random_device rd;
std::uniform_int_distribution<long int> data_in(0,4294967295);
v_ecb.format=vpiIntVal;
 
vpi_get_value(PRESETn, &v_ecb);
 
 
//printf("%i\n",STATE);
 
 
if(type_bfm == ECB_ENCRYPTION_DMA && v_ecb.value.integer == 1)
{
 
switch(STATE)
{
case IDLE:
 
if(PACKETS_GENERATED >= MAX_ITERATIONS)
{
 
STATE = IDLE;
type_bfm = 0;
 
}else
{
STATE = WRITE;
counter = 0;
 
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
v_ecb.value.integer = vector_address[0];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
}
 
break;
case WRITE:
 
 
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
if(counter == 0)
{
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
 
 
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
if(counter_write < 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
 
vpi_put_value(PADDR, &v_ecb, &t_ecb, vpiTransportDelay);
//vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
if(FIPS_ENABLE == FIPS)
{
 
if(vector_address[counter_write] == ADDR_AES_KEYR3 || vector_address[counter_write] == ADDR_AES_IVR3)
{
a = a | KEY_FIPS_NOT_DERIVATED[0];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[1];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[2];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[3];
v_ecb.value.integer = a;
}
 
 
if(vector_address[counter_write] == ADDR_AES_KEYR2 || vector_address[counter_write] == ADDR_AES_IVR2)
{
b = b | KEY_FIPS_NOT_DERIVATED[4];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[5];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[6];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[7];
v_ecb.value.integer = b;
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR1 || vector_address[counter_write] == ADDR_AES_IVR1)
{
 
c = c | KEY_FIPS_NOT_DERIVATED[8];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[9];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[10];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[11];
v_ecb.value.integer = c;
 
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR0 || vector_address[counter_write] == ADDR_AES_IVR0)
{
d = d | KEY_FIPS_NOT_DERIVATED[12];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[13];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[14];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[15];
v_ecb.value.integer = d;
}
 
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
 
//vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
 
}else if(counter_write == 9)//ENABLE CR
{
 
v_ecb.value.integer = ADDR_AES_CR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
//v_ecb.value.integer = 1;
//vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 6145;//data_in(rd);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
}else if(counter_write > 9 && counter_write < 14) //WRITE DINR
{
 
v_ecb.value.integer = ADDR_AES_DINR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
 
if(FIPS_ENABLE == FIPS)
{
 
if(counter_write == 10)
{
a = a | TEXT_FIPS_NOT_DERIVATED[0];
a = a << 8;
a = a | TEXT_FIPS_NOT_DERIVATED[1];
a = a << 8;
a = a | TEXT_FIPS_NOT_DERIVATED[2];
a = a << 8;
a = a | TEXT_FIPS_NOT_DERIVATED[3];
v_ecb.value.integer = a;
 
}else if(counter_write == 11)
{
b = b | TEXT_FIPS_NOT_DERIVATED[4];
b = b << 8;
b = b | TEXT_FIPS_NOT_DERIVATED[5];
b = b << 8;
b = b | TEXT_FIPS_NOT_DERIVATED[6];
b = b << 8;
b = b | TEXT_FIPS_NOT_DERIVATED[7];
v_ecb.value.integer = b;
 
}else if(counter_write == 12 )
{
 
c = c | TEXT_FIPS_NOT_DERIVATED[8];
c = c << 8;
c = c | TEXT_FIPS_NOT_DERIVATED[9];
c = c << 8;
c = c | TEXT_FIPS_NOT_DERIVATED[10];
c = c << 8;
c = c | TEXT_FIPS_NOT_DERIVATED[11];
v_ecb.value.integer = c;
 
}else if(counter_write == 13 )
{
d = d | TEXT_FIPS_NOT_DERIVATED[12];
d = d << 8;
d = d | TEXT_FIPS_NOT_DERIVATED[13];
d = d << 8;
d = d | TEXT_FIPS_NOT_DERIVATED[14];
d = d << 8;
d = d | TEXT_FIPS_NOT_DERIVATED[15];
v_ecb.value.integer = d;
 
}
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
//vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
 
 
}
counter=0;
 
}
 
 
 
if(counter_write == 14)
{
counter_write = 0;
STATE = WAIT_SR;
}
 
break;
 
case WAIT_SR:
 
v_ecb.value.integer = ADDR_AES_SR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
//vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter == 0)
{
 
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
v_ecb.value.integer = 0;
vpi_get_value(PRDATA,&v_ecb);
 
if(v_ecb.value.integer == 1)
{
STATE = READ_DOUTR;
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 10;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = ADDR_AES_DOUTR;
vpi_put_value(PADDR, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
break;
 
 
case READ_DOUTR:
 
 
if(counter == 0)
{
 
v_ecb.value.integer = ADDR_AES_DOUTR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter_write++;
counter++;
 
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter = 0;
}
 
if(counter_write == 4)
{
STATE = RESET_SR;
counter_write = 0;
}
 
break;
 
case RESET_SR:
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 128;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter == 0)
{
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
counter=0;
 
}
 
if(counter_write == 1)
{
STATE =IDLE;
counter_write = 0;
counter=0;
 
PACKETS_GENERATED = PACKETS_GENERATED + 1;
}
 
 
break;
 
}
}
 
return 0;
}
/apbtoaes128/trunk/pli/bfm_ecb/aes_bfm_key_generation_ccfie_ecb.h
0,0 → 1,432
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
static int aes_bfm_key_generation_ccfie_ecb_calltf(char*user_data)
{
 
vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
vpiHandle PWDATA = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);
vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);
vpiHandle PSEL = vpi_handle_by_name("AES_GLADIC_tb.PSEL", NULL);
vpiHandle PWRITE = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);
vpiHandle PADDR = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);
vpiHandle PRDATA = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);
vpiHandle PREADY = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);
vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);
vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);
vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);
vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);
vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);
 
std::random_device rd;
std::uniform_int_distribution<long int> data_in(0,4294967295);
v_ecb.format=vpiIntVal;
 
vpi_get_value(PRESETn, &v_ecb);
 
 
//printf("%i\n",STATE);
 
 
if(type_bfm == ECB_KEY_GEN_CCFIE && v_ecb.value.integer == 1)
{
 
switch(STATE)
{
case IDLE:
 
if(PACKETS_GENERATED >= MAX_ITERATIONS)
{
 
STATE = IDLE;
type_bfm = 0;
 
}else
{
STATE = WRITE;
counter = 0;
 
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
v_ecb.value.integer = vector_address[0];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
}
 
break;
case WRITE:
if(counter == 0)
{
 
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter_write < 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
 
if(FIPS_ENABLE == FIPS)
{
 
if(vector_address[counter_write] == ADDR_AES_KEYR3 || vector_address[counter_write] == ADDR_AES_IVR3)
{
a = a | KEY_FIPS_NOT_DERIVATED[0];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[1];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[2];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[3];
v_ecb.value.integer = a;
}
 
 
if(vector_address[counter_write] == ADDR_AES_KEYR2 || vector_address[counter_write] == ADDR_AES_IVR2)
{
b = b | KEY_FIPS_NOT_DERIVATED[4];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[5];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[6];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[7];
v_ecb.value.integer = b;
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR1 || vector_address[counter_write] == ADDR_AES_IVR1)
{
 
c = c | KEY_FIPS_NOT_DERIVATED[8];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[9];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[10];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[11];
v_ecb.value.integer = c;
 
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR0 || vector_address[counter_write] == ADDR_AES_IVR0)
{
d = d | KEY_FIPS_NOT_DERIVATED[12];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[13];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[14];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[15];
v_ecb.value.integer = d;
}
 
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
 
//vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
}
 
if(counter_write == 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = 521;
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
if(counter_write == 10)
{
counter_write = 0;
counter_read = 0;
 
STATE =WAIT_SR;
 
 
}
 
break;
 
case WAIT_SR:
 
v_ecb.value.integer = ADDR_AES_SR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
if(counter == 0)
{
 
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
v_ecb.value.integer = 0;
vpi_get_value(PRDATA,&v_ecb);
 
if(v_ecb.value.integer == 1)
{
STATE = READ_KEY_GEN;
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 10;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = ADDR_AES_KEYR3;
vpi_put_value(PADDR, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
break;
 
 
case READ_KEY_GEN:
 
 
if(counter == 0)
{
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter_read++;
counter++;
 
 
 
}else if(counter == 1)
{
 
if(counter_read == 0)
{
v_ecb.value.integer = ADDR_AES_KEYR3;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
}
 
 
if(counter_read == 1)
{
v_ecb.value.integer = ADDR_AES_KEYR2;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
}
 
 
if(counter_read == 2)
{
v_ecb.value.integer = ADDR_AES_KEYR1;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
}
 
if(counter_read == 3)
{
v_ecb.value.integer = ADDR_AES_KEYR0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
}
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter = 0;
}
 
if(counter_read == 4)
{
STATE = RESET_SR;
counter_write = 0;
counter_read = 0;
}
 
break;
 
case RESET_SR:
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 128;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter == 0)
{
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
counter=0;
 
}
 
if(counter_write == 1)
{
STATE =IDLE;
counter_write = 0;
counter=0;
PACKETS_GENERATED = PACKETS_GENERATED + 1;
}
 
 
break;
 
}
}
 
return 0;
}
/apbtoaes128/trunk/pli/bfm_ecb/aes_bfm_derivation_decryption_ccfie_ecb.h
0,0 → 1,528
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
static int aes_bfm_derivation_decryption_ccfie_ecb_calltf(char*user_data)
{
 
vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
vpiHandle PWDATA = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);
vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);
vpiHandle PSEL = vpi_handle_by_name("AES_GLADIC_tb.PSEL", NULL);
vpiHandle PWRITE = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);
vpiHandle PADDR = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);
vpiHandle PRDATA = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);
vpiHandle PREADY = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);
vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);
vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);
vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);
vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);
vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);
 
std::random_device rd;
std::uniform_int_distribution<long int> data_in(0,4294967295);
v_ecb.format=vpiIntVal;
 
vpi_get_value(PRESETn, &v_ecb);
 
 
//printf("%i\n",STATE);
 
 
if(type_bfm == ECB_DERIVATION_DECRYPTION_CCFIE && v_ecb.value.integer == 1)
{
 
switch(STATE)
{
case IDLE:
 
if(PACKETS_GENERATED >= MAX_ITERATIONS)
{
 
STATE = IDLE;
type_bfm = 0;
 
}else
{
STATE = WRITE;
counter = 0;
 
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
v_ecb.value.integer = vector_address[0];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
}
 
break;
case WRITE:
if(counter == 0)
{
 
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter_write < 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
if(FIPS_ENABLE == FIPS)
{
 
if(vector_address[counter_write] == ADDR_AES_KEYR3 || vector_address[counter_write] == ADDR_AES_IVR3)
{
a = a | KEY_FIPS_NOT_DERIVATED[0];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[1];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[2];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[3];
v_ecb.value.integer = a;
}
 
 
if(vector_address[counter_write] == ADDR_AES_KEYR2 || vector_address[counter_write] == ADDR_AES_IVR2)
{
b = b | KEY_FIPS_NOT_DERIVATED[4];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[5];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[6];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[7];
v_ecb.value.integer = b;
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR1 || vector_address[counter_write] == ADDR_AES_IVR1)
{
 
c = c | KEY_FIPS_NOT_DERIVATED[8];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[9];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[10];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[11];
v_ecb.value.integer = c;
 
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR0 || vector_address[counter_write] == ADDR_AES_IVR0)
{
d = d | KEY_FIPS_NOT_DERIVATED[12];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[13];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[14];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[15];
v_ecb.value.integer = d;
}
 
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
 
//vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
}
//ENABLE CR
if(counter_write == 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = 537;//data_in(rd);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
//WRITE DINR
if(counter_write > 9 && counter_write < 14) //WRITE DINR
{
 
v_ecb.value.integer = ADDR_AES_DINR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
 
if(FIPS_ENABLE == FIPS)
{
 
if(counter_write == 10)
{
a = a | TEXT_FIPS_DERIVATED[0];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[1];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[2];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[3];
v_ecb.value.integer = a;
 
}else if(counter_write == 11)
{
b = b | TEXT_FIPS_DERIVATED[4];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[5];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[6];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[7];
v_ecb.value.integer = b;
 
}else if(counter_write == 12 )
{
 
c = c | TEXT_FIPS_DERIVATED[8];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[9];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[10];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[11];
v_ecb.value.integer = c;
 
}else if(counter_write == 13 )
{
d = d | TEXT_FIPS_DERIVATED[12];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[13];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[14];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[15];
v_ecb.value.integer = d;
 
}
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
//vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
 
 
}
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
if(counter_write == 14)
{
counter_write = 0;
 
STATE =WAIT_SR;
}
 
break;
 
case WAIT_SR:
 
v_ecb.value.integer = ADDR_AES_SR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
if(counter == 0)
{
 
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
v_ecb.value.integer = 0;
vpi_get_value(PRDATA,&v_ecb);
 
if(v_ecb.value.integer == 1)
{
STATE = READ_DOUTR;
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = ADDR_AES_DOUTR;
vpi_put_value(PADDR, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
break;
 
 
case READ_DOUTR:
 
 
if(counter == 0)
{
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter_read++;
counter++;
 
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
if(counter_read < 4)
{
v_ecb.value.integer = ADDR_AES_DOUTR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
if(counter_read == 4)
{
v_ecb.value.integer = ADDR_AES_KEYR3;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
if(counter_read == 5)
{
v_ecb.value.integer = ADDR_AES_KEYR2;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
 
if(counter_read == 6)
{
v_ecb.value.integer = ADDR_AES_KEYR1;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
if(counter_read == 7)
{
v_ecb.value.integer = ADDR_AES_KEYR0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
if(counter_read == 8)
{
v_ecb.value.integer = ADDR_AES_IVR3;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
if(counter_read == 9)
{
v_ecb.value.integer = ADDR_AES_IVR2;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
if(counter_read == 10)
{
v_ecb.value.integer = ADDR_AES_IVR1;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
if(counter_read == 11)
{
v_ecb.value.integer = ADDR_AES_IVR0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
}
 
counter = 0;
}
 
if(counter_read == 12 )
{
STATE = RESET_SR;
counter_read = 0;
counter_write = 0;
 
}
 
break;
 
case RESET_SR:
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 128;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter == 0)
{
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
counter=0;
 
}
 
if(counter_write == 1)
{
STATE =IDLE;
counter_write = 0;
counter=0;
PACKETS_GENERATED = PACKETS_GENERATED + 1;
}
 
 
break;
 
}
}
 
return 0;
}
/apbtoaes128/trunk/pli/bfm_ecb/aes_bfm_decryption_ecb.h
0,0 → 1,481
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
static int aes_bfm_decryption_ecb_calltf(char*user_data)
{
 
vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
vpiHandle PWDATA = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);
vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);
vpiHandle PSEL = vpi_handle_by_name("AES_GLADIC_tb.PSEL", NULL);
vpiHandle PWRITE = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);
vpiHandle PADDR = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);
vpiHandle PRDATA = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);
vpiHandle PREADY = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);
vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);
vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);
vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);
vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);
vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);
 
std::random_device rd;
std::uniform_int_distribution<long int> data_in(0,4294967295);
v_ecb.format=vpiIntVal;
 
vpi_get_value(PRESETn, &v_ecb);
 
 
//printf("%i\n",STATE);
 
 
if(type_bfm == ECB_DECRYPTION && v_ecb.value.integer == 1)
{
 
switch(STATE)
{
case IDLE:
 
if(PACKETS_GENERATED >= MAX_ITERATIONS)
{
 
STATE = IDLE;
type_bfm = 0;
 
}else
{
STATE = WRITE;
counter = 0;
 
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
v_ecb.value.integer = vector_address[0];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
}
 
break;
case WRITE:
if(counter == 0)
{
 
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter_write < 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
if(FIPS_ENABLE == FIPS)
{
 
if(vector_address[counter_write] == ADDR_AES_KEYR3 || vector_address[counter_write] == ADDR_AES_IVR3)
{
a = a | KEY_FIPS_DERIVATED[0];
a = a << 8;
a = a | KEY_FIPS_DERIVATED[1];
a = a << 8;
a = a | KEY_FIPS_DERIVATED[2];
a = a << 8;
a = a | KEY_FIPS_DERIVATED[3];
v_ecb.value.integer = a;
}
 
 
if(vector_address[counter_write] == ADDR_AES_KEYR2 || vector_address[counter_write] == ADDR_AES_IVR2)
{
b = b | KEY_FIPS_DERIVATED[4];
b = b << 8;
b = b | KEY_FIPS_DERIVATED[5];
b = b << 8;
b = b | KEY_FIPS_DERIVATED[6];
b = b << 8;
b = b | KEY_FIPS_DERIVATED[7];
v_ecb.value.integer = b;
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR1 || vector_address[counter_write] == ADDR_AES_IVR1)
{
 
c = c | KEY_FIPS_DERIVATED[8];
c = c << 8;
c = c | KEY_FIPS_DERIVATED[9];
c = c << 8;
c = c | KEY_FIPS_DERIVATED[10];
c = c << 8;
c = c | KEY_FIPS_DERIVATED[11];
v_ecb.value.integer = c;
 
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR0 || vector_address[counter_write] == ADDR_AES_IVR0)
{
d = d | KEY_FIPS_DERIVATED[12];
d = d << 8;
d = d | KEY_FIPS_DERIVATED[13];
d = d << 8;
d = d | KEY_FIPS_DERIVATED[14];
d = d << 8;
d = d | KEY_FIPS_DERIVATED[15];
v_ecb.value.integer = d;
}
 
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
 
//vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
}
 
if(counter_write == 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = 17;
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
 
if(counter_write > 9 && counter_write < 14) //WRITE DINR
{
 
v_ecb.value.integer = ADDR_AES_DINR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
 
if(FIPS_ENABLE == FIPS)
{
 
if(counter_write == 10)
{
a = a | TEXT_FIPS_DERIVATED[0];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[1];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[2];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[3];
v_ecb.value.integer = a;
 
}else if(counter_write == 11)
{
b = b | TEXT_FIPS_DERIVATED[4];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[5];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[6];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[7];
v_ecb.value.integer = b;
 
}else if(counter_write == 12 )
{
 
c = c | TEXT_FIPS_DERIVATED[8];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[9];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[10];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[11];
v_ecb.value.integer = c;
 
}else if(counter_write == 13 )
{
d = d | TEXT_FIPS_DERIVATED[12];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[13];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[14];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[15];
v_ecb.value.integer = d;
 
}
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
//vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
 
 
}
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
if(counter_write == 14)
{
counter_write = 0;
 
STATE =WAIT_SR;
 
 
 
 
 
}
 
break;
 
case WAIT_SR:
 
v_ecb.value.integer = ADDR_AES_SR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
if(counter == 0)
{
 
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
v_ecb.value.integer = 0;
vpi_get_value(PRDATA,&v_ecb);
 
if(v_ecb.value.integer == 1)
{
STATE = READ_DOUTR;
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = ADDR_AES_DOUTR;
vpi_put_value(PADDR, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
break;
 
 
case READ_DOUTR:
 
 
if(counter == 0)
{
 
v_ecb.value.integer = ADDR_AES_DOUTR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter_write++;
counter++;
 
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter = 0;
}
 
if(counter_write == 4)
{
STATE = RESET_SR;
counter_write = 0;
 
}
 
break;
 
case RESET_SR:
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 128;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter == 0)
{
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
counter=0;
 
}
 
if(counter_write == 1)
{
STATE =IDLE;
counter_write = 0;
counter=0;
PACKETS_GENERATED = PACKETS_GENERATED + 1;
}
 
 
break;
 
}
}
 
return 0;
}
/apbtoaes128/trunk/pli/bfm_ecb/aes_bfm_decryption_dma_ecb.h
0,0 → 1,481
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
static int aes_bfm_decryption_ecb_dma_calltf(char*user_data)
{
 
vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
vpiHandle PWDATA = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);
vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);
vpiHandle PSEL = vpi_handle_by_name("AES_GLADIC_tb.PSEL", NULL);
vpiHandle PWRITE = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);
vpiHandle PADDR = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);
vpiHandle PRDATA = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);
vpiHandle PREADY = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);
vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);
vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);
vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);
vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);
vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);
 
std::random_device rd;
std::uniform_int_distribution<long int> data_in(0,4294967295);
v_ecb.format=vpiIntVal;
 
vpi_get_value(PRESETn, &v_ecb);
 
 
//printf("%i\n",STATE);
 
 
if(type_bfm == ECB_DECRYPTION_DMA && v_ecb.value.integer == 1)
{
 
switch(STATE)
{
case IDLE:
 
if(PACKETS_GENERATED >= MAX_ITERATIONS)
{
 
STATE = IDLE;
type_bfm = 0;
 
}else
{
STATE = WRITE;
counter = 0;
 
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
v_ecb.value.integer = vector_address[0];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
}
 
break;
case WRITE:
if(counter == 0)
{
 
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter_write < 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
if(FIPS_ENABLE == FIPS)
{
 
if(vector_address[counter_write] == ADDR_AES_KEYR3 || vector_address[counter_write] == ADDR_AES_IVR3)
{
a = a | KEY_FIPS_DERIVATED[0];
a = a << 8;
a = a | KEY_FIPS_DERIVATED[1];
a = a << 8;
a = a | KEY_FIPS_DERIVATED[2];
a = a << 8;
a = a | KEY_FIPS_DERIVATED[3];
v_ecb.value.integer = a;
}
 
 
if(vector_address[counter_write] == ADDR_AES_KEYR2 || vector_address[counter_write] == ADDR_AES_IVR2)
{
b = b | KEY_FIPS_DERIVATED[4];
b = b << 8;
b = b | KEY_FIPS_DERIVATED[5];
b = b << 8;
b = b | KEY_FIPS_DERIVATED[6];
b = b << 8;
b = b | KEY_FIPS_DERIVATED[7];
v_ecb.value.integer = b;
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR1 || vector_address[counter_write] == ADDR_AES_IVR1)
{
 
c = c | KEY_FIPS_DERIVATED[8];
c = c << 8;
c = c | KEY_FIPS_DERIVATED[9];
c = c << 8;
c = c | KEY_FIPS_DERIVATED[10];
c = c << 8;
c = c | KEY_FIPS_DERIVATED[11];
v_ecb.value.integer = c;
 
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR0 || vector_address[counter_write] == ADDR_AES_IVR0)
{
d = d | KEY_FIPS_DERIVATED[12];
d = d << 8;
d = d | KEY_FIPS_DERIVATED[13];
d = d << 8;
d = d | KEY_FIPS_DERIVATED[14];
d = d << 8;
d = d | KEY_FIPS_DERIVATED[15];
v_ecb.value.integer = d;
}
 
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
 
//vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
}
 
if(counter_write == 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = 6161;
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
 
if(counter_write > 9 && counter_write < 14) //WRITE DINR
{
 
v_ecb.value.integer = ADDR_AES_DINR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
 
if(FIPS_ENABLE == FIPS)
{
 
if(counter_write == 10)
{
a = a | TEXT_FIPS_DERIVATED[0];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[1];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[2];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[3];
v_ecb.value.integer = a;
 
}else if(counter_write == 11)
{
b = b | TEXT_FIPS_DERIVATED[4];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[5];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[6];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[7];
v_ecb.value.integer = b;
 
}else if(counter_write == 12 )
{
 
c = c | TEXT_FIPS_DERIVATED[8];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[9];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[10];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[11];
v_ecb.value.integer = c;
 
}else if(counter_write == 13 )
{
d = d | TEXT_FIPS_DERIVATED[12];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[13];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[14];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[15];
v_ecb.value.integer = d;
 
}
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
//vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
 
 
}
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
if(counter_write == 14)
{
counter_write = 0;
 
STATE =WAIT_SR;
 
 
 
 
 
}
 
break;
 
case WAIT_SR:
 
v_ecb.value.integer = ADDR_AES_SR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
if(counter == 0)
{
 
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
v_ecb.value.integer = 0;
vpi_get_value(PRDATA,&v_ecb);
 
if(v_ecb.value.integer == 1)
{
STATE = READ_DOUTR;
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = ADDR_AES_DOUTR;
vpi_put_value(PADDR, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
break;
 
 
case READ_DOUTR:
 
 
if(counter == 0)
{
 
v_ecb.value.integer = ADDR_AES_DOUTR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter_write++;
counter++;
 
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter = 0;
}
 
if(counter_write == 4)
{
STATE = RESET_SR;
counter_write = 0;
 
}
 
break;
 
case RESET_SR:
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 128;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter == 0)
{
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
counter=0;
 
}
 
if(counter_write == 1)
{
STATE =IDLE;
counter_write = 0;
counter=0;
PACKETS_GENERATED = PACKETS_GENERATED + 1;
}
 
 
break;
 
}
}
 
return 0;
}
/apbtoaes128/trunk/pli/bfm_ecb/aes_bfm_encryption_ccfie_ecb.h
0,0 → 1,472
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
static int aes_bfm_encryption_ccfie_ecb_calltf(char*user_data)
{
 
vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
vpiHandle PWDATA = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);
vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);
vpiHandle PSEL = vpi_handle_by_name("AES_GLADIC_tb.PSEL", NULL);
vpiHandle PWRITE = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);
vpiHandle PADDR = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);
vpiHandle PRDATA = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);
vpiHandle PREADY = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);
vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);
vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);
vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);
vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);
vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);
 
std::random_device rd;
std::uniform_int_distribution<long int> data_in(0,4294967295);
v_ecb.format=vpiIntVal;
 
vpi_get_value(PRESETn, &v_ecb);
 
 
//printf("%i\n",STATE);
 
 
if(type_bfm == ECB_ENCRYPTION_CCFIE && v_ecb.value.integer == 1)
{
 
switch(STATE)
{
case IDLE:
 
if(PACKETS_GENERATED >= MAX_ITERATIONS)
{
 
STATE = IDLE;
type_bfm = 0;
 
}else
{
STATE = WRITE;
counter = 0;
 
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
v_ecb.value.integer = vector_address[0];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
}
 
break;
case WRITE:
 
 
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
if(counter == 0)
{
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
 
 
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
if(counter_write < 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, &t_ecb, vpiTransportDelay);
 
if(FIPS_ENABLE == FIPS)
{
 
if(vector_address[counter_write] == ADDR_AES_KEYR3 || vector_address[counter_write] == ADDR_AES_IVR3)
{
a = a | KEY_FIPS_NOT_DERIVATED[0];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[1];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[2];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[3];
v_ecb.value.integer = a;
}
 
 
if(vector_address[counter_write] == ADDR_AES_KEYR2 || vector_address[counter_write] == ADDR_AES_IVR2)
{
b = b | KEY_FIPS_NOT_DERIVATED[4];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[5];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[6];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[7];
v_ecb.value.integer = b;
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR1 || vector_address[counter_write] == ADDR_AES_IVR1)
{
 
c = c | KEY_FIPS_NOT_DERIVATED[8];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[9];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[10];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[11];
v_ecb.value.integer = c;
 
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR0 || vector_address[counter_write] == ADDR_AES_IVR0)
{
d = d | KEY_FIPS_NOT_DERIVATED[12];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[13];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[14];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[15];
v_ecb.value.integer = d;
}
 
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
 
}else if(counter_write == 9)//ENABLE CR
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 513;
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
}else if(counter_write > 9 && counter_write < 14) //WRITE DINR
{
 
v_ecb.value.integer = ADDR_AES_DINR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
 
if(FIPS_ENABLE == FIPS)
{
 
if(counter_write == 10)
{
a = a | TEXT_FIPS_NOT_DERIVATED[0];
a = a << 8;
a = a | TEXT_FIPS_NOT_DERIVATED[1];
a = a << 8;
a = a | TEXT_FIPS_NOT_DERIVATED[2];
a = a << 8;
a = a | TEXT_FIPS_NOT_DERIVATED[3];
v_ecb.value.integer = a;
 
}else if(counter_write == 11)
{
b = b | TEXT_FIPS_NOT_DERIVATED[4];
b = b << 8;
b = b | TEXT_FIPS_NOT_DERIVATED[5];
b = b << 8;
b = b | TEXT_FIPS_NOT_DERIVATED[6];
b = b << 8;
b = b | TEXT_FIPS_NOT_DERIVATED[7];
v_ecb.value.integer = b;
 
}else if(counter_write == 12 )
{
 
c = c | TEXT_FIPS_NOT_DERIVATED[8];
c = c << 8;
c = c | TEXT_FIPS_NOT_DERIVATED[9];
c = c << 8;
c = c | TEXT_FIPS_NOT_DERIVATED[10];
c = c << 8;
c = c | TEXT_FIPS_NOT_DERIVATED[11];
v_ecb.value.integer = c;
 
}else if(counter_write == 13 )
{
d = d | TEXT_FIPS_NOT_DERIVATED[12];
d = d << 8;
d = d | TEXT_FIPS_NOT_DERIVATED[13];
d = d << 8;
d = d | TEXT_FIPS_NOT_DERIVATED[14];
d = d << 8;
d = d | TEXT_FIPS_NOT_DERIVATED[15];
v_ecb.value.integer = d;
 
}
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
 
 
}
counter=0;
 
}
 
 
 
if(counter_write == 14)
{
counter_write = 0;
STATE = WAIT_SR;
}
 
break;
 
case WAIT_SR:
 
v_ecb.value.integer = ADDR_AES_SR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
if(counter == 0)
{
 
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
v_ecb.value.integer = 0;
vpi_get_value(PRDATA,&v_ecb);
 
if(v_ecb.value.integer == 1)
{
STATE = READ_DOUTR;
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 10;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = ADDR_AES_DOUTR;
vpi_put_value(PADDR, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
break;
 
 
case READ_DOUTR:
 
 
if(counter == 0)
{
 
v_ecb.value.integer = ADDR_AES_DOUTR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter_write++;
counter++;
 
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter = 0;
}
 
if(counter_write == 4)
{
STATE = RESET_SR;
counter_write = 0;
}
 
break;
 
case RESET_SR:
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 128;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter == 0)
{
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
counter=0;
 
}
 
if(counter_write == 1)
{
STATE =IDLE;
counter_write = 0;
counter=0;
 
PACKETS_GENERATED = PACKETS_GENERATED + 1;
}
 
 
break;
 
}
}
 
return 0;
}
/apbtoaes128/trunk/pli/bfm_ecb/aes_bfm_key_generation_ecb.h
0,0 → 1,431
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
static int aes_bfm_key_generation_ecb_calltf(char*user_data)
{
 
vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
vpiHandle PWDATA = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);
vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);
vpiHandle PSEL = vpi_handle_by_name("AES_GLADIC_tb.PSEL", NULL);
vpiHandle PWRITE = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);
vpiHandle PADDR = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);
vpiHandle PRDATA = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);
vpiHandle PREADY = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);
vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);
vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);
vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);
vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);
vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);
 
std::random_device rd;
std::uniform_int_distribution<long int> data_in(0,4294967295);
v_ecb.format=vpiIntVal;
 
vpi_get_value(PRESETn, &v_ecb);
 
 
//printf("%i\n",STATE);
 
 
if(type_bfm == ECB_KEY_GEN && v_ecb.value.integer == 1)
{
 
switch(STATE)
{
case IDLE:
 
if(PACKETS_GENERATED >= MAX_ITERATIONS)
{
 
STATE = IDLE;
type_bfm = 0;
 
}else
{
STATE = WRITE;
counter = 0;
 
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
v_ecb.value.integer = vector_address[0];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
}
 
break;
case WRITE:
if(counter == 0)
{
 
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter_write < 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
if(FIPS_ENABLE == FIPS)
{
 
if(vector_address[counter_write] == ADDR_AES_KEYR3 || vector_address[counter_write] == ADDR_AES_IVR3)
{
a = a | KEY_FIPS_NOT_DERIVATED[0];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[1];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[2];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[3];
v_ecb.value.integer = a;
}
 
 
if(vector_address[counter_write] == ADDR_AES_KEYR2 || vector_address[counter_write] == ADDR_AES_IVR2)
{
b = b | KEY_FIPS_NOT_DERIVATED[4];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[5];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[6];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[7];
v_ecb.value.integer = b;
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR1 || vector_address[counter_write] == ADDR_AES_IVR1)
{
 
c = c | KEY_FIPS_NOT_DERIVATED[8];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[9];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[10];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[11];
v_ecb.value.integer = c;
 
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR0 || vector_address[counter_write] == ADDR_AES_IVR0)
{
d = d | KEY_FIPS_NOT_DERIVATED[12];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[13];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[14];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[15];
v_ecb.value.integer = d;
}
 
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_ecb.value.integer = data_in(rd);
}
 
//vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
}
 
if(counter_write == 9)
{
 
v_ecb.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 0;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = 9;
vpi_put_value(PWDATA, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
if(counter_write == 10)
{
counter_write = 0;
counter_read = 0;
 
STATE =WAIT_SR;
 
 
}
 
break;
 
case WAIT_SR:
 
v_ecb.value.integer = ADDR_AES_SR;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
if(counter == 0)
{
 
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter=0;
}
 
v_ecb.value.integer = 0;
vpi_get_value(PRDATA,&v_ecb);
 
if(v_ecb.value.integer == 1)
{
STATE = READ_KEY_GEN;
 
t_ecb.type = vpiScaledRealTime;
t_ecb.real = 10;
v_ecb.format=vpiIntVal;
v_ecb.value.integer = ADDR_AES_KEYR3;
vpi_put_value(PADDR, &v_ecb, &t_ecb, vpiTransportDelay);
}
 
break;
 
 
case READ_KEY_GEN:
 
 
if(counter == 0)
{
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter_read++;
counter++;
 
 
 
}else if(counter == 1)
{
 
if(counter_read == 0)
{
v_ecb.value.integer = ADDR_AES_KEYR3;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
}
 
 
if(counter_read == 1)
{
v_ecb.value.integer = ADDR_AES_KEYR2;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
}
 
 
if(counter_read == 2)
{
v_ecb.value.integer = ADDR_AES_KEYR1;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
}
 
if(counter_read == 3)
{
v_ecb.value.integer = ADDR_AES_KEYR0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
}
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
counter = 0;
}
 
if(counter_read == 4)
{
STATE = RESET_SR;
counter_write = 0;
counter_read = 0;
}
 
break;
 
case RESET_SR:
 
v_ecb.value.integer = 1;
vpi_put_value(PWRITE, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 1;
vpi_put_value(PSEL, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 0;
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
 
v_ecb.value.integer = 128;
vpi_put_value(PWDATA, &v_ecb, NULL, vpiNoDelay);
 
 
if(counter == 0)
{
 
counter_write++;
counter++;
 
v_ecb.value.integer = 1;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
 
}else if(counter == 1)
{
 
v_ecb.value.integer = 0;
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
counter=0;
 
}
 
if(counter_write == 1)
{
STATE =IDLE;
counter_write = 0;
counter=0;
PACKETS_GENERATED = PACKETS_GENERATED + 1;
}
 
 
break;
 
}
}
 
return 0;
}
/apbtoaes128/trunk/pli/bfm_error/aes_bfm_wr_error_dinr.h
0,0 → 1,611
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
static int aes_bfm_wr_error_dinr_calltf(char*user_data)
{
 
vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
vpiHandle PWDATA = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);
vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);
vpiHandle PSEL = vpi_handle_by_name("AES_GLADIC_tb.PSEL", NULL);
vpiHandle PWRITE = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);
vpiHandle PADDR = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);
vpiHandle PRDATA = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);
vpiHandle PREADY = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);
vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);
vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);
vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);
vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);
vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);
 
v_wr.format=vpiIntVal;
 
 
std::random_device rd;
std::uniform_int_distribution<long int> data_in(0,4294967295);
 
 
v_wr.format=vpiIntVal;
vpi_get_value(PRESETn, &v_wr);
 
 
if(type_bfm == AES_WR_ERROR_DINR_ONLY && v_wr.value.integer == 1)
{
 
//printf("%i\n",STATE);
switch(STATE)
{
 
case IDLE:
 
 
if(PACKETS_GENERATED >= MAX_ITERATIONS)
{
STATE = IDLE;
type_bfm = 0;
 
}else
{
STATE = WRITE;
counter = 0;
 
v_wr.value.integer = vector_address[0];
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 0;
vpi_put_value(PWDATA, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 1;
vpi_put_value(PWRITE, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 1;
vpi_put_value(PSEL, &v_wr, NULL, vpiNoDelay);
}
 
 
break;
 
case WRITE:
 
if(counter == 0)
{
 
counter_write++;
counter++;
 
v_wr.value.integer = 1;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
 
v_wr.value.integer = 0;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
t_wr.type = vpiScaledRealTime;
t_wr.real = 0;
v_wr.format=vpiIntVal;
 
if(counter_write < 9)
{
 
v_wr.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
if(FIPS_ENABLE == FIPS)
{
 
if(vector_address[counter_write] == ADDR_AES_KEYR3 || vector_address[counter_write] == ADDR_AES_IVR3)
{
a = a | KEY_FIPS_NOT_DERIVATED[0];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[1];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[2];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[3];
v_wr.value.integer = a;
}
 
 
if(vector_address[counter_write] == ADDR_AES_KEYR2 || vector_address[counter_write] == ADDR_AES_IVR2)
{
b = b | KEY_FIPS_NOT_DERIVATED[4];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[5];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[6];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[7];
v_wr.value.integer = b;
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR1 || vector_address[counter_write] == ADDR_AES_IVR1)
{
 
c = c | KEY_FIPS_NOT_DERIVATED[8];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[9];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[10];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[11];
v_wr.value.integer = c;
 
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR0 || vector_address[counter_write] == ADDR_AES_IVR0)
{
d = d | KEY_FIPS_NOT_DERIVATED[12];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[13];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[14];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[15];
v_wr.value.integer = d;
}
 
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_wr.value.integer = data_in(rd);
}
vpi_put_value(PWDATA, &v_wr, &t_wr, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
 
v_wr.value.integer = 1;
vpi_put_value(PSEL, &v_wr, NULL, vpiNoDelay);
 
 
}else if(counter_write == 9)
{
 
v_wr.value.integer = vector_address[0];
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
if(PACKETS_GENERATED == 0)//ENCRYPTION
{
 
v_wr.value.integer = 1;
 
 
}else if(PACKETS_GENERATED == 1)//ENCRYPTION
{
 
v_wr.value.integer = 1025;
 
 
}else if(PACKETS_GENERATED == 2)//KEY GENERATION
{
 
v_wr.value.integer = 9;
 
 
}else if(PACKETS_GENERATED == 3)//KEY GENERATION
{
 
v_wr.value.integer = 1033;
 
 
}else if(PACKETS_GENERATED == 4)//DECRYPTION
{
 
v_wr.value.integer = 17;
 
 
}else if(PACKETS_GENERATED == 5)//DECRYPTION
{
 
v_wr.value.integer = 1041;
 
 
}else if(PACKETS_GENERATED == 6)//DEVIRATION_DECRYPTION
{
 
v_wr.value.integer = 25;
 
 
}else if(PACKETS_GENERATED == 7)//DEVIRATION_DECRYPTION
{
 
v_wr.value.integer = 1049;
 
 
}else if(PACKETS_GENERATED == 8)//ENCRYPTION_DMA
{
 
v_wr.value.integer = 6145;
 
 
}else if(PACKETS_GENERATED == 9)//ENCRYPTION_DMA
{
 
v_wr.value.integer = 7169;
 
 
}else if(PACKETS_GENERATED == 10)//KEY DERIVATION DMA
{
 
v_wr.value.integer = 6153;
 
 
}else if(PACKETS_GENERATED == 12)//KEY DERIVATION DMA
{
 
v_wr.value.integer = 7177;
 
 
}else if(PACKETS_GENERATED == 13)//DECRYPTION_DMA
{
 
v_wr.value.integer = 6161;
 
 
}else if(PACKETS_GENERATED == 14)//DECRYPTION_DMA
{
 
v_wr.value.integer = 7185;
 
 
}else if(PACKETS_GENERATED == 15)//DEVIRATION_DECRYPTION_DMA
{
 
v_wr.value.integer = 6169;
 
}else if(PACKETS_GENERATED == 16)//DEVIRATION_DECRYPTION_DMA
{
 
v_wr.value.integer = 7193;
 
}
 
vpi_put_value(PWDATA, &v_wr, NULL, vpiNoDelay);
}if(counter_write > 9 && counter_write < 14) //WRITE DINR
{
 
v_wr.value.integer = ADDR_AES_DINR;
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
 
if(FIPS_ENABLE == FIPS)
{
 
if(counter_write == 10)
{
a = a | TEXT_FIPS_DERIVATED[0];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[1];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[2];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[3];
v_wr.value.integer = a;
 
}else if(counter_write == 11)
{
b = b | TEXT_FIPS_DERIVATED[4];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[5];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[6];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[7];
v_wr.value.integer = b;
 
}else if(counter_write == 12 )
{
 
c = c | TEXT_FIPS_DERIVATED[8];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[9];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[10];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[11];
v_wr.value.integer = c;
 
}else if(counter_write == 13 )
{
d = d | TEXT_FIPS_DERIVATED[12];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[13];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[14];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[15];
v_wr.value.integer = d;
 
}
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_wr.value.integer = data_in(rd);
}
vpi_put_value(PWDATA, &v_wr, &t_wr, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
 
 
}
 
counter=0;
 
}//ELSE COUNTER
 
 
 
if(counter_write == 14)
{
STATE =WAIT;
counter_write = 0;
counter_read = 0;
 
//v_wr.value.integer = 0;
//vpi_put_value(PWRITE, &v_wr, NULL, vpiNoDelay);
 
 
}
 
 
break;
 
case WAIT:
 
 
v_wr.value.integer = 0;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 0;
vpi_put_value(PWRITE, &v_wr, NULL, vpiNoDelay);
 
if(counter_wait == 9)
{
 
STATE = WRITE_DINR;
counter_wait=0;
 
v_wr.value.integer = ADDR_AES_DINR;
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 0;
vpi_put_value(PWRITE, &v_wr, NULL, vpiNoDelay);
 
 
}else
{
 
counter_wait++;
 
}
break;
 
case WRITE_DINR:
 
v_wr.value.integer = 1;
vpi_put_value(PWRITE, &v_wr, NULL, vpiNoDelay);
 
if(counter == 0)
{
 
counter++;
counter_write++;
 
v_wr.value.integer = 1;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
 
v_wr.value.integer = 0;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
counter=0;
}
 
 
 
if(counter_write == 14)
{
STATE = READ_RESULTS;
counter_write = 0;
counter_read = 0;
 
v_wr.value.integer = ADDR_AES_DINR;//vector_address[counter_read];
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 0;
vpi_put_value(PWRITE, &v_wr, NULL, vpiNoDelay);
 
 
}
 
 
break;
 
case READ_RESULTS:
 
 
 
if(counter == 0)
{
 
v_wr.value.integer = 1;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
counter_read++;
counter++;
 
}else if(counter == 1)
{
counter++;
 
 
v_wr.value.integer = 0;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
 
v_wr.value.integer = ADDR_AES_SR;//vector_address[counter_read];
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 0;
vpi_put_value(PWDATA, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 1;
vpi_put_value(PSEL, &v_wr, NULL, vpiNoDelay);
 
counter=0;
 
}
 
if(counter_read == 12)
{
STATE = RESET_SR;
counter_read = 0;
PACKETS_GENERATED = PACKETS_GENERATED + 1;
 
v_wr.value.integer = 0;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
}
 
break;
 
case RESET_SR:
 
v_wr.value.integer = 1;
vpi_put_value(PWRITE, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 1;
vpi_put_value(PSEL, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 0;
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 384;
vpi_put_value(PWDATA, &v_wr, NULL, vpiNoDelay);
 
 
if(counter == 0)
{
 
counter_write++;
counter++;
 
v_wr.value.integer = 1;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
}else if(counter == 1)
{
 
v_wr.value.integer = 0;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
counter=0;
 
}
 
if(counter_write < 2)
{
STATE =IDLE;
counter_write = 0;
}
 
 
break;
}
 
 
}
 
 
return 0;
}
/apbtoaes128/trunk/pli/bfm_error/aes_bfm_wr_error_doutr.h
0,0 → 1,567
//////////////////////////////////////////////////////////////////
////
////
//// AES CORE BLOCK
////
////
////
//// This file is part of the APB to AES128 project
////
//// http://www.opencores.org/cores/apbtoaes128/
////
////
////
//// Description
////
//// Implementation of APB IP core according to
////
//// aes128_spec IP core specification document.
////
////
////
//// To Do: Things are right here but always all block can suffer changes
////
////
////
////
////
//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
////
/////////////////////////////////////////////////////////////////
////
////
//// Copyright (C) 2009 Authors and OPENCORES.ORG
////
////
////
//// This source file may be used and distributed without
////
//// restriction provided that this copyright statement is not
////
//// removed from the file and that any derivative work contains
//// the original copyright notice and the associated disclaimer.
////
////
//// This source file is free software; you can redistribute it
////
//// and/or modify it under the terms of the GNU Lesser General
////
//// Public License as published by the Free Software Foundation;
//// either version 2.1 of the License, or (at your option) any
////
//// later version.
////
////
////
//// This source is distributed in the hope that it will be
////
//// useful, but WITHOUT ANY WARRANTY; without even the implied
////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
////
//// PURPOSE. See the GNU Lesser General Public License for more
//// details.
////
////
////
//// You should have received a copy of the GNU Lesser General
////
//// Public License along with this source; if not, download it
////
//// from http://www.opencores.org/lgpl.shtml
////
////
///////////////////////////////////////////////////////////////////
static int aes_bfm_wr_error_doutr_calltf(char*user_data)
{
 
vpiHandle PRESETn = vpi_handle_by_name("AES_GLADIC_tb.PRESETn", NULL);
vpiHandle PWDATA = vpi_handle_by_name("AES_GLADIC_tb.PWDATA", NULL);
vpiHandle PENABLE = vpi_handle_by_name("AES_GLADIC_tb.PENABLE", NULL);
vpiHandle PSEL = vpi_handle_by_name("AES_GLADIC_tb.PSEL", NULL);
vpiHandle PWRITE = vpi_handle_by_name("AES_GLADIC_tb.PWRITE", NULL);
vpiHandle PADDR = vpi_handle_by_name("AES_GLADIC_tb.PADDR", NULL);
vpiHandle PRDATA = vpi_handle_by_name("AES_GLADIC_tb.PRDATA", NULL);
vpiHandle PREADY = vpi_handle_by_name("AES_GLADIC_tb.PREADY", NULL);
vpiHandle PSLVERR = vpi_handle_by_name("AES_GLADIC_tb.PSLVERR", NULL);
vpiHandle int_ccf = vpi_handle_by_name("AES_GLADIC_tb.int_ccf", NULL);
vpiHandle int_err = vpi_handle_by_name("AES_GLADIC_tb.int_err", NULL);
vpiHandle dma_req_wr = vpi_handle_by_name("AES_GLADIC_tb.dma_req_wr", NULL);
vpiHandle dma_req_rd = vpi_handle_by_name("AES_GLADIC_tb.dma_req_rd", NULL);
 
v_wr.format=vpiIntVal;
 
 
std::random_device rd;
std::uniform_int_distribution<long int> data_in(0,4294967295);
 
 
v_wr.format=vpiIntVal;
vpi_get_value(PRESETn, &v_wr);
 
 
if(type_bfm == AES_WR_ERROR_DOUTR_ONLY && v_wr.value.integer == 1)
{
 
//printf("%i\n",STATE);
switch(STATE)
{
 
case IDLE:
 
 
if(PACKETS_GENERATED >= MAX_ITERATIONS)
{
STATE = IDLE;
type_bfm = 0;
 
}else
{
STATE = WRITE;
counter = 0;
 
v_wr.value.integer = vector_address[0];
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 0;
vpi_put_value(PWDATA, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 1;
vpi_put_value(PWRITE, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 1;
vpi_put_value(PSEL, &v_wr, NULL, vpiNoDelay);
}
 
 
break;
 
case WRITE:
 
if(counter == 0)
{
 
counter_write++;
counter++;
 
v_wr.value.integer = 1;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
 
v_wr.value.integer = 0;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
t_wr.type = vpiScaledRealTime;
t_wr.real = 0;
v_wr.format=vpiIntVal;
 
if(counter_write < 9)
{
 
v_wr.value.integer = vector_address[counter_write];
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
if(FIPS_ENABLE == FIPS)
{
 
if(vector_address[counter_write] == ADDR_AES_KEYR3 || vector_address[counter_write] == ADDR_AES_IVR3)
{
a = a | KEY_FIPS_NOT_DERIVATED[0];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[1];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[2];
a = a << 8;
a = a | KEY_FIPS_NOT_DERIVATED[3];
v_wr.value.integer = a;
}
 
 
if(vector_address[counter_write] == ADDR_AES_KEYR2 || vector_address[counter_write] == ADDR_AES_IVR2)
{
b = b | KEY_FIPS_NOT_DERIVATED[4];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[5];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[6];
b = b << 8;
b = b | KEY_FIPS_NOT_DERIVATED[7];
v_wr.value.integer = b;
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR1 || vector_address[counter_write] == ADDR_AES_IVR1)
{
 
c = c | KEY_FIPS_NOT_DERIVATED[8];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[9];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[10];
c = c << 8;
c = c | KEY_FIPS_NOT_DERIVATED[11];
v_wr.value.integer = c;
 
}
 
if(vector_address[counter_write] == ADDR_AES_KEYR0 || vector_address[counter_write] == ADDR_AES_IVR0)
{
d = d | KEY_FIPS_NOT_DERIVATED[12];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[13];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[14];
d = d << 8;
d = d | KEY_FIPS_NOT_DERIVATED[15];
v_wr.value.integer = d;
}
 
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_wr.value.integer = data_in(rd);
}
vpi_put_value(PWDATA, &v_wr, &t_wr, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
 
v_wr.value.integer = 1;
vpi_put_value(PSEL, &v_wr, NULL, vpiNoDelay);
 
 
}else if(counter_write == 9)
{
 
v_wr.value.integer = vector_address[0];
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
if(PACKETS_GENERATED == 0)//ENCRYPTION
{
 
v_wr.value.integer = 1;
 
 
}else if(PACKETS_GENERATED == 1)//ENCRYPTION
{
 
v_wr.value.integer = 1025;
 
 
}else if(PACKETS_GENERATED == 2)//KEY GENERATION
{
 
v_wr.value.integer = 9;
 
 
}else if(PACKETS_GENERATED == 3)//KEY GENERATION
{
 
v_wr.value.integer = 1033;
 
 
}else if(PACKETS_GENERATED == 4)//DECRYPTION
{
 
v_wr.value.integer = 17;
 
 
}else if(PACKETS_GENERATED == 5)//DECRYPTION
{
 
v_wr.value.integer = 1041;
 
 
}else if(PACKETS_GENERATED == 6)//DEVIRATION_DECRYPTION
{
 
v_wr.value.integer = 25;
 
 
}else if(PACKETS_GENERATED == 7)//DEVIRATION_DECRYPTION
{
 
v_wr.value.integer = 1049;
 
 
}else if(PACKETS_GENERATED == 8)//ENCRYPTION_DMA
{
 
v_wr.value.integer = 6145;
 
 
}else if(PACKETS_GENERATED == 9)//ENCRYPTION_DMA
{
 
v_wr.value.integer = 7169;
 
 
}else if(PACKETS_GENERATED == 10)//KEY DERIVATION DMA
{
 
v_wr.value.integer = 6153;
 
 
}else if(PACKETS_GENERATED == 12)//KEY DERIVATION DMA
{
 
v_wr.value.integer = 7177;
 
 
}else if(PACKETS_GENERATED == 13)//DECRYPTION_DMA
{
 
v_wr.value.integer = 6161;
 
 
}else if(PACKETS_GENERATED == 14)//DECRYPTION_DMA
{
 
v_wr.value.integer = 7185;
 
 
}else if(PACKETS_GENERATED == 15)//DEVIRATION_DECRYPTION_DMA
{
 
v_wr.value.integer = 6169;
 
}else if(PACKETS_GENERATED == 16)//DEVIRATION_DECRYPTION_DMA
{
 
v_wr.value.integer = 7193;
 
}
 
vpi_put_value(PWDATA, &v_wr, NULL, vpiNoDelay);
}if(counter_write > 9 && counter_write < 14) //WRITE DINR
{
 
v_wr.value.integer = ADDR_AES_DINR;
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
 
if(FIPS_ENABLE == FIPS)
{
 
if(counter_write == 10)
{
a = a | TEXT_FIPS_DERIVATED[0];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[1];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[2];
a = a << 8;
a = a | TEXT_FIPS_DERIVATED[3];
v_wr.value.integer = a;
 
}else if(counter_write == 11)
{
b = b | TEXT_FIPS_DERIVATED[4];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[5];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[6];
b = b << 8;
b = b | TEXT_FIPS_DERIVATED[7];
v_wr.value.integer = b;
 
}else if(counter_write == 12 )
{
 
c = c | TEXT_FIPS_DERIVATED[8];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[9];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[10];
c = c << 8;
c = c | TEXT_FIPS_DERIVATED[11];
v_wr.value.integer = c;
 
}else if(counter_write == 13 )
{
d = d | TEXT_FIPS_DERIVATED[12];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[13];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[14];
d = d << 8;
d = d | TEXT_FIPS_DERIVATED[15];
v_wr.value.integer = d;
 
}
 
 
}else if(FIPS_ENABLE == RANDOM_DATA)
{
v_wr.value.integer = data_in(rd);
}
vpi_put_value(PWDATA, &v_wr, &t_wr, vpiTransportDelay);
a = 0;
b = 0;
c = 0;
d = 0;
 
 
}
 
counter=0;
 
}//ELSE COUNTER
 
 
 
if(counter_write == 14)
{
STATE =WAIT;
counter_write = 0;
counter_read = 0;
 
 
 
 
}
 
 
break;
 
case WAIT:
 
 
v_wr.value.integer = 0;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 0;
vpi_put_value(PWRITE, &v_wr, NULL, vpiNoDelay);
 
if(counter_wait == 9)
{
 
STATE = READ_DOUTR;
counter_wait=0;
 
v_wr.value.integer = ADDR_AES_DOUTR;
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 0;
vpi_put_value(PWRITE, &v_wr, NULL, vpiNoDelay);
 
 
}else
{
 
counter_wait++;
 
}
break;
 
case READ_DOUTR:
 
v_wr.value.integer = 0;
vpi_put_value(PWRITE, &v_wr, NULL, vpiNoDelay);
 
if(counter == 0)
{
 
counter++;
counter_write++;
 
v_wr.value.integer = 1;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
 
}else if(counter == 1)
{
 
v_wr.value.integer = 0;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
counter=0;
}
 
 
 
if(counter_write == 14)
{
STATE = READ_RESULTS;
counter_write = 0;
counter_read = 0;
 
v_wr.value.integer = ADDR_AES_DINR;//vector_address[counter_read];
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 0;
vpi_put_value(PWRITE, &v_wr, NULL, vpiNoDelay);
 
 
}
 
 
break;
 
case READ_RESULTS:
 
 
 
if(counter == 0)
{
 
v_wr.value.integer = 1;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
counter_read++;
counter++;
 
}else if(counter == 1)
{
counter++;
 
 
v_wr.value.integer = 0;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
 
v_wr.value.integer = ADDR_AES_SR;//vector_address[counter_read];
vpi_put_value(PADDR, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 0;
vpi_put_value(PWDATA, &v_wr, NULL, vpiNoDelay);
 
v_wr.value.integer = 1;
vpi_put_value(PSEL, &v_wr, NULL, vpiNoDelay);
 
counter=0;
 
}
 
if(counter_read == 1)
{
STATE = IDLE;
counter_read = 0;
PACKETS_GENERATED = PACKETS_GENERATED + 1;
 
v_wr.value.integer = 0;
vpi_put_value(PENABLE, &v_wr, NULL, vpiNoDelay);
 
}
 
break;
}
 
 
}
 
 
return 0;
}

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