URL
https://opencores.org/ocsvn/scalable_arbiter/scalable_arbiter/trunk
Subversion Repositories scalable_arbiter
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- This comparison shows the changes necessary to convert path
/
- from Rev 3 to Rev 4
- ↔ Reverse comparison
Rev 3 → Rev 4
/trunk/rtl/verilog/demo_arbiter.v
76,7 → 76,7
wire [`ARB_WIDTH-1:0] req, grant; |
|
shifter #( |
.count(`ARB_WIDTH/`PORT_WIDTH), |
.depth(`ARB_WIDTH/`PORT_WIDTH), |
.width(`PORT_WIDTH) |
) in_shifter ( |
.enable(enable_in), |
105,7 → 105,7
); |
|
shifter #( |
.count(`ARB_WIDTH/`PORT_WIDTH), |
.depth(`ARB_WIDTH/`PORT_WIDTH), |
.width(`PORT_WIDTH) |
) out_shifter ( |
.enable(enable_out), |
/trunk/rtl/verilog/shifter.v
17,21 → 17,21
`timescale 1ns / 1ps |
|
module shifter #( |
parameter count = 0, |
parameter depth = 0, |
parameter width = 0 |
)( |
input enable, |
input load, |
|
input [(count*width)-1:0] parallel_in, |
input [(depth*width)-1:0] parallel_in, |
input [width-1:0] serial_in, |
output [(count*width)-1:0] parallel_out, |
output [(depth*width)-1:0] parallel_out, |
output [width-1:0] serial_out, |
|
input clock |
); |
|
reg [(count*width)-1:0] internal; |
reg [(depth*width)-1:0] internal; |
|
assign parallel_out = internal; |
assign serial_out = internal[width-1:0]; |
42,11 → 42,11
begin |
if(enable) |
begin |
internal[(count*width)-1-:width] <= load |
? parallel_in[(count*width)-1-:width] |
internal[(depth*width)-1-:width] <= load |
? parallel_in[(depth*width)-1-:width] |
: serial_in; |
|
for(i = count - 1; i > 0; i = i - 1) |
for(i = depth - 1; i > 0; i = i - 1) |
internal[(i*width)-1-:width] <= load |
? parallel_in[(i*width)-1-:width] |
: internal[((i+1)*width)-1-:width]; |