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/srdydrdy_lib/trunk/examples/bridge/rtl/fib_lookup_fsm.v
0,0 → 1,146
module fib_lookup_fsm
(/*AUTOARG*/
// Outputs
lpp_drdy, ft_wdata, ft_rd_n, ft_wr_n, ft_addr, lout_data, lout_srdy,
// Inputs
clk, reset, lpp_data, lpp_srdy, ft_rdata, lout_drdy
);
 
input clk, reset;
input [`PAR_DATA_SZ-1:0] lpp_data;
input lpp_srdy;
output reg lpp_drdy;
 
input [`FIB_ENTRY_SZ-1:0] ft_rdata;
output reg [`FIB_ENTRY_SZ-1:0] ft_wdata;
output reg ft_rd_n, ft_wr_n;
output reg [`FIB_ASZ-1:0] ft_addr;
output reg [`NUM_PORTS-1:0] lout_data;
output reg lout_srdy;
input lout_drdy;
wire [`FIB_ASZ-1:0] hf_out;
reg [47:0] hf_in;
 
wire [`NUM_PORTS-1:0] source_port_mask;
 
reg [`FIB_ASZ-1:0] init_ctr, nxt_init_ctr;
reg [4:0] state, nxt_state;
assign source_port_mask = 1 << lpp_data[`PAR_SRCPORT];
basic_hashfunc #(48, `FIB_ENTRIES) hashfunc
(
// Outputs
.hf_out (hf_out),
// Inputs
.hf_in (hf_in));
 
localparam s_idle = 0, s_da_lookup = 1, s_sa_lookup = 2,
s_init0 = 3, s_init1 = 4;
localparam ns_idle = 1, ns_da_lookup = 2, ns_sa_lookup = 4,
ns_init0 = 8, ns_init1 = 16;
always @*
begin
hf_in = 0;
nxt_state = state;
ft_rd_n = 1;
ft_wr_n = 1;
ft_addr = hf_out;
lout_data = 0;
lout_srdy = 0;
lpp_drdy = 0;
nxt_init_ctr = init_ctr;
case (1'b1)
state[s_idle] :
begin
// DA lookup
if (lpp_data[`PAR_MACDA] & `MULTICAST)
begin
// flood the packet, don't bother to do DA lookup
lout_data = ~source_port_mask;
lout_srdy = 1;
if (lout_drdy)
nxt_state = ns_sa_lookup;
end
else if (lpp_srdy)
begin
hf_in = lpp_data[`PAR_MACDA];
ft_rd_n = 0;
nxt_state = ns_da_lookup;
end
end
 
// results from DA lookup are available this
// state. Make forwarding decision at this
// point.
state[s_da_lookup] :
begin
// no match, flood packet
if (ft_rdata[`FIB_AGE] == 0)
begin
lout_data = ~source_port_mask;
end
else
begin
lout_data = 1 << ft_rdata[`FIB_PORT];
end
lout_srdy = 1;
if (lout_drdy)
nxt_state = ns_sa_lookup;
end // case: state[s_da_lookup]
 
// blind write out MACSA to FIB table
// will bump out current occupant and update
state[s_sa_lookup] :
begin
ft_wr_n = 0;
hf_in = lpp_data[`PAR_MACSA];
ft_wdata[`FIB_MACADDR] = lpp_data[`PAR_MACSA];
ft_wdata[`FIB_AGE] = `FIB_MAX_AGE;
ft_wdata[`FIB_PORT] = lpp_data[`PAR_SRCPORT];
nxt_state = ns_idle;
lpp_drdy = 1;
end
 
state[s_init0] :
begin
nxt_init_ctr = 0;
nxt_state = ns_init1;
end
 
state[s_init1] :
begin
nxt_init_ctr = init_ctr + 1;
ft_wr_n = 0;
ft_addr = init_ctr;
ft_wdata = 0;
if (ft_addr == (`FIB_ENTRIES-1))
nxt_state = ns_idle;
end
 
default :
nxt_state = ns_idle;
endcase // case (1'b1)
end // always @ *
always @(posedge clk)
begin
if (reset)
begin
init_ctr <= #1 0;
state <= #1 ns_init0;
end
else
begin
init_ctr <= #1 nxt_init_ctr;
state <= #1 nxt_state;
end
end
 
endmodule // fib_lookup_fsm
/srdydrdy_lib/trunk/examples/bridge/rtl/basic_hashfunc.v
0,0 → 1,60
/*
* Simple parameterized hash function
*
* Takes an input item and folds it back upon itself using xor
* as a reduction function. Works only for hash tables with
* a natural power of 2.
*/
module basic_hashfunc
#(parameter input_sz=48,
parameter table_sz=1024,
parameter fsz=clogb2(table_sz))
(
input [input_sz-1:0] hf_in,
output reg [fsz-1:0] hf_out);
 
//localparam folds = (input_sz/fsz) + ( (input_sz%fsz) == 0) ? 0 : 1;
localparam folds = num_folds(input_sz, fsz);
 
wire [folds*fsz-1:0] tmp_array;
assign tmp_array = hf_in;
integer f, b;
 
always @*
begin
for (b=0; b<fsz; b=b+1)
begin
hf_out[b] = 0;
for (f=0; f<folds; f=f+1)
hf_out[b] = hf_out[b]^tmp_array[f*fsz+b];
end
end
 
function integer num_folds;
input [31:0] in_sz;
input [31:0] func_sz;
integer tmp_in_sz;
begin
num_folds = 0;
tmp_in_sz = in_sz;
while (tmp_in_sz > 0)
begin
tmp_in_sz = tmp_in_sz - func_sz;
num_folds = num_folds + 1;
end
end
endfunction
function integer clogb2;
input [31:0] depth;
integer i;
begin
i = depth;
for (clogb2=0; i>0; clogb2=clogb2+1)
i = i >> 1;
end
endfunction // for
endmodule // hashfunc
/srdydrdy_lib/trunk/examples/bridge/rtl/bridge.vh
0,0 → 1,28
 
// Address size for number of ports. Default value 4,
// which will allow design to scale up to 16 ports
`define PORT_ASZ 4
 
// We will have only 4 ports in our sample design
`define NUM_PORTS 4
 
// Data structure from parser to FIB. Contains MAC DA,
// MAC SA, and source port
`define PAR_DATA_SZ (48+48+4)
`define PAR_MACDA 47:0
`define PAR_MACSA 95:48
`define PAR_SRCPORT 99:96
 
// number of entries in FIB table
`define FIB_ENTRIES 256
`define FIB_ASZ $clog2(`FIB_ENTRIES)
 
// FIB entry definition
`define FIB_ENTRY_SZ 60
`define FIB_MACADDR 47:0 // MAC address
`define FIB_AGE 55:48 // 8 bit age counter
`define FIB_PORT 59:56 // associated port
 
`define FIB_MAX_AGE 255 // maximum value of age timer
 
`define MULTICAST 48'h0100000000 // multicast bit
/srdydrdy_lib/trunk/examples/bridge/rtl/fib_lookup.v
0,0 → 1,118
// Inputs are PPI (port parser input)
// Outputs are FLO (FIB lookup out)
 
module fib_lookup
(/*AUTOARG*/
// Outputs
ppi_drdy, flo_data, flo_srdy,
// Inputs
ppi_srdy, clk, reset, ppi_data, flo_drdy
);
 
input clk;
input reset;
 
input [`PAR_DATA_SZ-1:0] ppi_data;
output [`NUM_PORTS-1:0] flo_data;
output [`NUM_PORTS-1:0] flo_srdy;
input [`NUM_PORTS-1:0] flo_drdy;
/*AUTOINPUT*/
// Beginning of automatic inputs (from unused autoinst inputs)
input ppi_srdy; // To port_parse_in of sd_input.v
// End of automatics
/*AUTOOUTPUT*/
// Beginning of automatic outputs (from unused autoinst outputs)
output ppi_drdy; // From port_parse_in of sd_input.v
// End of automatics
 
wire [`FIB_ENTRY_SZ-1:0] ft_rdata;
wire [`PAR_DATA_SZ-1:0] lpp_data;
/*AUTOWIRE*/
// Beginning of automatic wires (for undeclared instantiated-module outputs)
wire [`FIB_ASZ-1:0] ft_addr; // From fsm0 of fib_lookup_fsm.v
wire ft_rd_n; // From fsm0 of fib_lookup_fsm.v
wire [`FIB_ENTRY_SZ-1:0] ft_wdata; // From fsm0 of fib_lookup_fsm.v
wire ft_wr_n; // From fsm0 of fib_lookup_fsm.v
wire [`NUM_PORTS-1:0] lout_data; // From fsm0 of fib_lookup_fsm.v
wire lout_drdy; // From fib_res_out of sd_mirror.v
wire lout_srdy; // From fsm0 of fib_lookup_fsm.v
wire lpp_drdy; // From fsm0 of fib_lookup_fsm.v
wire lpp_srdy; // From port_parse_in of sd_input.v
// End of automatics
/* sd_input AUTO_TEMPLATE
(
.c_\(.*\) (ppi_\1),
.ip_\(.*\) (lpp_\1),
);
*/
sd_input #(`PAR_DATA_SZ) port_parse_in
(/*AUTOINST*/
// Outputs
.c_drdy (ppi_drdy), // Templated
.ip_srdy (lpp_srdy), // Templated
.ip_data (lpp_data), // Templated
// Inputs
.clk (clk),
.reset (reset),
.c_srdy (ppi_srdy), // Templated
.c_data (ppi_data), // Templated
.ip_drdy (lpp_drdy)); // Templated
/* behave1p_mem AUTO_TEMPLATE
(
.d_out (ft_rdata),
.d_in (ft_wdata),
.clk (clk),
.\(.*\) (ft_\1),
);
*/
behave1p_mem #(`FIB_ENTRIES, `FIB_ENTRY_SZ) fib_mem
(/*AUTOINST*/
// Outputs
.d_out (ft_rdata), // Templated
// Inputs
.wr_n (ft_wr_n), // Templated
.rd_n (ft_rd_n), // Templated
.clk (clk), // Templated
.d_in (ft_wdata), // Templated
.addr (ft_addr)); // Templated
 
fib_lookup_fsm fsm0
(/*AUTOINST*/
// Outputs
.lpp_drdy (lpp_drdy),
.ft_wdata (ft_wdata[`FIB_ENTRY_SZ-1:0]),
.ft_rd_n (ft_rd_n),
.ft_wr_n (ft_wr_n),
.ft_addr (ft_addr[`FIB_ASZ-1:0]),
.lout_data (lout_data[`NUM_PORTS-1:0]),
.lout_srdy (lout_srdy),
// Inputs
.clk (clk),
.reset (reset),
.lpp_data (lpp_data[`PAR_DATA_SZ-1:0]),
.lpp_srdy (lpp_srdy),
.ft_rdata (ft_rdata[`FIB_ENTRY_SZ-1:0]),
.lout_drdy (lout_drdy));
 
/* sd_mirror AUTO_TEMPLATE
(
.c_\(.*\) (lout_\1),
.p_\(.*\) (flo_\1),
)
*/
sd_mirror #(`NUM_PORTS, `NUM_PORTS) fib_res_out
(/*AUTOINST*/
// Outputs
.c_drdy (lout_drdy), // Templated
.p_srdy (flo_srdy), // Templated
.p_data (flo_data), // Templated
// Inputs
.clk (clk),
.reset (reset),
.c_srdy (lout_srdy), // Templated
.c_data (lout_data), // Templated
.p_drdy (flo_drdy)); // Templated
 
endmodule // fib_lookup

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