URL
https://opencores.org/ocsvn/systemcaes/systemcaes/trunk
Subversion Repositories systemcaes
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 3 to Rev 4
- ↔ Reverse comparison
Rev 3 → Rev 4
/trunk/rtl/verilog/sbox.v
45,7 → 45,12
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.1.1.1 2004/07/05 09:46:23 jcastillo |
// First import |
// |
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`include "timescale.v" |
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module sbox(clk,reset,data_i,decrypt_i,data_o); |
input clk; |
input reset; |
/trunk/rtl/verilog/mixcolum.v
45,7 → 45,11
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.1.1.1 2004/07/05 09:46:23 jcastillo |
// First import |
// |
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`include "timescale.v" |
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module mixcolum(clk,reset,decrypt_i,start_i,data_i,ready_o,data_o); |
input clk; |
/trunk/rtl/verilog/keysched.v
45,7 → 45,12
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.1.1.1 2004/07/05 09:46:23 jcastillo |
// First import |
// |
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`include "timescale.v" |
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module keysched(clk,reset,start_i,round_i,last_key_i,new_key_o,ready_o,sbox_access_o,sbox_data_o,sbox_data_i,sbox_decrypt_o); |
input clk; |
input reset; |
/trunk/rtl/verilog/byte_mixcolum.v
45,7 → 45,12
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.1.1.1 2004/07/05 09:46:23 jcastillo |
// First import |
// |
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`include "timescale.v" |
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module byte_mixcolum(a,b,c,d,outx,outy); |
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input [7:0] a,b,c,d; |
/trunk/rtl/verilog/subbytes.v
45,7 → 45,12
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.1.1.1 2004/07/05 09:46:23 jcastillo |
// First import |
// |
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`include "timescale.v" |
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module subbytes(clk,reset,start_i,decrypt_i,data_i,ready_o,data_o,sbox_data_o,sbox_data_i,sbox_decrypt_o); |
input clk; |
input reset; |
/trunk/rtl/verilog/aes.v
45,7 → 45,12
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.1.1.1 2004/07/05 09:46:23 jcastillo |
// First import |
// |
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`include "timescale.v" |
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module aes(clk,reset,load_i,decrypt_i,data_i,key_i,ready_o,data_o); |
input clk; |
input reset; |
/trunk/rtl/verilog/word_mixcolum.v
45,7 → 45,12
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.1.1.1 2004/07/05 09:46:23 jcastillo |
// First import |
// |
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`include "timescale.v" |
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module word_mixcolum(in,outx,outy); |
input [31:0] in; |
output [31:0] outx; |