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URL https://opencores.org/ocsvn/ha1588/ha1588/trunk

Subversion Repositories ha1588

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    from Rev 30 to Rev 31
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Rev 30 → Rev 31

/ha1588/trunk/rtl/reg/reg.v
146,10 → 146,12
reg [63:0] tx_q_data_int;
reg [ 7:0] tx_q_stat_int;
reg time_ok;
reg rxqu_ok;
reg txqu_ok;
 
reg [31:0] data_out_reg;
always @(posedge clk) begin
if (rd_in && cs_00) data_out_reg <= {reg_00[31:1], time_ok};
if (rd_in && cs_00) data_out_reg <= {reg_00[31:12], reg_00[11], rxqu_ok, reg_00[9], txqu_ok, reg_00[ 7: 1], time_ok};
if (rd_in && cs_04) data_out_reg <= {24'd0, rx_q_stat_int[ 7: 0]};
if (rd_in && cs_08) data_out_reg <= {24'd0, tx_q_stat_int[ 7: 0]};
if (rd_in && cs_0c) data_out_reg <= reg_0c;
269,15 → 271,26
rxq_rst_d3 <= rxq_rst_d2;
end
 
reg rxqu_rd_d1, rxqu_rd_d2, rxqu_rd_d3;
reg rxqu_rd_d1, rxqu_rd_d2, rxqu_rd_d3, rxqu_rd_d4, rxqu_rd_d5;
assign rx_q_rd_en_out = rxqu_rd_d2 && !rxqu_rd_d3;
wire rx_q_rd_req = rxqu_rd_d2 && !rxqu_rd_d3;
wire rx_q_rd_ack = rxqu_rd_d4 && !rxqu_rd_d5;
always @(posedge clk) begin
rxqu_rd_d1 <= rxqu_rd;
rxqu_rd_d2 <= rxqu_rd_d1;
rxqu_rd_d3 <= rxqu_rd_d2;
rxqu_rd_d4 <= rxqu_rd_d3;
rxqu_rd_d5 <= rxqu_rd_d4;
end
 
always @(posedge clk) begin
if (rx_q_rd_ack)
rxqu_ok <= 1'b1;
else if (rx_q_rd_req)
rxqu_ok <= 1'b0;
end
 
always @(posedge clk) begin
rx_q_data_int <= rx_q_data_in;
rx_q_stat_int <= rx_q_stat_in;
end
293,15 → 306,26
txq_rst_d3 <= txq_rst_d2;
end
 
reg txqu_rd_d1, txqu_rd_d2, txqu_rd_d3;
reg txqu_rd_d1, txqu_rd_d2, txqu_rd_d3, txqu_rd_d4, txqu_rd_d5;
assign tx_q_rd_en_out = txqu_rd_d2 && !txqu_rd_d3;
wire tx_q_rd_req = txqu_rd_d2 && !txqu_rd_d3;
wire tx_q_rd_ack = txqu_rd_d4 && !txqu_rd_d5;
always @(posedge clk) begin
txqu_rd_d1 <= txqu_rd;
txqu_rd_d2 <= txqu_rd_d1;
txqu_rd_d3 <= txqu_rd_d2;
txqu_rd_d4 <= txqu_rd_d3;
txqu_rd_d5 <= txqu_rd_d4;
end
 
always @(posedge clk) begin
if (tx_q_rd_ack)
txqu_ok <= 1'b1;
else if (tx_q_rd_req)
txqu_ok <= 1'b0;
end
 
always @(posedge clk) begin
tx_q_data_int <= tx_q_data_in;
tx_q_stat_int <= tx_q_stat_in;
end
/ha1588/trunk/sim/top/ptp_drv_bfm/ptp_drv_bfm.c
135,6 → 135,11
cpu_addr_i = 0x00000000;
cpu_data_i = 0x400;
cpu_wr(cpu_addr_i, cpu_data_i);
do {
cpu_addr_i = 0x00000000;
cpu_rd(cpu_addr_i, &cpu_data_o);
//printf("%08x\n", (cpu_data_o & 0x1));
} while ((cpu_data_o & 0x400) == 0x0);
cpu_addr_i = 0x00000050;
cpu_rd(cpu_addr_i, &cpu_data_o);
printf("\nRx stamp: \n%08x\n", cpu_data_o);
158,6 → 163,11
cpu_addr_i = 0x00000000;
cpu_data_i = 0x100;
cpu_wr(cpu_addr_i, cpu_data_i);
do {
cpu_addr_i = 0x00000000;
cpu_rd(cpu_addr_i, &cpu_data_o);
//printf("%08x\n", (cpu_data_o & 0x1));
} while ((cpu_data_o & 0x100) == 0x0);
cpu_addr_i = 0x00000058;
cpu_rd(cpu_addr_i, &cpu_data_o);
printf("\nTx stamp: \n%08x\n", cpu_data_o);

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