OpenCores
URL https://opencores.org/ocsvn/sc2v/sc2v/trunk

Subversion Repositories sc2v

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  • This comparison shows the changes necessary to convert path
    /
    from Rev 30 to Rev 31
    Reverse comparison

Rev 30 → Rev 31

/trunk/sc2v.pdf Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
/trunk/ChangeLog
8,9 → 8,9
 
Fix bug using comments with -- and ++ operators
Fix bug inferring regs with arrays
Fix bug when using defines inside case statements
Fix bug when using defines inside case statements
Fix bug using comments
Fix bug when assigning defines to variables
Fix bug when assigning defines to variables
 
18-05-2005 Version 0.4.3
 
23,7 → 23,7
Fix bug in hexadecimal numbers in case statatements
Fix bug in type conversions
Fix bug in array length
Fix bug in process without variables declaration
Fix bug in process without variables declaration
15-03-2005 Version 0.4.1
 
30,11 → 30,11
Fix bug with <= comparation
for loops with int type as index supported
Support hex numbers in switchs
Support sc_signals arrays
Support sc_signals arrays
Fix bug when connecting a output port to another
Solved problem in type conversions
Solved problem with enumeration list
Solved bug in nested switch statements
Solved bug in nested switch statements
 
25-02-2005 Version 0.4
 
/trunk/src/sc2v_step1.h
1,9 → 1,7
/* -----------------------------------------------------------------------------
*
* SystemC to Verilog Translator v0.4
* Provided by OpenSoc Design
*
* www.opensocdesign.com
* Provided by Universidad Rey Juan Carlos
*
* -----------------------------------------------------------------------------
* This program is free software; you can redistribute it and/or modify
/trunk/src/sc2v_step1.y
1,9 → 1,7
/* -----------------------------------------------------------------------------
*
* SystemC to Verilog Translator v0.4
* Provided by OpenSoc Design
*
* www.opensocdesign.com
* Provided by Universidad Rey Juan Carlos
*
* -----------------------------------------------------------------------------
* This program is free software; you can redistribute it and/or modify
/trunk/src/sc2v_step2.h
1,9 → 1,7
/* -----------------------------------------------------------------------------
*
* SystemC to Verilog Translator v0.4
* Provided by OpenSoc Design
*
* www.opensocdesign.com
* Provided by Universidad Rey Juan Carlos
*
* -----------------------------------------------------------------------------
* This program is free software; you can redistribute it and/or modify
/trunk/src/sc2v_step2.y
1,9 → 1,7
/* -----------------------------------------------------------------------------
*
* SystemC to Verilog Translator v0.4
* Provided by OpenSoc Design
*
* www.opensocdesign.com
* Provided by Universidad Rey Juan Carlos
*
* -----------------------------------------------------------------------------
* This program is free software; you can redistribute it and/or modify
/trunk/src/sc2v_step3.y
1,9 → 1,7
/* -----------------------------------------------------------------------------
*
* SystemC to Verilog Translator v0.4
* Provided by OpenSoc Design
*
* www.opensocdesign.com
* Provided by Universidad Rey Juan Carlos
*
* -----------------------------------------------------------------------------
* This program is free software; you can redistribute it and/or modify
/trunk/src/sc2v_step1.l
1,9 → 1,7
/* -----------------------------------------------------------------------------
*
* SystemC to Verilog Translator v0.4
* Provided by OpenSoc Design
*
* www.opensocdesign.com
* Provided by Universidad Rey Juan Carlos
*
* -----------------------------------------------------------------------------
* This program is free software; you can redistribute it and/or modify
/trunk/src/sc2v_step2.l
1,9 → 1,7
/* -----------------------------------------------------------------------------
*
* SystemC to Verilog Translator v0.4
* Provided by OpenSoc Design
*
* www.opensocdesign.com
* Provided by Universidad Rey Juan Carlos
*
* -----------------------------------------------------------------------------
* This program is free software; you can redistribute it and/or modify
/trunk/src/sc2v_step3.l
1,9 → 1,7
/* -----------------------------------------------------------------------------
*
* SystemC to Verilog Translator v0.4
* Provided by OpenSoc Design
*
* www.opensocdesign.com
* Provided by Universidad Rey Juan Carlos
*
* -----------------------------------------------------------------------------
* This program is free software; you can redistribute it and/or modify
/trunk/src/sc2v_step1.c
1,11 → 1,8
/* -----------------------------------------------------------------------------
*
* SystemC to Verilog Translator v0.4
* Provided by OpenSoc Design
* Provided by Universidad Rey Juan Carlos
*
* www.opensocdesign.com
*
* -----------------------------------------------------------------------------
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
/trunk/src/sc2v_step2.c
1,9 → 1,7
/* -----------------------------------------------------------------------------
*
* SystemC to Verilog Translator v0.4
* Provided by OpenSoc Design
*
* www.opensocdesign.com
* Provided by Universidad Rey Juan Carlos
*
* -----------------------------------------------------------------------------
* This program is free software; you can redistribute it and/or modify
/trunk/README
16,12 → 16,12
 
Authors:
Pablo Huerta (phuerta@opensocdesign.com)
Javier Castillo (jcastillo@opensocdesign.com)
Pablo Huerta (pablo.huerta@urjc.es)
Javier Castillo (javier.castillo@urjc.es)
Contributors:
 
David Moloney
David Moloney
Harald Devos
 
 
64,10 → 64,7
5- For testing the application we recommend to use the systemcdes,systecaes and
systemcmd5 cores, available at www.opencores.org.
 
6- For any doubt, comment, or for reporting bugs, feel free to write to
sc2v@opensocdesign.com
 
 
TODO:
 
- Repair all known bugs.
/trunk/examples/rng.cpp
9,13 → 9,9
//// ////
//// To Do: ////
//// - nothing ////
//// ////
//// Author(s): ////
//// - Javier Castillo, jcastilo@opencores.org ////
//// ////
//// This core is provided by OpenSoc ////
//// http://www.opensocdesign.com ////
//// ////
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
46,6 → 42,9
// CVS Revision History
//
// $Log: not supported by cvs2svn $
// Revision 1.1.1.1 2004/10/08 14:04:10 jcastillo
// First import
//
// Revision 1.2 2004/08/30 17:01:50 jcastillo
// Used indent command
//
/trunk/examples/rng.h
13,9 → 13,6
//// Author(s): ////
//// - Javier Castillo, jcastilo@opencores.org ////
//// ////
//// This core is provided by OpenSoc ////
//// http://www.opensocdesign.com ////
//// ////
//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
46,6 → 43,9
// CVS Revision History
//
// $Log: not supported by cvs2svn $
// Revision 1.1.1.1 2004/10/08 14:04:10 jcastillo
// First import
//
// Revision 1.2 2004/08/30 17:01:50 jcastillo
// Used indent command
//

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