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Subversion Repositories openrisc
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- This comparison shows the changes necessary to convert path
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- from Rev 315 to Rev 316
- ↔ Reverse comparison
Rev 315 → Rev 316
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/builtin_ctz_v3.c
0,0 → 1,12
/* Check that we don't use the swap insn for ctz by checking |
assembler output. The swap instruction was implemented in v8. */ |
/* { dg-do compile } */ |
/* { dg-skip-if "" { "cris*-*-elf" } { "-march*" } { "" } } */ |
/* { dg-options "-O2 -march=v3" } */ |
/* { dg-final { scan-assembler-not "\[ \t\]swapwbr\[ \t\]" } } */ |
|
int |
f (int a) |
{ |
return __builtin_ctz(a); |
} |
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/builtin_ctz_v3.c
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Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/builtin_ctz_v8.c
===================================================================
--- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/builtin_ctz_v8.c (nonexistent)
+++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/builtin_ctz_v8.c (revision 316)
@@ -0,0 +1,12 @@
+/* Check that we use the swap insn for ctz by checking assembler output.
+ The swap instruction was implemented in v8. */
+/* { dg-do compile } */
+/* { dg-skip-if "" { "cris*-*-elf" } { "-march*" } { "" } } */
+/* { dg-options "-O2 -march=v8" } */
+/* { dg-final { scan-assembler "\[ \t\]swapwbr\[ \t\]" } } */
+
+int
+f (int a)
+{
+ return __builtin_ctz(a);
+}
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/builtin_ctz_v8.c
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Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/rld-legit1.c
===================================================================
--- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/rld-legit1.c (nonexistent)
+++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/rld-legit1.c (revision 316)
@@ -0,0 +1,21 @@
+/* Check that we don't get unnecessary insns due to reload using more
+ insns than needed due to reloading of more locations than
+ needed. */
+/* { dg-options -O2 } */
+/* { dg-final { scan-assembler-not "movs.w" } } */
+/* { dg-final { scan-assembler-not "move.w" } } */
+
+/* As torture/pr24750-2.c, except we need to clobber R8 for thorough
+ testing and know we can do, since we replace the frame-pointer. */
+
+int
+f (short *a, char *y)
+{
+ __asm__ ("" : : :
+#ifndef __PIC__
+ "r0",
+#endif
+ "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8",
+ "r9", "r10", "r11", "r12", "r13");
+ return y[*a];
+}
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/rld-legit1.c
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Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/rld-legit2.c
===================================================================
--- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/rld-legit2.c (nonexistent)
+++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/rld-legit2.c (revision 316)
@@ -0,0 +1,16 @@
+/* A variant of rld-legit1.c only for full code coverage of the
+ initial version of cris_reload_address_legitimized. */
+/* { dg-options -O2 } */
+
+short *
+g (short *a, char *y)
+{
+ __asm__ ("" : : :
+#ifndef __PIC__
+ "r0",
+#endif
+ "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8",
+ "r9", "r10", "r11", "r12", "r13");
+ y[*a++] = 0;
+ return a;
+}
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/rld-legit2.c
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Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/peep2-xsrand.c
===================================================================
--- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/peep2-xsrand.c (nonexistent)
+++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/peep2-xsrand.c (revision 316)
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-final { scan-assembler "and.w " } } */
+/* { dg-final { scan-assembler "and.b " } } */
+/* { dg-final { scan-assembler-not "and.d" } } */
+/* { dg-options "-O2" } */
+
+/* Test the "asrandb", "asrandw", "lsrandb" and "lsrandw" peephole2:s
+ trivially. */
+
+unsigned int
+andwlsr (unsigned int x)
+{
+ return (x >> 17) & 0x7ff;
+}
+
+unsigned int
+andblsr (unsigned int x)
+{
+ return (x >> 25) & 0x5f;
+}
+
+int
+andwasr (int x)
+{
+ return (x >> 17) & 0x7ff;
+}
+
+int
+andbasr (int x)
+{
+ return (x >> 25) & 0x5f;
+}
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/peep2-xsrand.c
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Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/builtin_bswap_v3.c
===================================================================
--- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/builtin_bswap_v3.c (nonexistent)
+++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/builtin_bswap_v3.c (revision 316)
@@ -0,0 +1,12 @@
+/* Check that we don't use the swap insn for bswap by checking assembler
+ output. The swap instruction was added in v8. */
+/* { dg-do compile } */
+/* { dg-skip-if "" { "cris*-*-elf" } { "-march*" } { "" } } */
+/* { dg-options "-O2 -march=v3" } */
+/* { dg-final { scan-assembler-not "\[ \t\]swapwb\[ \t\]" } } */
+
+int
+f (int a)
+{
+ return __builtin_bswap32(a);
+}
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/builtin_bswap_v3.c
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Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/cris.exp
===================================================================
--- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/cris.exp (nonexistent)
+++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/cris.exp (revision 316)
@@ -0,0 +1,41 @@
+# Copyright (C) 2005, 2007 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+#
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/biap.c
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Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/asmreg-1.c
===================================================================
--- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/asmreg-1.c (nonexistent)
+++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/asmreg-1.c (revision 316)
@@ -0,0 +1,73 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler "\\\.ifnc \\\$r9-\\\$r10-\\\$r11-\\\$r12" } } */
+
+/* Sanity check for asm register operands in syscall failed for
+ cris-axis-linux-gnu due to regmove bug.
+ Hans-Peter Nilsson . */
+
+extern void lseek64 (int, long long, int);
+extern int *__errno_location (void);
+struct dirent64
+{
+ long long d_off;
+ unsigned short int d_reclen;
+ char d_name[256];
+};
+struct kernel_dirent64
+{
+ long long d_off;
+ unsigned short d_reclen;
+ char d_name[256];
+};
+
+static inline int __attribute__ ((__always_inline__))
+__syscall_getdents64 (int fd, char * dirp, unsigned count)
+{
+ register unsigned long __sys_res asm ("r10");
+ register unsigned long __r10 __asm__ ("r10") = (unsigned long) fd;
+ register unsigned long __r11 __asm__ ("r11") = (unsigned long) dirp;
+ register unsigned long __r12 __asm__ ("r12") = (unsigned long) count;
+ register unsigned long __callno asm ("r9") = (220);
+ asm volatile (".ifnc %1-%0-%3-%4,$r9-$r10-$r11-$r12\n\t"
+ ".err\n\t"
+ ".endif\n\t"
+ "break 13"
+ : "=r" (__sys_res)
+ : "r" (__callno), "0" (__r10), "r" (__r11), "r" (__r12)
+ : "memory");
+ if (__sys_res >= (unsigned long) -4096)
+ {
+ (*__errno_location ()) = - __sys_res;
+ __sys_res = -1;
+ }
+ return __sys_res;
+}
+
+int
+__getdents64 (int fd, char *buf, unsigned nbytes)
+{
+ struct dirent64 *dp;
+ long long last_offset = -1;
+ int retval;
+ struct kernel_dirent64 *skdp, *kdp;
+ dp = (struct dirent64 *) buf;
+ skdp = kdp = __builtin_alloca (nbytes);
+ retval = __syscall_getdents64(fd, (char *)kdp, nbytes);
+ if (retval == -1)
+ return -1;
+ while ((char *) kdp < (char *) skdp + retval)
+ {
+ if ((char *) dp > buf + nbytes)
+ {
+ lseek64(fd, last_offset, 0);
+ break;
+ }
+ last_offset = kdp->d_off;
+ __builtin_memcpy (dp->d_name, kdp->d_name, kdp->d_reclen - 10);
+ dp = (struct dirent64 *) ((char *) dp + sizeof (*dp));
+ kdp = (struct kernel_dirent64 *) (((char *) kdp) + kdp->d_reclen);
+ }
+
+ return (char *) dp - buf;
+}
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/asmreg-1.c
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Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/builtin_bswap_v8.c
===================================================================
--- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/builtin_bswap_v8.c (nonexistent)
+++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/builtin_bswap_v8.c (revision 316)
@@ -0,0 +1,12 @@
+/* Check that we use the swap insn for bswap by checking assembler
+ output. The swap instruction was added in v8. */
+/* { dg-do compile } */
+/* { dg-skip-if "" { "cris*-*-elf" } { "-march*" } { "" } } */
+/* { dg-options "-O2 -march=v8" } */
+/* { dg-final { scan-assembler "\[ \t\]swapwb\[ \t\]" } } */
+
+int
+f (int a)
+{
+ return __builtin_bswap32(a);
+}
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/builtin_bswap_v8.c
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Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/peep2-andu1.c
===================================================================
--- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/peep2-andu1.c (nonexistent)
+++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/peep2-andu1.c (revision 316)
@@ -0,0 +1,42 @@
+/* { dg-do compile } */
+/* { dg-final { scan-assembler-not "and.d " } } */
+/* { dg-final { scan-assembler-not "move.d " } } */
+/* { dg-final { scan-assembler "cLear.b" } } */
+/* { dg-final { scan-assembler "movu.b" } } */
+/* { dg-final { scan-assembler "and.b" } } */
+/* { dg-final { scan-assembler "movu.w" } } */
+/* { dg-final { scan-assembler "and.w" } } */
+/* { dg-final { scan-assembler "andq" } } */
+/* { dg-options "-O2" } */
+
+/* Test the "andu" peephole2 trivially, memory operand. */
+
+int
+clearb (int x, int *y)
+{
+ return *y & 0xff00;
+}
+
+int
+andb (int x, int *y)
+{
+ return *y & 0x3f;
+}
+
+int
+andw (int x, int *y)
+{
+ return *y & 0xfff;
+}
+
+int
+andq (int x, int *y)
+{
+ return *y & 0xf0;
+}
+
+int
+andq2 (int x, int *y)
+{
+ return *y & 0xfff0;
+}
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/peep2-andu1.c
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Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/peep2-andu2.c
===================================================================
--- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/peep2-andu2.c (nonexistent)
+++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/peep2-andu2.c (revision 316)
@@ -0,0 +1,32 @@
+/* { dg-do assemble } */
+/* { dg-final { scan-assembler "movu.w \\\$r10,\\\$" } } */
+/* { dg-final { scan-assembler "and.w 2047,\\\$" } } */
+/* { dg-final { scan-assembler-not "move.d \\\$r10,\\\$" } } */
+/* { dg-final { scan-assembler "movu.b \\\$r10,\\\$" } } */
+/* { dg-final { scan-assembler "and.b 95,\\\$" } } */
+/* { dg-final { scan-assembler "andq -2,\\\$" } } */
+/* { dg-options "-O2 -save-temps" } */
+
+/* Test the "andu" peephole2 trivially, register operand. */
+
+unsigned int
+and_peep2_hi (unsigned int y, unsigned int *x)
+{
+ *x = y & 0x7ff;
+ return y;
+}
+
+unsigned int
+and_peep2_qi (unsigned int y, unsigned int *x)
+{
+ *x = y & 0x5f;
+ return y;
+}
+
+
+unsigned int
+and_peep2_q (unsigned int y, unsigned int *x)
+{
+ *x = y & 0xfe;
+ return y;
+}
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/peep2-andu2.c
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Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/torture/pr24750-2.c
===================================================================
--- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/torture/pr24750-2.c (nonexistent)
+++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/torture/pr24750-2.c (revision 316)
@@ -0,0 +1,20 @@
+/* As the invalid insn in this test got as far as to the target output
+ code and was "near enough" to output invalid assembly-code, we need
+ to pass it through the assembler as well.
+ { dg-do assemble } */
+
+int
+f (short *a, char *y)
+{
+ __asm__ ("" : : :
+#ifndef __PIC__
+ "r0",
+#endif
+ "r1", "r2", "r3", "r4", "r5", "r6", "r7",
+ /* Register R8 is frame-pointer, and we don't have a means
+ to not clobber it for the test-runs that don't eliminate
+ it. But that's ok; we have enough general-register
+ pressure to repeat the bug without that. */
+ "r9", "r10", "r11", "r12", "r13");
+ return y[*a];
+}
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/torture/pr24750-2.c
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Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/torture/no-pro-epi-1.c
===================================================================
--- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/torture/no-pro-epi-1.c (nonexistent)
+++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/torture/no-pro-epi-1.c (revision 316)
@@ -0,0 +1,4 @@
+/* { dg-options -mno-prologue-epilogue } */
+void f (void)
+{
+}
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/torture/no-pro-epi-1.c
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Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/torture/pr34773.c
===================================================================
--- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/torture/pr34773.c (nonexistent)
+++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/torture/pr34773.c (revision 316)
@@ -0,0 +1,74 @@
+/* { dg-do run } */
+union double_union
+{
+ double d;
+ int i[2];
+};
+void _dtoa_r (double) __attribute__ ((__noinline__));
+void _vfprintf_r (double) __attribute__ ((__noinline__));
+void
+__sprint_r(int);
+void
+_vfprintf_r(double da)
+{
+ double ffp = da;
+ double value = ffp;
+ union double_union tmp;
+
+ tmp.d = value;
+
+ if ((tmp.i[1]) & ((unsigned)0x80000000L)) {
+ value = -value;
+ }
+
+ _dtoa_r (value);
+
+ if (ffp != 0)
+ __sprint_r(value == 0);
+ __asm__ ("");
+}
+
+
+double dd = -.012;
+double ff = .012;
+
+void exit (int) __attribute__ ((__noreturn__));
+void abort (void) __attribute__ ((__noreturn__));
+void *memset(void *s, int c, __SIZE_TYPE__ n);
+void _dtoa_r (double d)
+{
+ if (d != ff)
+ abort ();
+ __asm__ ("");
+}
+
+void __sprint_r (int i)
+{
+ if (i != 0)
+ abort ();
+ __asm__ ("");
+}
+
+int clearstack (void) __attribute__ ((__noinline__));
+int clearstack (void)
+{
+ char doodle[128];
+ memset (doodle, 0, sizeof doodle);
+ __asm__ volatile ("" : : "g" (doodle) : "memory");
+ return doodle[127];
+}
+
+void doit (void) __attribute__ ((__noinline__));
+void doit (void)
+{
+ _vfprintf_r (dd);
+ _vfprintf_r (ff);
+ __asm__ ("");
+}
+
+int main(void)
+{
+ clearstack ();
+ doit ();
+ exit (0);
+}
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/torture/pr34773.c
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Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/torture/cris-torture.exp
===================================================================
--- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/torture/cris-torture.exp (nonexistent)
+++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/torture/cris-torture.exp (revision 316)
@@ -0,0 +1,41 @@
+# Copyright (C) 2005, 2007 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+#
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/builtin_clz_v0.c
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Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/builtin_clz_v3.c
===================================================================
--- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/builtin_clz_v3.c (nonexistent)
+++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/builtin_clz_v3.c (revision 316)
@@ -0,0 +1,12 @@
+/* Check that we use the lz insn for clz by checking assembler output.
+ The lz insn was implemented in CRIS v3 (ETRAX 4). */
+/* { dg-do compile } */
+/* { dg-skip-if "" { "cris*-*-elf" } { "-march*" } { "" } } */
+/* { dg-options "-O2 -march=v3" } */
+/* { dg-final { scan-assembler "\[ \t\]lz\[ \t\]" } } */
+
+int
+f (int a)
+{
+ return __builtin_clz(a);
+}
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/builtin_clz_v3.c
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Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/peep2-xsrand2.c
===================================================================
--- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/peep2-xsrand2.c (nonexistent)
+++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/peep2-xsrand2.c (revision 316)
@@ -0,0 +1,34 @@
+/* { dg-do compile } */
+/* { dg-final { scan-assembler "and.w -137," } } */
+/* { dg-final { scan-assembler "and.b -64," } } */
+/* { dg-final { scan-assembler "and.w -139," } } */
+/* { dg-final { scan-assembler "and.b -63," } } */
+/* { dg-final { scan-assembler-not "and.d" } } */
+/* { dg-options "-O2" } */
+
+/* PR target/17984. Test-case based on
+ testsuite/gcc.dg/cris-peep2-xsrand.c. */
+
+unsigned int
+andwlsr (unsigned int x)
+{
+ return (x >> 16) & 0xff77;
+}
+
+unsigned int
+andblsr (unsigned int x)
+{
+ return (x >> 24) & 0xc0;
+}
+
+int
+andwasr (int x)
+{
+ return (x >> 16) & 0xff75;
+}
+
+int
+andbasr (int x)
+{
+ return (x >> 24) & 0xc1;
+}
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/peep2-xsrand2.c
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Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/20011127-1.c
===================================================================
--- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/20011127-1.c (nonexistent)
+++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/20011127-1.c (revision 316)
@@ -0,0 +1,30 @@
+/* Copyright (C) 2001, 2007 Free Software Foundation.
+ by Hans-Peter Nilsson
+
+ Making sure that invalid asm operand modifiers don't cause an ICE. */
+
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-message "reg:SI|const_double:DF" "prune debug_rtx output" { target *-*-* } 0 } */
+
+void
+foo (void)
+{
+ /* The first case symbolizes the default case for CRIS. */
+ asm ("\n;# %w0" : : "r" (0)); /* { dg-error "modifier" } */
+
+ /* These are explicit cases. Luckily, a register is invalid in most of
+ them. */
+ asm ("\n;# %b0" : : "r" (0)); /* { dg-error "modifier" } */
+ asm ("\n;# %v0" : : "r" (0)); /* { dg-error "modifier" } */
+ asm ("\n;# %P0" : : "r" (0)); /* { dg-error "modifier" } */
+ asm ("\n;# %p0" : : "r" (0)); /* { dg-error "modifier" } */
+ asm ("\n;# %z0" : : "r" (0)); /* { dg-error "modifier" } */
+ asm ("\n;# %H0" : : "F" (0.5)); /* { dg-error "modifier" } */
+ asm ("\n;# %e0" : : "r" (0)); /* { dg-error "modifier" } */
+ asm ("\n;# %m0" : : "r" (0)); /* { dg-error "modifier" } */
+ asm ("\n;# %A0" : : "r" (0)); /* { dg-error "modifier" } */
+ asm ("\n;# %D0" : : "r" (0)); /* { dg-error "modifier" } */
+ asm ("\n;# %T0" : : "r" (0)); /* { dg-error "modifier" } */
+ /* Add more must-not-ICE asm errors here as we find them ICEing. */
+}
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/20011127-1.c
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Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/asm-b-1.c
===================================================================
--- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/asm-b-1.c (nonexistent)
+++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/asm-b-1.c (revision 316)
@@ -0,0 +1,15 @@
+/* { dg-do assemble } */
+/* { dg-options "-O2" } */
+
+/* Checking that the "b" constraint is accepted, for all target variants. */
+
+long sys_ipc (void)
+{
+ long __gu_err = -14;
+ long dummy_for_get_user_asm_64_;
+ __asm__ __volatile__( "move.d [%1+],%0\n"
+ : "=r" (__gu_err), "=b" (dummy_for_get_user_asm_64_)
+ : "0" (__gu_err));
+
+ return __gu_err;
+}
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/cris/asm-b-1.c
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