URL
https://opencores.org/ocsvn/t48/t48/trunk
Subversion Repositories t48
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 315 to Rev 316
- ↔ Reverse comparison
Rev 315 → Rev 316
/t48/trunk/COMPILE_LIST
85,3 → 85,36
bench/vhdl/tb_t8243.vhd |
bench/vhdl/tb_t8243-c.vhd |
Elaborate tb_t8243_behav_c0 |
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rtl/vhdl/upi41_db_bus.vhd |
rtl/vhdl/upi41_db_bus-c.vhd |
rtl/vhdl/upi41_core.vhd |
rtl/vhdl/upi41_core-c.vhd |
rtl/vhdl/system/t8041_notri.vhd |
rtl/vhdl/system/t8041_notri-c.vhd |
rtl/vhdl/system/t8041.vhd |
rtl/vhdl/system/t8041-c.vhd |
bench/vhdl/upi_stim.vhd |
bench/vhdl/upi_stim-c.vhd |
bench/vhdl/tb_t8041.vhd |
bench/vhdl/tb_t8041-c.vhd |
Elaborate tb_t8041_behav_c0 |
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rtl/vhdl/system/t8041a_notri.vhd |
rtl/vhdl/system/t8041a_notri-c.vhd |
rtl/vhdl/system/t8041a.vhd |
rtl/vhdl/system/t8041a-c.vhd |
bench/vhdl/tb_t8041a.vhd |
bench/vhdl/tb_t8041a-c.vhd |
Elaborate tb_t8041a_behav_c0 |
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rtl/vhdl/system/t49_rom-e.vhd |
bench/vhdl/t49_rom-lpm-a.vhd |
bench/vhdl/t49_rom-lpm-c.vhd |
rtl/vhdl/system/t8042ah_notri.vhd |
rtl/vhdl/system/t8042ah_notri-c.vhd |
rtl/vhdl/system/t8042ah.vhd |
rtl/vhdl/system/t8042ah-c.vhd |
bench/vhdl/tb_t8042ah.vhd |
bench/vhdl/tb_t8042ah-c.vhd |
Elaborate tb_t8042ah_behav_c0 |
/t48/trunk/README
15,17 → 15,20
the integrating system. On the other hand, nearly the full functionality of a |
stock 8048/8049 is available. |
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The core also provides a variant that implements the specific features of the |
UPI-41A/41AH/42/42AH device family. |
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Download |
-------- |
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Download the latest stable release from the project homepage at OpenCores.org: |
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http://www.opencores.org/projects.cgi/web/t48/overview/ |
https://opencores.org/projects/t48 |
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You can get the latest version of the design files from CVS: |
You can get the latest version of the design files from SVN: |
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http://www.opencores.org/pdownloads.cgi/list/t48 |
https://opencores.org/websvn/listing/t48 |
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Please keep in mind that this is work in progress and might contain smaller or |
bigger problems. |
144,7 → 147,7
http://www.symphonyeda.com/ |
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Make will analyze all VHDL files (RTL and testbench code) and elaborate all |
three testbench top-levels if appropriate for the chosen simulator: |
testbench top-levels if appropriate for the chosen simulator: |
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* tb_behav_c0 |
The main testbench for regression testing. |
163,6 → 166,15
* tb_t8048_t8243_behav_c0 |
Testbench containing the t8048 and the asynchronous t8243 toplevel. |
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* tb_t8041_behav_c0 |
Testbench containing the t8041 sample system. |
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* tb_t8041a_behav_c0 |
Testbench containing the t8041a sample system. |
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* tb_t8042ah_behav_c0 |
Testbench containing the t8042ah sample system. |
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Each Makefile has a 'clean' target to delete all intermediate data: |
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$ make -f Makefile.<simulator> clean |
184,7 → 196,7
These files are: |
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* rom_t49.hex |
Internal ROM contents for 8x49 derivatives, |
Internal ROM contents for t8x49 and t8042ah derivatives, |
address range 000H to 7FFH. |
Intel hex format, starting at address 000H. |
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194,7 → 206,7
Intel hex format, starting at address 800H. |
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* rom_t48.hex |
Internal ROM contents for t8x48 derivatives, |
Internal ROM contents for t8x48 and t8041x derivatives, |
address range 000H to 3FFH. |
Intel hex format, starting at address 000H. |
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