OpenCores
URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

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  • This comparison shows the changes necessary to convert path 
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    from Rev 318 to Rev 319
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  •

Rev 318 → Rev 319

/trunk/mp3/sw/trap/trap.S
0,0 → 1,91
.extern main
.extern _src_beg
.extern _dst_beg
.extern _dst_end
.extern _c_reset
 
.org 0x100
_reset:
l.nop
l.nop
l.movhi r0, 0x0
l.slli r0,r0,16
l.addi r1,r0,0x0
l.addi r2,r0,0x0
l.addi r3,r0,0x0
l.addi r4,r0,0x0
l.addi r5,r0,0x0
l.addi r6,r0,0x0
l.addi r7,r0,0x0
l.addi r8,r0,0x0
l.addi r9,r0,0x1234
l.addi r10,r0,0x0
l.addi r11,r0,0x0
l.addi r12,r0,0x0
l.addi r13,r0,0x0
l.addi r14,r0,0x0
l.addi r15,r0,0x0
l.addi r16,r0,0x0
l.addi r17,r0,0x0
l.addi r18,r0,0x0
l.addi r19,r0,0x0
l.addi r20,r0,0x0
l.addi r21,r0,0x0
l.addi r22,r0,0x0
l.addi r23,r0,0x0
l.addi r24,r0,0x0
l.addi r25,r0,0x0
l.addi r26,r0,0x0
l.addi r27,r0,0x0
l.addi r28,r0,0x0
l.addi r29,r0,0x0
l.addi r30,r0,0x0
l.addi r31,r0,0x0
 
l.movhi r2,hi(_main)
l.ori r2,r2,lo(_main)
l.jr r2
l.addi r2,r0,0
 
.org 0xd00
_break:
l.nop
l.nop
l.rfe
l.nop
l.nop
 
.org 0xe00
_trap:
l.nop
l.nop
l.rfe
l.nop
l.nop
 
.org 0x2000
 
_main:
l.nop
l.addi r5,r0,3
l.mtspr r0,r5,17
l.nop
l.addi r11,r0,1
l.addi r11,r0,3
l.addi r11,r0,5
l.trap 1
l.addi r11,r0,10
l.addi r11,r0,15
l.j _forw
l.addi r11,r0,20
l.addi r11,r0,25
_forw:
l.addi r11,r0,30
l.trap 1
l.addi r11,r0,35
l.nop
l.nop
l.sys 203
l.nop
 
/trunk/mp3/sw/trap/Makefile
0,0 → 1,16
CCFLAGS = -O2 -g -nostdlib
 
all: trap.or32
 
trap.or32: trap.o
or32-rtems-gcc -nostdlib trap.o -o trap.or32
or32-rtems-objcopy -O binary trap.or32 trap.bin
../utils/bin2srec trap.bin > trap.srec
../utils/bin2hex trap.bin > trap.hex
cp trap.hex ../../sim/src/flash.in
 
trap.o: trap.S
or32-rtems-gcc $(CCFLAGS) trap.S -c -DOR1K
 
clean:
rm -f *.o trap.or32 *.bin *.srec *.hex
/trunk/mp3/sw/syscall/syscall.S
0,0 → 1,80
.extern main
.extern _src_beg
.extern _dst_beg
.extern _dst_end
.extern _c_reset
 
.org 0x100
_reset:
l.nop
l.nop
l.movhi r0, 0x0
l.slli r0,r0,16
l.addi r1,r0,0x0
l.addi r2,r0,0x0
l.addi r3,r0,0x0
l.addi r4,r0,0x0
l.addi r5,r0,0x0
l.addi r6,r0,0x0
l.addi r7,r0,0x0
l.addi r8,r0,0x0
l.addi r9,r0,0x1234
l.addi r10,r0,0x0
l.addi r11,r0,0x0
l.addi r12,r0,0x0
l.addi r13,r0,0x0
l.addi r14,r0,0x0
l.addi r15,r0,0x0
l.addi r16,r0,0x0
l.addi r17,r0,0x0
l.addi r18,r0,0x0
l.addi r19,r0,0x0
l.addi r20,r0,0x0
l.addi r21,r0,0x0
l.addi r22,r0,0x0
l.addi r23,r0,0x0
l.addi r24,r0,0x0
l.addi r25,r0,0x0
l.addi r26,r0,0x0
l.addi r27,r0,0x0
l.addi r28,r0,0x0
l.addi r29,r0,0x0
l.addi r30,r0,0x0
l.addi r31,r0,0x0
 
l.movhi r2,hi(_main)
l.ori r2,r2,lo(_main)
l.jr r2
l.addi r2,r0,0
 
.org 0xc00
_syscall:
l.nop
l.nop
l.rfe
l.nop
l.nop
 
.org 0x2000
 
_main:
l.nop
l.addi r5,r0,3
l.mtspr r0,r5,17
l.nop
l.addi r11,r0,1
_loop:
l.addi r11,r0,3
l.addi r11,r0,5
l.sys 13
l.addi r11,r0,10
l.addi r11,r0,15
l.addi r11,r0,20
l.nop
l.nop
l.nop
l.nop
l.sys 203
l.nop
 
/trunk/mp3/sw/syscall/Makefile
0,0 → 1,16
CCFLAGS = -O2 -g -nostdlib
 
all: syscall.or32
 
syscall.or32: syscall.o
or32-rtems-gcc -nostdlib syscall.o -o syscall.or32
or32-rtems-objcopy -O binary syscall.or32 syscall.bin
../utils/bin2srec syscall.bin > syscall.srec
../utils/bin2hex syscall.bin > syscall.hex
cp syscall.hex ../../sim/src/flash.in
 
syscall.o: syscall.S
or32-rtems-gcc $(CCFLAGS) syscall.S -c -DOR1K
 
clean:
rm -f *.o syscall.or32 *.bin *.srec *.hex
/trunk/mp3/sw/ints/excepts.txt
0,0 → 1,31
Original in the or1k arch manual:
EXCEPTION EPCR NORMAL RESTART EPCR ESR[DSX]=1 RESTART ESR[DSX]=1 EEAR
Reset X X X X -
Bus Error PC EPCR PC-4 EPCR YES
Data Page Fault PC EPCR PC-4 EPCR YES
IPFault PC EPCR PC-4 EPCR YES
Low Priority EI PC EPCR+4 N/A N/A -
Alignment PC EPCR+4 PC-4 EPCR YES
Illegal Insn PC EPCR+4 PC-4 EPCR -
High Prio EI PC EPCR+4 N/A N/A -
D-TLB Miss PC EPCR PC-4 EPCR YES
I-TLB Miss PC EPCR PC-4 EPCR YES
Range PC EPCR+4 PC-4 EPCR -
System Call PC EPCR+4 N/A N/A -
Breakpoint PC EPCR+4 PC-4 EPCR -
 
New (how or1ksim and or1200 work/whould work):
EXCEPTION EPCR NORMAL RESTART EPCR ESR[DSX]=1 RESTART ESR[DSX]=1 EEAR
Reset X X X X -
Bus Error PC EPCR PC-4 EPCR YES
Data Page Fault PC EPCR PC-4 EPCR YES
IPFault PC EPCR PC-4 EPCR YES
Low Priority EI PC+4 EPCR N/A N/A -
Alignment PC+4 EPCR PC-4 EPCR YES
Illegal Insn PC+4 EPCR PC-4 EPCR -
High Prio EI PC+4 EPCR N/A N/A -
D-TLB Miss PC EPCR PC-4 EPCR YES
I-TLB Miss PC EPCR PC-4 EPCR YES
Range PC EPCR PC-4 EPCR -
System Call PC+4 EPCR N/A N/A -
Trap PC+4 EPCR-4 PC-4 EPCR -
/trunk/mp3/sw/ints/Makefile
0,0 → 1,16
CCFLAGS = -O2 -g -nostdlib
 
all: ints.or32
 
ints.or32: ints.o
or32-rtems-gcc -nostdlib ints.o -o ints.or32
or32-rtems-objcopy -O binary ints.or32 ints.bin
../utils/bin2srec ints.bin > ints.srec
../utils/bin2hex ints.bin > ints.hex
cp ints.hex ../../sim/src/flash.in
 
ints.o: ints.S
or32-rtems-gcc $(CCFLAGS) ints.S -c -DOR1K
 
clean:
rm -f *.o ints.or32 *.bin *.srec *.hex
/trunk/mp3/sw/ints/ints.S
0,0 → 1,138
.extern main
.extern _src_beg
.extern _dst_beg
.extern _dst_end
.extern _c_reset
 
.org 0x100
_reset:
l.nop
l.nop
l.movhi r0, 0x0
l.slli r0,r0,16
l.addi r1,r0,0x0
l.addi r2,r0,0x0
l.addi r3,r0,0x0
l.addi r4,r0,0x0
l.addi r5,r0,0x0
l.addi r6,r0,0x0
l.addi r7,r0,0x0
l.addi r8,r0,0x0
l.addi r9,r0,0x1234
l.addi r10,r0,0x0
l.addi r11,r0,0x0
l.addi r12,r0,0x0
l.addi r13,r0,0x0
l.addi r14,r0,0x0
l.addi r15,r0,0x0
l.addi r16,r0,0x0
l.addi r17,r0,0x0
l.addi r18,r0,0x0
l.addi r19,r0,0x0
l.addi r20,r0,0x0
l.addi r21,r0,0x0
l.addi r22,r0,0x0
l.addi r23,r0,0x0
l.addi r24,r0,0x0
l.addi r25,r0,0x0
l.addi r26,r0,0x0
l.addi r27,r0,0x0
l.addi r28,r0,0x0
l.addi r29,r0,0x0
l.addi r30,r0,0x0
l.addi r31,r0,0x0
 
l.movhi r2,hi(_main)
l.ori r2,r2,lo(_main)
l.jr r2
l.addi r2,r0,0
 
.org 0x0800
_lpint:
l.nop
l.nop
# clear TTMR[IP]
l.addi r4,r0,0x5000
l.movhi r5,0x6000
l.addi r5,r5,733
l.mtspr r4,r5,0 # set TTCR
 
# clear entire PICSR
l.addi r4,r0,0x4800
l.movhi r5,0x0000
l.addi r5,r5,0x0000
l.mtspr r4,r5,2 # set PICSR
 
l.nop
l.rfe
l.nop
l.nop
 
.org 0x0900
_xxx:
l.nop
l.nop
l.rfe
l.nop
l.nop
 
.org 0xc00
_syscall:
l.nop
l.nop
l.rfe
l.nop
l.nop
 
.org 0x2000
 
_main:
l.nop
l.nop
 
#
# set tick to generate an interrupt every, let say 730 cycles
#
l.addi r4,r0,0x5000
l.movhi r5,0x6000
l.addi r5,r5,729
l.mtspr r4,r5,0 # set TTCR
 
#
# unmask all ints
#
l.addi r4,r0,0x4800
l.movhi r5,0xffff
l.addi r5,r5,0xffff
l.mtspr r4,r5,0 # set PICMR
 
#
# Enable exceptions and interrupts
#
l.addi r5,r0,7
l.mtspr r0,r5,17 # set SR
 
#
# clear sanity counters
#
l.addi r11,r0,0
l.addi r12,r0,0
l.addi r13,r0,0
l.addi r14,r0,0
l.addi r15,r0,0
_loop:
l.addi r11,r11,1
l.nop
l.addi r12,r12,1
l.addi r13,r13,1
l.j _loop
l.addi r14,r14,1
l.addi r15,r15,1
l.nop
l.nop
l.sys 203
l.nop
 
 

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