URL
https://opencores.org/ocsvn/or1k_old/or1k_old/trunk
Subversion Repositories or1k_old
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 331 to Rev 332
- ↔ Reverse comparison
Rev 331 → Rev 332
/trunk/or1ksim/sim-config.h
39,6 → 39,11
int tagtype; |
} ic; |
|
struct { |
int enabled; /* Is tick timer enabled? */ |
int irq; /* IRQ of this device */ |
} tick; |
|
int clkcycle_ns; /* Clock cycle in nanoseconds */ |
|
int nuarts; |
48,6 → 53,7
char txfile[STR_SIZE]; /* Filename for TX (required) */ |
int jitter; /* CZ 250801 - in msecs...time to block */ |
unsigned long baseaddr; /* Naturally aligned base address */ |
int irq; /* IRQ of this device */ |
unsigned long vapi_id; /* VAPI id for this instance */ |
} uarts[NR_UARTS]; |
|
55,7 → 61,7
int dmas_enabled; |
struct { |
unsigned long baseaddr; |
unsigned irq; |
int irq; /* IRQ of this device */ |
unsigned long vapi_id; /* VAPI id for this instance */ |
} dmas[NR_DMAS]; |
|
/trunk/or1ksim/sim.cfg
245,6 → 245,9
|
tx_file = "<filename>" |
filename, where to write data to |
|
irq = <value> |
irq number for this device |
|
jitter = <value> |
in msecs... time to block, -1 to disable it |
259,6 → 262,7
|
device 0 |
baseaddr = 0x80000000 |
irq = 2 |
rxfile = "/tmp/uart0.rx" |
txfile = "/tmp/uart0.tx" |
jitter = -1 /* async behaviour */ |
346,3 → 350,19
txfile = "/tmp/eth0.tx" |
enddevice |
end |
|
/* TICK TIMER SECTION |
|
This section configures tick timer |
|
enabled = 0/1 |
whether tick timer is enabled |
|
irq = <value> |
irq number |
*/ |
|
section tick |
enabled = 0 |
irq = 3 |
end |
/trunk/or1ksim/tick/tick.h
19,5 → 19,5
|
/* Prototypes */ |
void tick_reset(); |
void tick_clock(); |
inline void tick_clock(); |
|
/trunk/or1ksim/tick/tick.c
36,23 → 36,30
/* Reset. It initializes TTCR register. */ |
void tick_reset() |
{ |
printf("Resetting Tick Timer.\n"); |
mtspr(SPR_TTCR, 0); |
mtspr(SPR_TTMR, 0); |
tt_stopped = 0; |
if (config.tick.enabled) { |
if (config.sim.verbose) |
printf("Resetting Tick Timer.\n"); |
mtspr(SPR_TTCR, 0); |
mtspr(SPR_TTMR, 0); |
tt_stopped = 0; |
} else |
tt_stopped = 1; |
} |
|
/* Simulation hook. Must be called every clock cycle to simulate tick |
timer. It does internal functional tick timer simulation. */ |
void tick_clock() |
inline void tick_clock() |
{ |
unsigned long ttcr; |
unsigned long ttmr; |
|
|
if (tt_stopped) |
return; |
|
ttcr = mfspr(SPR_TTCR); |
ttmr = mfspr(SPR_TTMR); |
|
if (!(ttmr & SPR_TTMR_M) || tt_stopped) |
if (!(ttmr & SPR_TTMR_M)) |
return; |
|
if ((ttcr & SPR_TTCR_PERIOD) == (ttmr & SPR_TTMR_PERIOD)) { |
/trunk/or1ksim/pic/pic.h
20,8 → 20,3
/* Prototypes */ |
void pic_reset(); |
inline void pic_clock(); |
|
/* How interrupt sources are connected to the PIC */ |
#define INT_UART 2 |
#define INT_TICK 3 |
#define INT_DMA 4 |
/trunk/or1ksim/testbench/default.cfg
91,3 → 91,8
section ethernet |
enabled = 0 |
end |
|
section tick |
enabled = 1 |
irq = 3 |
end |
/trunk/or1ksim/testbench/dmatest.cfg
12,3 → 12,9
section sim |
verbose = 0 |
end |
|
|
section tick |
enabled = 1 |
irq = 3 |
end |
/trunk/or1ksim/peripheral/16450.c
314,7 → 314,7
uarts[i].regs.iir = UART_IIR_MSI; |
} |
if (!(uarts[i].regs.iir & UART_IIR_NO_INT)) |
report_interrupt(INT_UART); |
report_interrupt(config.uarts[i].irq); |
} |
} |
|
/trunk/or1ksim/sim-config.c
85,6 → 85,9
|
/* Ethernet */ |
config.ethernets_enabled = 0; |
|
/* Tick timer */ |
config.tick.enabled = 0; |
|
/* Old */ |
config.dc.tagtype = PHYSICAL/*VIRTUAL*/; |
253,7 → 256,7
char *name; |
int flags; |
} sections[] = { |
{"", 0}, |
{"", 0}, /* 0 */ |
{"mc", 0}, |
{"uart", 0}, |
{"dma", 0}, |
262,7 → 265,8
{"sim", 0}, |
{"debug", 0}, |
{"VAPI", 0}, |
{"ethernet",0} |
{"ethernet",0}, |
{"tick", 0} /* 10 */ |
}; |
|
/* *INDENT-OFF* */ |
284,6 → 288,7
{2, "device", "%i", change_device, (void *)(&tempL)}, |
{2, "enddevice", "", end_device, NULL}, |
{2, "baseaddr", "=0x%x", uart_baseaddr, (void *)(&tempUL)}, |
{2, "irq", "=%i", uart_irq, (void *)(&tempL)}, |
{2, "jitter", "=%i", uart_jitter, (void *)(&tempL)}, |
{2, "rxfile", "=\"%s\"", uart_rxfile, (void *)(&tempS[0])}, |
{2, "txfile", "=\"%s\"", uart_txfile, (void *)(&tempS[0])}, |
340,7 → 345,10
{9, "tx_channel", "=%i", eth_tx_channel,(void *)(&tempL)}, |
{9, "rxfile", "=\"%s\"", eth_rxfile, (void *)(&tempS[0])}, |
{9, "txfile", "=\"%s\"", eth_txfile, (void *)(&tempS[0])}, |
{9, "vapi_id", "=%0x%x", eth_vapi_id, (void *)(&tempUL)} |
{9, "vapi_id", "=%0x%x", eth_vapi_id, (void *)(&tempUL)}, |
|
{10, "enabled", "=%i", NULL, (void *)(&config.tick.enabled)}, |
{10, "irq", "=%i", NULL, (void *)(&config.tick.irq)}, |
}; |
|
/* *INDENT-ON* */ |
399,6 → 407,15
} |
} |
|
void uart_irq () { |
if (current_device >= 0 && current_device < config.nuarts) |
config.uarts[current_device].irq = tempL; |
else { |
fprintf (stderr, "ERROR: invalid device number."); |
exit (-1); |
} |
} |
|
void dma_baseaddr () { |
if (current_device >= 0 && current_device < config.ndmas) |
config.dmas[current_device].baseaddr = tempUL; |