OpenCores
URL https://opencores.org/ocsvn/plasma/plasma/trunk

Subversion Repositories plasma

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /
    from Rev 335 to Rev 336
    ↔ Reverse comparison
  •

Rev 335 → Rev 336

/trunk/kernel/filesys.c
125,7 → 125,7
for(block = 0; block < FLASH_SECTOR_SIZE / FLASH_BLOCK_SIZE; ++block)
{
i = sector * FLASH_SECTOR_SIZE / FLASH_BLOCK_SIZE + block;
if(FlashBlockEmpty[i >> 3] & (1 << (i & 7)))
if(i < FLASH_BLOCKS/8 && (FlashBlockEmpty[i >> 3] & (1 << (i & 7))))
{
memset(buf + FLASH_BLOCK_SIZE*block, 0xff, FLASH_BLOCK_SIZE);
++count;
/trunk/kernel/netutil.c
575,9 → 575,9
#ifdef DLL_SETUP
if(found == 0)
{
strcpy(buf, "/flash/bin/");
strcat(buf, argv[0]);
argv[0] = buf;
strcpy((char*)buf, "/flash/bin/");
strcat((char*)buf, argv[0]);
argv[0] = (char*)buf;
ConsoleRun(socket, argv);
}
#endif
/trunk/kernel/rtos_test.c
44,6 → 44,7
 
printf("TestCLib\n");
strcpy(s1, "Hello ");
memset(s2, 0, sizeof(s2));
strncpy(s2, "World wide", 5);
strcat(s1, s2);
strncat(s1, "!\nthing", 14);
433,7 → 434,7
void HtmlThread(void *arg);
void ConsoleInit(void);
void exit(int);
static uint8 macAddress[] = {0x00, 0x10, 0xdd, 0xce, 0x15, 0xd4};
uint8 macAddress[] = {0x00, 0x10, 0xdd, 0xce, 0x15, 0xd4};
 
 
void MainThread(void *Arg)
/trunk/kernel/rtos.c
1325,8 → 1325,58
#endif //OS_CPU_COUNT > 1
 
 
/************** WIN32 Support *************/
/************** WIN32/Linux Support *************/
#ifdef WIN32
#ifdef LINUX
#define putch putchar
#undef _LIBC
#undef kbhit
#undef getch
#define UartPrintf UartPrintf2
#define UartScanf UartScanf2
#include <stdio.h>
#include <stdlib.h>
#include <termios.h>
#include <unistd.h>
void Sleep(unsigned int value)
{
usleep(value * 1000);
}
 
int kbhit(void)
{
struct termios oldt, newt;
struct timeval tv;
fd_set read_fd;
 
tcgetattr(STDIN_FILENO, &oldt);
newt = oldt;
newt.c_lflag &= ~(ICANON | ECHO);
tcsetattr(STDIN_FILENO, TCSANOW, &newt);
tv.tv_sec=0;
tv.tv_usec=0;
FD_ZERO(&read_fd);
FD_SET(0,&read_fd);
if(select(1, &read_fd, NULL, NULL, &tv) == -1)
return 0;
if(FD_ISSET(0,&read_fd))
return 1;
return 0;
}
 
int getch(void)
{
struct termios oldt, newt;
int ch;
 
tcgetattr(STDIN_FILENO, &oldt);
newt = oldt;
newt.c_lflag &= ~(ICANON | ECHO);
tcsetattr(STDIN_FILENO, TCSANOW, &newt);
ch = getchar();
return ch;
}
#else
//Support RTOS inside Windows
#undef kbhit
#undef getch
1335,6 → 1385,7
extern int getch(void);
extern int putch(int);
extern void __stdcall Sleep(unsigned long value);
#endif
 
static uint32 Memory[8];
 
/trunk/kernel/math.c
591,6 → 591,7
 
/*************** Test *****************/
#ifdef WIN32
#undef _LIBC
#include <math.h>
#undef printf
#undef getch
/trunk/kernel/makefile
1,29 → 1,51
# Makefile for Plasma RTOS and Plasma TCP/IP stack
 
# The MIPS gcc compiler must use the cygwin1.dll that came with the compiler.
ifeq ($(LANG),)
 
# Customize for Linux
#CC_X86 = gcc -Wall -O -g
#CP = cp
#RM = rm -rf
#BIN_MIPS = ../../mips/sde/bin
#VHDL_DIR = ../vhdl
#GCC_MIPS = $(BIN_MIPS)/gcc $(CFLAGS)
#AS_MIPS = $(BIN_MIPS)/as
#LD_MIPS = $(BIN_MIPS)/ld
#DUMP_MIPS = $(BIN_MIPS)/objdump
 
# Customize for Windows
CC_X86 = cl /O1 /DWIN32 /I..\tools /nologo
# The MIPS gcc compiler must use the cygwin1.dll that came with the compiler.
CC_X86 = cl /O1 /nologo /I..\tools
CP = copy
RM = del
DWIN32 = -DWIN32
BIN_MIPS = ..\gccmips_elf
VHDL_DIR = ..\vhdl
TOOLS_DIR = ..\tools\\
APP_DIR = ..\App\\
LINUX_PWD =
ALIASING =
GCC_MIPS = $(BIN_MIPS)\gcc $(CFLAGS)
AS_MIPS = $(BIN_MIPS)\as
LD_MIPS = $(BIN_MIPS)\ld
DUMP_MIPS = $(BIN_MIPS)\objdump
CONVERT_BIN = $(TOOLS_DIR)convert_bin.exe
OBJ = obj
CFLAGS_X86 = /c /DWIN32
LFLAGS_X86 =
 
else
 
# Customized for Linux
# See http://www.opencores.com/projects.cgi/web/mips/linux_tools.htm
CC_X86 = gcc -Wall -O -g -I../tools
CP = cp
RM = rm -rf
DWIN32 =
TOOLS_DIR = ../tools/
APP_DIR = ../App/
LINUX_PWD = ./
ALIASING = -fno-strict-aliasing
GCC_MIPS = $(BIN_MIPS)mips-elf-gcc $(CFLAGS)
AS_MIPS = $(BIN_MIPS)mips-elf-as
LD_MIPS = $(BIN_MIPS)mips-elf-ld
DUMP_MIPS = $(BIN_MIPS)mips-elf-objdump
CONVERT_BIN = $(TOOLS_DIR)convert_bin.exe
#CONVERT_BIN = $(BIN_MIPS)mips-elf-objcopy -I elf32-big -O binary test.axf test.bin
OBJ = o
CFLAGS_X86 = -c -DWIN32 -DLINUX
LFLAGS_X86 = -lm
 
endif
 
# Use software multiplier (don't use mult.vhd)
CFLAGS_SW_MULT = -mno-mul -DUSE_SW_MULT
 
30,32 → 52,32
# Use 16 fewer registers (make reg_bank.vhd smaller)
CFLAGS_FEW_REGS = -ffixed-t0 -ffixed-t1 -ffixed-t2 -ffixed-t3 -ffixed-t4 -ffixed-t5 -ffixed-t6 -ffixed-t7 -ffixed-s0 -ffixed-s1 -ffixed-s2 -ffixed-s3 -ffixed-s4 -ffixed-s5 -ffixed-s6 -ffixed-s7
 
CFLAGS = -O2 -Wall -c -s -I..\tools -msoft-float
CFLAGS = -O2 -Wall -c -s -I$(TOOLS_DIR) -msoft-float -fno-builtin
#CFLAGS += $(CFLAGS_SW_MULT)
#CFLAGS += $(CFLAGS_FEW_REGS)
 
# Build just the Plasma RTOS for Plasma CPU
rtos:
$(AS_MIPS) -o boot.o ..\tools\boot.asm
$(AS_MIPS) -o boot.o $(TOOLS_DIR)boot.asm
$(GCC_MIPS) rtos.c
$(GCC_MIPS) libc.c
$(GCC_MIPS) uart.c
$(GCC_MIPS) rtos_test.c
$(GCC_MIPS) math.c
$(GCC_MIPS) math.c $(ALIASING)
$(LD_MIPS) -Ttext 0x10000000 -eentry -Map test.map -s -N -o test.axf \
boot.o rtos.o libc.o uart.o rtos_test.o math.o
..\tools\convert_bin
$(CONVERT_BIN)
@sort <test.map >test2.map
@$(DUMP_MIPS) --disassemble test.axf > test.lst
 
rtos_nomult:
$(AS_MIPS) -o boot.o ..\tools\boot.asm
$(AS_MIPS) -o boot.o $(TOOLS_DIR)boot.asm
$(AS_MIPS) -o mult_sim.o ..\tools\mult_sim.asm
$(GCC_MIPS) rtos.c
$(GCC_MIPS) libc.c
$(GCC_MIPS) uart.c
$(GCC_MIPS) rtos_test.c
$(GCC_MIPS) math.c
$(GCC_MIPS) math.c $(ALIASING)
$(LD_MIPS) -Ttext 0x10000000 -eentry -Map test.map -s -N -o test.axf \
boot.o rtos.o libc.o uart.o rtos_test.o math.o mult_sim.o
@sort <test.map >test2.map
62,16 → 84,16
@$(DUMP_MIPS) --disassemble test.axf > test.lst
..\tools\nomult test.axf test.lst test.map
@$(DUMP_MIPS) --disassemble test.axf > test2.lst
..\tools\convert_bin
$(CONVERT_BIN)
 
# Build the Plasma RTOS, Plasma TCP/IP stack, and web server for the Plasma CPU
rtos_tcpip:
$(AS_MIPS) -o boot.o ..\tools\boot.asm
$(AS_MIPS) -o boot.o $(TOOLS_DIR)boot.asm
$(GCC_MIPS) rtos.c
$(GCC_MIPS) libc.c
$(GCC_MIPS) uart.c
$(GCC_MIPS) rtos_test.c -DINCLUDE_HTML -DINCLUDE_CONSOLE
$(GCC_MIPS) math.c
$(GCC_MIPS) math.c $(ALIASING)
$(GCC_MIPS) tcpip.c
$(GCC_MIPS) http.c -DINCLUDE_FILESYS -DEXAMPLE_HTML
$(GCC_MIPS) netutil.c
79,17 → 101,17
$(LD_MIPS) -Ttext 0x10000000 -eentry -Map test.map -s -N -o test.axf \
boot.o rtos.o libc.o uart.o rtos_test.o math.o tcpip.o \
http.o netutil.o filesys.o
..\tools\convert_bin
$(CONVERT_BIN)
@sort <test.map >test2.map
@$(DUMP_MIPS) --disassemble test.axf > test.lst
 
rtos_tcpip_eth:
$(AS_MIPS) -o boot.o ..\tools\boot.asm
$(AS_MIPS) -o boot.o $(TOOLS_DIR)boot.asm
$(GCC_MIPS) rtos.c
$(GCC_MIPS) libc.c
$(GCC_MIPS) uart.c -DNO_PACKETS
$(GCC_MIPS) rtos_test.c -DINCLUDE_ETH -DINCLUDE_CONSOLE
$(GCC_MIPS) math.c
$(GCC_MIPS) math.c $(ALIASING)
$(GCC_MIPS) tcpip.c
$(GCC_MIPS) http.c -DINCLUDE_FILESYS -DEXAMPLE_HTML
$(GCC_MIPS) netutil.c
98,42 → 120,42
$(LD_MIPS) -Ttext 0x10000000 -eentry -Map test.map -s -N -o test.axf \
boot.o rtos.o libc.o uart.o rtos_test.o math.o tcpip.o \
http.o netutil.o filesys.o ethernet.o
..\tools\convert_bin
$(CONVERT_BIN)
@sort <test.map >test2.map
@$(DUMP_MIPS) --disassemble test.axf > test.lst
 
# Build full test application
rtosuart:
$(AS_MIPS) -o boot.o ..\tools\boot.asm
$(AS_MIPS) -o boot.o $(TOOLS_DIR)boot.asm
$(GCC_MIPS) rtos.c
$(GCC_MIPS) libc.c
$(GCC_MIPS) uart.c
$(GCC_MIPS) rtos_test.c -DINCLUDE_HTML -DINCLUDE_CONSOLE
$(GCC_MIPS) math.c
$(GCC_MIPS) math.c $(ALIASING)
$(GCC_MIPS) tcpip.c
$(GCC_MIPS) http.c -DINCLUDE_FILESYS
$(GCC_MIPS) netutil.c
$(GCC_MIPS) filesys.c
$(GCC_MIPS) -I. ..\app\html.c -DMainThread=HtmlThread
$(GCC_MIPS) -I. ..\app\image.c
$(GCC_MIPS) -I. ..\app\tictac.c
$(GCC_MIPS) -I. ..\app\tic3d.c
$(GCC_MIPS) -I. ..\app\connect4.c
$(GCC_MIPS) -I. $(APP_DIR)html.c -DMainThread=HtmlThread
$(GCC_MIPS) -I. $(APP_DIR)image.c
$(GCC_MIPS) -I. $(APP_DIR)tictac.c
$(GCC_MIPS) -I. $(APP_DIR)tic3d.c
$(GCC_MIPS) -I. $(APP_DIR)connect4.c
$(LD_MIPS) -Ttext 0x10000000 -eentry -Map test.map -s -N -o test.axf \
boot.o rtos.o libc.o uart.o rtos_test.o math.o tcpip.o \
http.o netutil.o filesys.o html.o image.o tictac.o tic3d.o connect4.o
..\tools\convert_bin
$(CONVERT_BIN)
@sort <test.map >test2.map
@$(DUMP_MIPS) --disassemble test.axf > test.lst
 
# Build full test application
rtosfull:
$(AS_MIPS) -o boot.o ..\tools\boot.asm
$(AS_MIPS) -o boot.o $(TOOLS_DIR)boot.asm
$(GCC_MIPS) rtos.c
$(GCC_MIPS) libc.c
$(GCC_MIPS) uart.c -DNO_PACKETS
$(GCC_MIPS) rtos_test.c -DINCLUDE_ETH -DINCLUDE_CONSOLE
$(GCC_MIPS) math.c
$(GCC_MIPS) math.c $(ALIASING)
$(GCC_MIPS) tcpip.c
$(GCC_MIPS) http.c -DINCLUDE_FILESYS
$(GCC_MIPS) netutil.c -DINCLUDE_FLASH -DDLL_SETUP
140,42 → 162,42
$(GCC_MIPS) filesys.c -DINCLUDE_FLASH
$(GCC_MIPS) ethernet.c
$(GCC_MIPS) flash.c
$(GCC_MIPS) -I. ..\app\html.c -DMainThread=HtmlThread
$(GCC_MIPS) -I. ..\app\image.c
$(GCC_MIPS) -I. ..\app\tictac.c
$(GCC_MIPS) -I. ..\app\tic3d.c
$(GCC_MIPS) -I. ..\app\connect4.c
$(GCC_MIPS) -I. $(APP_DIR)html.c -DMainThread=HtmlThread
$(GCC_MIPS) -I. $(APP_DIR)image.c
$(GCC_MIPS) -I. $(APP_DIR)tictac.c
$(GCC_MIPS) -I. $(APP_DIR)tic3d.c
$(GCC_MIPS) -I. $(APP_DIR)connect4.c
$(LD_MIPS) -Ttext 0x10000000 -eentry -Map test.map -s -N -o test.axf \
boot.o rtos.o libc.o uart.o rtos_test.o math.o tcpip.o \
http.o netutil.o filesys.o ethernet.o flash.o \
html.o image.o tictac.o tic3d.o connect4.o
..\tools\convert_bin
$(CONVERT_BIN)
@sort <test.map >test2.map
@$(DUMP_MIPS) --disassemble test.axf > test.lst
 
# Test the RTOS running on a PC
testrtos:
@$(CC_X86) /c rtos.c
@$(CC_X86) /c libc.c
@$(CC_X86) /c uart.c
@$(CC_X86) /c rtos_test.c
@$(CC_X86) /c math.c
@$(CC_X86) -o testrtos.exe rtos.obj libc.obj uart.obj rtos_test.obj math.obj
testrtos.exe
@$(CC_X86) $(CFLAGS_X86) rtos.c
@$(CC_X86) $(CFLAGS_X86) libc.c -fno-builtin
@$(CC_X86) $(CFLAGS_X86) uart.c
@$(CC_X86) $(CFLAGS_X86) rtos_test.c
@$(CC_X86) $(CFLAGS_X86) math.c $(ALIASING)
@$(CC_X86) $(LFLAGS_X86) -o testrtos.exe rtos.$(OBJ) libc.$(OBJ) uart.$(OBJ) rtos_test.$(OBJ) math.$(OBJ)
$(LINUX_PWD)testrtos.exe
 
# Test the TCP/IP protocol stack running on a PC
testip:
@$(CC_X86) /c tcpip.c
@$(CC_X86) /c http.c /DEXAMPLE_HTML
@$(CC_X86) /c netutil.c
@$(CC_X86) /c filesys.c
@$(CC_X86) /c libc.c /I..\tools
@$(CC_X86) /c /DSIMULATE_PLASMA ..\tools\etermip.c
@$(CC_X86) /c os_stubs.c
@$(CC_X86) -o testip.exe etermip.obj ..\tools\wpcap.lib \
@$(CC_X86) $(CFLAGS_X86) tcpip.c
@$(CC_X86) $(CFLAGS_X86) http.c /DEXAMPLE_HTML
@$(CC_X86) $(CFLAGS_X86) netutil.c
@$(CC_X86) $(CFLAGS_X86) filesys.c
@$(CC_X86) $(CFLAGS_X86) libc.c /I$(TOOLS_DIR) -fno-builtin
@$(CC_X86) $(CFLAGS_X86) /DSIMULATE_PLASMA $(TOOLS_DIR)etermip.c
@$(CC_X86) $(CFLAGS_X86) os_stubs.c
@$(CC_X86) -o testip.exe etermip.obj $(TOOLS_DIR)wpcap.lib \
tcpip.obj http.obj netutil.obj filesys.obj libc.c os_stubs.c
@echo Try http://plasmb/. Try telnet plasmb. Try ftp plasmb.
testip.exe
$(LINUX_PWD)testip.exe
 
clean:
-$(RM) *.o *.obj *.axf *.map *.lst *.hex *.txt *.bin *.exe
182,15 → 204,15
 
# Run a Plasma CPU opcode simulator (can execute rtos target)
run:
@..\tools\mlite test.bin
@$(TOOLS_DIR)mlite.exe test.bin
 
disassemble:
-@..\tools\mlite test.bin BD > test.txt
-@$(TOOLS_DIR)mlite.exe test.bin BD > test.txt
 
# Start the EtermIP terminal program to download the code to the Plasma CPU
# and permit an Ethernet packets to be transfered.
download:
@echo Reset board before downloading code
..\tools\etermip
$(TOOLS_DIR)etermip.exe
 
 
/trunk/tools/tracehex.c
22,7 → 22,8
int bytes,digits,value,isbinary,col,col_num,row,drop_cnt;
int col_index,line_index,back_count,drop_start=0;
int digits_length=0;
(void)argc,argv;
(void)argc;
(void)argv;
 
printf("tracehex\n");
 
/trunk/tools/bootldr.c
14,7 → 14,7
#define MemoryRead(A) (*(volatile unsigned long*)(A))
#define MemoryWrite(A,V) *(volatile unsigned long*)(A)=(V)
 
extern void putchar(int ch);
extern int putchar(int ch);
extern int puts(const char *string);
extern int getch(void);
extern int kbhit(void);
233,8 → 233,13
puts("\r\n");
break;
case 'F':
FlashErase(0);
FlashWrite((uint16*)RAM_EXTERNAL_BASE, 0, 1024*128);
puts("\nConfirm with 12345678> ");
value = getnum();
if(value == 0x12345678)
{
FlashErase(0);
FlashWrite((uint16*)RAM_EXTERNAL_BASE, 0, 1024*128);
}
break;
case 0x3c: //raw test.bin file
ptr1 = (unsigned char*)0x10000000;
/trunk/tools/pi.c
1,8 → 1,9
/*Calculate the value of PI. Takes a long time!*/
#ifndef WIN32
void putchar(char ch)
int putchar(char ch)
{
*(int*)0x20000000 = ch;
return 0;
}
 
void OS_InterruptServiceRoutine(unsigned int status)
/trunk/tools/mlite.c
18,6 → 18,7
#include <assert.h>
 
//#define ENABLE_CACHE
//#define SIMPLE_CACHE
 
#define MEM_SIZE (1024*1024*2)
#define ntohs(A) ( ((A)>>8) | (((A)&0xff)<<8) )
26,13 → 27,52
#define htonl(A) ntohl(A)
 
#ifndef WIN32
#define getch getchar
void Sleep(unsigned long value)
//Support for Linux
#define putch putchar
#include <termios.h>
#include <unistd.h>
void Sleep(unsigned int value)
{
volatile unsigned long count = value*1000000;
while(--count > 0) ;
usleep(value * 1000);
}
 
int kbhit(void)
{
struct termios oldt, newt;
struct timeval tv;
fd_set read_fd;
 
tcgetattr(STDIN_FILENO, &oldt);
newt = oldt;
newt.c_lflag &= ~(ICANON | ECHO);
tcsetattr(STDIN_FILENO, TCSANOW, &newt);
tv.tv_sec=0;
tv.tv_usec=0;
FD_ZERO(&read_fd);
FD_SET(0,&read_fd);
if(select(1, &read_fd, NULL, NULL, &tv) == -1)
return 0;
//tcsetattr(STDIN_FILENO, TCSANOW, &oldt);
if(FD_ISSET(0,&read_fd))
return 1;
return 0;
}
 
int getch(void)
{
struct termios oldt, newt;
int ch;
 
tcgetattr(STDIN_FILENO, &oldt);
newt = oldt;
newt.c_lflag &= ~(ICANON | ECHO);
tcsetattr(STDIN_FILENO, TCSANOW, &newt);
ch = getchar();
//tcsetattr(STDIN_FILENO, TCSANOW, &oldt);
return ch;
}
#else
//Support for Windows
#include <conio.h>
extern void __stdcall Sleep(unsigned long value);
#endif
56,25 → 96,25
#define MMU_MASK (1024*4-1)
typedef struct
{
unsigned long virtualAddress;
unsigned long physicalAddress;
unsigned int virtualAddress;
unsigned int physicalAddress;
} MmuEntry;
 
typedef struct {
long r[32];
long pc, pc_next, epc;
unsigned long hi;
unsigned long lo;
long status;
long userMode;
long processId;
long exceptionId;
long faultAddr;
long irqStatus;
long skip;
int r[32];
int pc, pc_next, epc;
unsigned int hi;
unsigned int lo;
int status;
int userMode;
int processId;
int exceptionId;
int faultAddr;
int irqStatus;
int skip;
unsigned char *mem;
long wakeup;
long big_endian;
int wakeup;
int big_endian;
MmuEntry mmuEntry[MMU_ENTRIES];
} State;
 
107,12 → 147,12
"?","?","?","?","?","?","?","?"
};
 
static unsigned long HWMemory[8];
static unsigned int HWMemory[8];
 
 
static long mem_read(State *s, long size, unsigned long address)
static int mem_read(State *s, int size, unsigned int address)
{
unsigned long value=0, ptr;
unsigned int value=0, ptr;
 
s->irqStatus |= IRQ_UART_WRITE_AVAILABLE;
switch(address)
137,10 → 177,10
return s->faultAddr;
}
 
ptr = (unsigned long)s->mem + (address % MEM_SIZE);
ptr = (unsigned int)s->mem + (address % MEM_SIZE);
 
if(0x10000000 <= address && address < 0x10000000 + 1024*1024)
ptr = (unsigned long)s->mem + address - 0x10000000;
ptr = (unsigned int)s->mem + address - 0x10000000;
else if(address < 1024*8)
ptr += 1024*1024;
 
148,9 → 188,9
{
case 4:
if(address & 3)
printf("Unaligned access PC=0x%x address=0x%x\n", s->pc, address);
printf("Unaligned access PC=0x%x address=0x%x\n", (int)s->pc, (int)address);
assert((address & 3) == 0);
value = *(long*)ptr;
value = *(int*)ptr;
if(s->big_endian)
value = ntohl(value);
break;
169,15 → 209,15
return(value);
}
 
static void mem_write(State *s, long size, long unsigned address, unsigned long value)
static void mem_write(State *s, int size, int unsigned address, unsigned int value)
{
static char_count=0;
unsigned long ptr;
unsigned int ptr;
 
switch(address)
{
case UART_WRITE:
putch(value);
fflush(stdout);
return;
case IRQ_MASK:
HWMemory[1] = value;
192,19 → 232,20
s->processId = value;
return;
}
 
if(MMU_TLB <= address && address <= MMU_TLB+MMU_ENTRIES * 8)
{
//printf("TLB 0x%x 0x%x\n", address - MMU_TLB, value);
ptr = (unsigned long)s->mmuEntry + address - MMU_TLB;
ptr = (unsigned int)s->mmuEntry + address - MMU_TLB;
*(int*)ptr = value;
s->irqStatus &= ~IRQ_MMU;
return;
}
 
ptr = (unsigned long)s->mem + (address % MEM_SIZE);
ptr = (unsigned int)s->mem + (address % MEM_SIZE);
 
if(0x10000000 <= address && address < 0x10000000 + 1024*1024)
ptr = (unsigned long)s->mem + address - 0x10000000;
ptr = (unsigned int)s->mem + address - 0x10000000;
else if(address < 1024*8)
ptr += 1024*1024;
 
214,7 → 255,7
assert((address & 3) == 0);
if(s->big_endian)
value = htonl(value);
*(long*)ptr = value;
*(int*)ptr = value;
break;
case 2:
assert((address & 1) == 0);
233,11 → 274,11
#ifdef ENABLE_CACHE
/************* Optional MMU and cache implementation *************/
/* TAG = VirtualAddress | ProcessId | WriteableBit */
unsigned long mmu_lookup(State *s, unsigned long processId,
unsigned long address, int write)
unsigned int mmu_lookup(State *s, unsigned int processId,
unsigned int address, int write)
{
int i;
unsigned long compare, tag;
unsigned int compare, tag;
 
if(processId == 0 || s->userMode == 0)
return address;
264,13 → 305,13
#define CACHE_SET_ASSOC (1 << CACHE_SET_ASSOC_LN2)
#define CACHE_SIZE_LN2 (13 - CACHE_SET_ASSOC_LN2) //8 KB
#define CACHE_SIZE (1 << CACHE_SIZE_LN2)
#define CACHE_LINE_SIZE_LN2 5 //32 bytes
#define CACHE_LINE_SIZE_LN2 2 //4 bytes
#define CACHE_LINE_SIZE (1 << CACHE_LINE_SIZE_LN2)
 
static long cacheData[CACHE_SET_ASSOC][CACHE_SIZE/sizeof(long)];
static long cacheAddr[CACHE_SET_ASSOC][CACHE_SIZE/CACHE_LINE_SIZE];
static long cacheSetNext;
static long cacheMiss, cacheWriteBack, cacheCount;
static int cacheData[CACHE_SET_ASSOC][CACHE_SIZE/sizeof(int)];
static int cacheAddr[CACHE_SET_ASSOC][CACHE_SIZE/CACHE_LINE_SIZE];
static int cacheSetNext;
static int cacheMiss, cacheWriteBack, cacheCount;
 
static void cache_init(void)
{
284,12 → 325,12
 
/* Write-back cache memory tagged by virtual address and processId */
/* TAG = virtualAddress | processId | dirtyBit */
static int cache_load(State *s, unsigned long address, int write)
static int cache_load(State *s, unsigned int address, int write)
{
int set, i, pid, miss, offsetAddr, offsetData, offsetMem;
unsigned long addrTagMatch, addrPrevMatch=0;
unsigned long addrPrev;
unsigned long addressPhysical, tag;
unsigned int addrTagMatch, addrPrevMatch=0;
unsigned int addrPrev;
unsigned int addressPhysical, tag;
 
++cacheCount;
addrTagMatch = address & ~(CACHE_SIZE-1);
314,13 → 355,13
set = cacheSetNext;
cacheSetNext = (cacheSetNext + 1) & (CACHE_SET_ASSOC-1);
}
else if(write || (address >> 28) != 0x1)
{
tag = cacheAddr[set][offsetAddr];
pid = (tag & (CACHE_SIZE-1)) >> 1;
if(pid != s->processId)
miss = 1;
}
//else if(write || (address >> 28) != 0x1)
//{
// tag = cacheAddr[set][offsetAddr];
// pid = (tag & (CACHE_SIZE-1)) >> 1;
// if(pid != s->processId)
// miss = 1;
//}
 
if(miss)
{
356,12 → 397,12
return set;
}
 
static long cache_read(State *s, long size, unsigned long address)
static int cache_read(State *s, int size, unsigned int address)
{
int set, offset;
long value;
int value;
 
if((address >> 28) == 0x2) // && (s->processId == 0 || s->userMode == 0))
if((address & 0xfe000000) != 0x10000000)
return mem_read(s, size, address);
 
set = cache_load(s, address, 0);
383,12 → 424,12
return value;
}
 
static void cache_write(State *s, long size, long unsigned address, unsigned long value)
static void cache_write(State *s, int size, int unsigned address, unsigned int value)
{
int set, offset;
unsigned long mask;
unsigned int mask;
 
if((address >> 28) == 0x2) // && (s->processId == 0 || s->userMode == 0))
if((address >> 28) != 0x1) // && (s->processId == 0 || s->userMode == 0))
{
mem_write(s, size, address, value);
return;
422,20 → 463,94
 
#define mem_read cache_read
#define mem_write cache_write
/************* End optional cache implementation *************/
 
#else
static void cache_init(void) {}
#endif
 
void mult_big(unsigned long a,
unsigned long b,
unsigned long *hi,
unsigned long *lo)
#ifdef SIMPLE_CACHE
 
//Write through direct mapped 8KB cache
#define CACHE_MISS 0x1ff
static int cacheData[2048];
static int cacheAddr[2048]; //9-bit addresses
static int cacheTry, cacheMiss, cacheInit;
 
static int cache_read(State *s, int size, unsigned int address)
{
unsigned long ahi, alo, bhi, blo;
unsigned long c0, c1, c2;
unsigned long c1_a, c1_b;
int offset;
unsigned int value, value2, address2=address;
 
if(cacheInit == 0)
{
cacheInit = 1;
for(offset = 0; offset < 2048; ++offset)
cacheAddr[offset] = CACHE_MISS;
}
 
if(address & 0xefc00000)
return mem_read(s, size, address);
 
++cacheTry;
offset = (address >> 2) & 0x7ff;
if(cacheAddr[offset] != (address >> 13) || cacheAddr[offset] == CACHE_MISS)
{
++cacheMiss;
cacheAddr[offset] = address >> 13;
cacheData[offset] = mem_read(s, 4, address & ~3);
}
value = cacheData[offset];
if(s->big_endian)
address ^= 3;
switch(size)
{
case 2:
value = (value >> ((address & 2) << 3)) & 0xffff;
break;
case 1:
value = (value >> ((address & 3) << 3)) & 0xff;
break;
}
value2 = mem_read(s, size, address2);
if(value != value2)
printf("miss match\n");
//if((cacheTry & 0xffff) == 0) printf("cache(%d,%d) ", cacheMiss, cacheTry);
return value;
}
 
static void cache_write(State *s, int size, int unsigned address, unsigned int value)
{
int offset;
 
mem_write(s, size, address, value);
if(address & 0xefc00000)
return;
 
offset = (address >> 2) & 0x7ff;
if(size != 4)
{
cacheAddr[offset] = CACHE_MISS;
return;
}
cacheAddr[offset] = address >> 13;
cacheData[offset] = value;
}
 
#define mem_read cache_read
#define mem_write cache_write
#endif
/************* End optional cache implementation *************/
 
 
void mult_big(unsigned int a,
unsigned int b,
unsigned int *hi,
unsigned int *lo)
{
unsigned int ahi, alo, bhi, blo;
unsigned int c0, c1, c2;
unsigned int c1_a, c1_b;
 
ahi = a >> 16;
alo = a & 0xffff;
bhi = b >> 16;
454,14 → 569,14
*lo = c0;
}
 
void mult_big_signed(long a,
long b,
unsigned long *hi,
unsigned long *lo)
void mult_big_signed(int a,
int b,
unsigned int *hi,
unsigned int *lo)
{
unsigned long ahi, alo, bhi, blo;
unsigned long c0, c1, c2;
unsigned long c1_a, c1_b;
unsigned int ahi, alo, bhi, blo;
unsigned int c0, c1, c2;
unsigned int c1_a, c1_b;
 
ahi = a >> 16;
alo = a & 0xffff;
484,12 → 599,12
//execute one cycle of a Plasma CPU
void cycle(State *s, int show_mode)
{
unsigned long opcode;
unsigned long op, rs, rt, rd, re, func, imm, target;
long imm_shift, branch=0, lbranch=2, skip2=0;
long *r=s->r;
unsigned long *u=(unsigned long*)s->r;
unsigned long ptr, epc, rSave;
unsigned int opcode;
unsigned int op, rs, rt, rd, re, func, imm, target;
int imm_shift, branch=0, lbranch=2, skip2=0;
int *r=s->r;
unsigned int *u=(unsigned int*)s->r;
unsigned int ptr, epc, rSave;
 
opcode = mem_read(s, 4, s->pc);
op = (opcode >> 26) & 0x3f;
499,13 → 614,13
re = (opcode >> 6) & 0x1f;
func = opcode & 0x3f;
imm = opcode & 0xffff;
imm_shift = (((long)(short)imm) << 2) - 4;
imm_shift = (((int)(short)imm) << 2) - 4;
target = (opcode << 6) >> 4;
ptr = (short)imm + r[rs];
r[0] = 0;
if(show_mode)
{
printf("%8.8lx %8.8lx ", s->pc, opcode);
printf("%8.8x %8.8x ", s->pc, opcode);
if(op == 0)
printf("%8s ", special_string[func]);
else if(op == 1)
512,8 → 627,8
printf("%8s ", regimm_string[rt]);
else
printf("%8s ", opcode_string[op]);
printf("$%2.2ld $%2.2ld $%2.2ld $%2.2ld ", rs, rt, rd, re);
printf("%4.4lx", imm);
printf("$%2.2d $%2.2d $%2.2d $%2.2d ", rs, rt, rd, re);
printf("%4.4x", imm);
if(show_mode == 1)
printf(" r[%2.2d]=%8.8x r[%2.2d]=%8.8x", rs, r[rs], rt, r[rt]);
printf("\n");
599,7 → 714,7
case 0x08:/*ADDI*/ r[rt]=r[rs]+(short)imm; break;
case 0x09:/*ADDIU*/ u[rt]=u[rs]+(short)imm; break;
case 0x0a:/*SLTI*/ r[rt]=r[rs]<(short)imm; break;
case 0x0b:/*SLTIU*/ u[rt]=u[rs]<(unsigned long)(short)imm; break;
case 0x0b:/*SLTIU*/ u[rt]=u[rs]<(unsigned int)(short)imm; break;
case 0x0c:/*ANDI*/ r[rt]=r[rs]&imm; break;
case 0x0d:/*ORI*/ r[rt]=r[rs]|imm; break;
case 0x0e:/*XORI*/ r[rt]=r[rs]^imm; break;
643,8 → 758,8
case 0x25:/*LHU*/ r[rt]=(unsigned short)mem_read(s,2,ptr); break;
case 0x26:/*LWR*/
//target=32-8*(ptr&3);
//r[rt]=(r[rt]&~((unsigned long)0xffffffff>>target))|
//((unsigned long)mem_read(s,4,ptr&~3)>>target);
//r[rt]=(r[rt]&~((unsigned int)0xffffffff>>target))|
//((unsigned int)mem_read(s,4,ptr&~3)>>target);
break;
case 0x28:/*SB*/ mem_write(s,1,ptr,r[rt]); break;
case 0x29:/*SH*/ mem_write(s,2,ptr,r[rt]); break;
663,7 → 778,7
// case 0x35:/*LDC1*/ break;
// case 0x36:/*LDC2*/ break;
// case 0x37:/*LDC3*/ break;
// case 0x38:/*SC*/ *(long*)ptr=r[rt]; r[rt]=1; break;
// case 0x38:/*SC*/ *(int*)ptr=r[rt]; r[rt]=1; break;
case 0x38:/*SC*/ mem_write(s,4,ptr,r[rt]); r[rt]=1; break;
// case 0x39:/*SWC1*/ break;
// case 0x3a:/*SWC2*/ break;
693,14 → 808,14
 
void show_state(State *s)
{
long i,j;
int i,j;
printf("pid=%d userMode=%d, epc=0x%x\n", s->processId, s->userMode, s->epc);
for(i = 0; i < 4; ++i)
{
printf("%2.2ld ", i * 8);
printf("%2.2d ", i * 8);
for(j = 0; j < 8; ++j)
{
printf("%8.8lx ", s->r[i*8+j]);
printf("%8.8x ", s->r[i*8+j]);
}
printf("\n");
}
718,7 → 833,7
void do_debug(State *s)
{
int ch;
long i, j=0, watch=0, addr;
int i, j=0, watch=0, addr;
s->pc_next = s->pc + 4;
s->skip = 0;
s->wakeup = 0;
729,7 → 844,7
if(ch != 'n')
{
if(watch)
printf("0x%8.8lx=0x%8.8lx\n", watch, mem_read(s, 4, watch));
printf("0x%8.8x=0x%8.8x\n", watch, mem_read(s, 4, watch));
printf("1=Debug 2=Trace 3=Step 4=BreakPt 5=Go 6=Memory ");
printf("7=Watch 8=Jump 9=Quit> ");
}
746,7 → 861,7
cycle(s, 0); printf("*"); cycle(s, 10); break;
case '3': case 's':
printf("Count> ");
scanf("%ld", &j);
scanf("%d", &j);
for(i = 0; i < j; ++i)
cycle(s, 1);
show_state(s);
753,7 → 868,7
break;
case '4': case 'b':
printf("Line> ");
scanf("%lx", &j);
scanf("%x", &j);
printf("break point=0x%x\n", j);
break;
case '5': case 'g':
780,20 → 895,20
break;
case '6': case 'm':
printf("Memory> ");
scanf("%lx", &j);
scanf("%x", &j);
for(i = 0; i < 8; ++i)
{
printf("%8.8lx ", mem_read(s, 4, j+i*4));
printf("%8.8x ", mem_read(s, 4, j+i*4));
}
printf("\n");
break;
case '7': case 'w':
printf("Watch> ");
scanf("%lx", &watch);
scanf("%x", &watch);
break;
case '8': case 'j':
printf("Jump> ");
scanf("%lx", &addr);
scanf("%x", &addr);
s->pc = addr;
s->pc_next = addr + 4;
show_state(s);
809,7 → 924,7
{
State state, *s=&state;
FILE *in;
long bytes, index;
int bytes, index;
printf("Plasma emulator\n");
memset(s, 0, sizeof(State));
s->big_endian = 1;
835,7 → 950,7
bytes = fread(s->mem, 1, MEM_SIZE, in);
fclose(in);
memcpy(s->mem + 1024*1024, s->mem, 1024*8); //internal 8KB SRAM
printf("Read %ld bytes.\n", bytes);
printf("Read %d bytes.\n", bytes);
cache_init();
if(argc == 3 && argv[2][0] == 'B')
{
853,7 → 968,7
printf("Big Endian\n");
for(index = 0; index < bytes+3; index += 4)
{
*(unsigned long*)&s->mem[index] = htonl(*(unsigned long*)&s->mem[index]);
*(unsigned int*)&s->mem[index] = htonl(*(unsigned int*)&s->mem[index]);
}
in = fopen("big.exe", "wb");
fwrite(s->mem, bytes, 1, in);
/trunk/tools/no_os.c
3,11 → 3,12
#define MemoryRead(A) (*(volatile unsigned int*)(A))
#define MemoryWrite(A,V) *(volatile unsigned int*)(A)=(V)
 
void putchar(int value)
int putchar(int value)
{
while((MemoryRead(IRQ_STATUS) & IRQ_UART_WRITE_AVAILABLE) == 0)
;
MemoryWrite(UART_WRITE, value);
return 0;
}
 
int puts(const char *string)
/trunk/tools/bintohex.c
1,6 → 1,7
/*bintohex by Steve Rhoads 5/29/02*/
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
 
#define BUF_SIZE (1024*1024)
 
42,7 → 43,7
for(j = 0; i + j * 4 * 16 < mem_size; ++j)
{
k = j * 16;
fprintf(file, ":10%4.4x00", k);
fprintf(file, ":10%4.4x00", (int)k);
sum = 0x10 + (k >> 8) + (k & 0xff);
for(k = 0; k < 16; ++k)
{
52,7 → 53,7
sum &= 0xff;
sum = 0x100 - sum;
sum &= 0xff;
fprintf(file, "%2.2x\n", sum);
fprintf(file, "%2.2x\n", (int)sum);
}
fprintf(file, ":00000001ff\n");
fclose(file);
/trunk/tools/ram_image.c
15,7 → 15,7
FILE *file;
int i, j, index, size, count;
char *buf, *ptr, *ptr_list[64*4], text[80];
unsigned long *code;
unsigned int *code;
 
if(argc < 4)
{
25,7 → 25,7
}
 
buf = (char*)malloc(BUF_SIZE);
code = (unsigned long*)malloc(BUF_SIZE);
code = (unsigned int*)malloc(BUF_SIZE);
 
//Read ram_xilinx.vhd
file = fopen(argv[1], "rb");
/trunk/tools/count.c
1,5 → 1,5
/*count.c*/
void putchar(int value);
int putchar(int value);
int puts(const char *string);
 
char *name[] = {
/trunk/tools/makefile
1,38 → 1,52
# The MIPS gcc compiler must use the cygwin1.dll that came with the compiler.
# The CC_X86 is for compiling tools on your PC.
# The GCC_MIPS is for compiling code on the target.
# Convert_bin changes test.axf into code.txt which is used by the VHDL.
# Convert_bin == "objcopy -I elf32-big -O binary test.axf test.bin"
 
# Customize for Linux (for Linux GCC compiler see http://buildd.emdebian.org/)
# The site http://www.mips.com/ also has a MIPS cross compiler.
#CC_X86 = gcc -Wall -O -g
#CP = cp
#RM = rm -rf
#BIN_MIPS = ../../mips/sde/bin
#VHDL_DIR = ../vhdl
#GCC_MIPS = $(BIN_MIPS)/gcc $(CFLAGS)
#AS_MIPS = $(BIN_MIPS)/as
#LD_MIPS = $(BIN_MIPS)/ld
#DUMP_MIPS = $(BIN_MIPS)/objdump
 
ifeq ($(LANG),)
 
# Customize for Windows
# The MIPS gcc compiler must use the cygwin1.dll that came with the compiler.
CC_X86 = cl /O1 /nologo
CP = copy
RM = del
DWIN32 = -DWIN32
BIN_MIPS = ..\gccmips_elf
VHDL_DIR = ..\vhdl
LINUX_PWD =
GCC_MIPS = $(BIN_MIPS)\gcc $(CFLAGS)
AS_MIPS = $(BIN_MIPS)\as
LD_MIPS = $(BIN_MIPS)\ld
DUMP_MIPS = $(BIN_MIPS)\objdump
CONVERT_BIN = $(LINUX_PWD)convert_bin.exe
 
else
 
# Customized for Linux
# See http://www.opencores.com/projects.cgi/web/mips/linux_tools.htm
CC_X86 = gcc -Wall -O -g
CP = cp
RM = rm -rf
DWIN32 =
BIN_MIPS =
VHDL_DIR = ../vhdl
LINUX_PWD = ./
GCC_MIPS = $(BIN_MIPS)mips-elf-gcc $(CFLAGS)
AS_MIPS = $(BIN_MIPS)mips-elf-as
LD_MIPS = $(BIN_MIPS)mips-elf-ld
DUMP_MIPS = $(BIN_MIPS)mips-elf-objdump
CONVERT_BIN = $(LINUX_PWD)convert_bin.exe
#CONVERT_BIN = $(BIN_MIPS)mips-elf-objcopy -I elf32-big -O binary test.axf test.bin
 
endif
 
CFLAGS = -O2 -Wall -c -s
 
all: convert_bin.exe tracehex.exe bintohex.exe ram_image.exe
@echo make targets = count, opcodes, pi, test, run, tohex,\
@echo make targets = count, opcodes, pi, test, run, tohex, \
bootldr, toimage, etermip
 
clean:
-$(RM) *.o *.obj *.map *.lst *.hex *.txt *.exe *.axf
 
44,7 → 58,7
@$(CC_X86) -DLITTLE_ENDIAN -o convert_le.exe convert.c
 
mlite.exe: mlite.c
@$(CC_X86) -o mlite.exe mlite.c -DWIN32
@$(CC_X86) -o mlite.exe mlite.c $(DWIN32)
 
tracehex.exe: tracehex.c
@$(CC_X86) -o tracehex.exe tracehex.c
61,6 → 75,9
-@$(CC_X86) -o etermip.exe etermip.c wpcap.lib
@echo Get wpcap.lib from http://www.winpcap.org/
 
nomult.exe: nomult.c
-@$(CC_X86) -o nomult.exe nomult.c
 
download: etermip
@echo Reset board before downloading code
etermip
69,7 → 86,7
$(AS_MIPS) -o opcodes.o opcodes.asm
$(LD_MIPS) -Ttext 0 -eentry -Map test.map -s -N -o test.axf opcodes.o
-@$(DUMP_MIPS) --disassemble test.axf > test.lst
convert_bin.exe
$(CONVERT_BIN)
$(CP) code.txt $(VHDL_DIR)
 
opcodes2:
76,7 → 93,7
$(AS_MIPS) -o opcodes.o opcodes.asm
$(LD_MIPS) -Ttext 0x10000000 -eentry -Map test.map -s -N -o test.axf opcodes.o
-@$(DUMP_MIPS) --disassemble test.axf > test.lst
convert_bin.exe
$(CONVERT_BIN)
$(CP) code.txt $(VHDL_DIR)
 
test:
86,7 → 103,7
$(LD_MIPS) -Ttext 0 -eentry -Map test.map -s -N -o test.axf \
boot.o test.o no_os.o
-@$(DUMP_MIPS) --disassemble test.axf > test.lst
convert_bin.exe
$(CONVERT_BIN)
$(CP) code.txt $(VHDL_DIR)
 
count:
96,9 → 113,19
$(LD_MIPS) -Ttext 0 -eentry -Map test.map -s -N -o test.axf \
boot.o count.o no_os.o
-$(DUMP_MIPS) --disassemble test.axf > test.lst
convert_bin.exe
$(CONVERT_BIN)
$(CP) code.txt $(VHDL_DIR)
 
count_le:
$(AS_MIPS) -EL -o boot.o boot.asm
$(GCC_MIPS) -EL count.c
$(GCC_MIPS) -EL no_os.c
$(LD_MIPS) -EL -Ttext 0 -eentry -Map test.map -s -N -o test.axf \
boot.o count.o no_os.o
-$(DUMP_MIPS) --disassemble test.axf > test.lst
$(CONVERT_BIN)
$(CP) code.txt $(VHDL_DIR)
 
count2:
$(AS_MIPS) -o boot.o boot.asm
$(GCC_MIPS) count.c
106,7 → 133,7
$(LD_MIPS) -Ttext 0x10000000 -eentry -Map test.map -s -N -o test.axf \
boot.o count.o no_os.o
-$(DUMP_MIPS) --disassemble test.axf > test.lst
convert_bin.exe
$(CONVERT_BIN)
$(CP) code.txt $(VHDL_DIR)
 
count3:
116,9 → 143,23
$(LD_MIPS) -Ttext 0x1000 -eentry -Map test.map -s -N -o test.axf \
boot.o count.o no_os.o
-$(DUMP_MIPS) --disassemble test.axf > test.lst
convert_bin.exe
$(CONVERT_BIN)
$(CP) code.txt $(VHDL_DIR)
 
count5: nomult.exe
$(AS_MIPS) -o boot.o boot.asm
$(AS_MIPS) -o mult_sim.o mult_sim.asm
$(GCC_MIPS) count.c
$(GCC_MIPS) no_os.c
$(LD_MIPS) -Ttext 0x10000000 -eentry -Map test.map -s -N -o test.axf \
boot.o mult_sim.o count.o no_os.o
-$(DUMP_MIPS) --disassemble test.axf > test.lst
$(CP) test.axf test_old.axf
nomult test.axf test.lst test.map
-$(DUMP_MIPS) --disassemble test.axf > test2.lst
$(CONVERT_BIN)
$(CP) code.txt $(VHDL_DIR)
 
pi:
$(AS_MIPS) -o boot.o boot.asm
$(GCC_MIPS) pi.c
125,7 → 166,7
$(LD_MIPS) -Ttext 0 -eentry -Map test.map -s -N -o test.axf \
boot.o pi.o
@$(DUMP_MIPS) --disassemble test.axf > test.lst
convert_bin.exe
$(CONVERT_BIN)
$(CP) code.txt $(VHDL_DIR)
 
pi2:
134,9 → 175,21
$(LD_MIPS) -Ttext 0x10000000 -eentry -Map test.map -s -N -o test.axf \
boot.o pi.o
@$(DUMP_MIPS) --disassemble test.axf > test.lst
convert_bin.exe
$(CONVERT_BIN)
$(CP) code.txt $(VHDL_DIR)
 
pi5: nomult.exe
$(AS_MIPS) -o boot.o boot.asm
$(AS_MIPS) -o mult_sim.o mult_sim.asm
$(GCC_MIPS) pi.c
$(LD_MIPS) -Ttext 0x0 -eentry -Map test.map -s -N -o test.axf \
boot.o mult_sim.o pi.o
@$(DUMP_MIPS) --disassemble test.axf > test.lst
nomult test.axf test.lst test.map
@$(DUMP_MIPS) --disassemble test.axf > test2.lst
$(CONVERT_BIN)
$(CP) code.txt $(VHDL_DIR)
 
ddr_test:
$(AS_MIPS) -o boot.o boot.asm
$(GCC_MIPS) ddr_init.c -DDDR_TEST_MAIN
144,7 → 197,7
$(LD_MIPS) -Ttext 0x0 -eentry -Map test.map -s -N -o test.axf \
boot.o ddr_init.o no_os.o
@$(DUMP_MIPS) --disassemble test.axf > test.lst
convert_bin.exe
$(CONVERT_BIN)
$(CP) code.txt $(VHDL_DIR)
 
memtest:
151,7 → 204,7
$(AS_MIPS) -o boot.o boot.asm
$(GCC_MIPS) memtest.c
$(LD_MIPS) -Ttext 0x1000 -eentry -o test.axf boot.o memtest.o
convert_bin.exe
$(CONVERT_BIN)
memtest2:
$(AS_MIPS) -o boot.o boot.asm
158,13 → 211,13
$(GCC_MIPS) -DINIT_DDR memtest.c
$(GCC_MIPS) ddr_init.c
$(LD_MIPS) -Ttext 0x0 -eentry -o test.axf boot.o memtest.o ddr_init.o
convert_bin.exe
$(CONVERT_BIN)
 
memtest3:
$(AS_MIPS) -o boot.o boot.asm
$(GCC_MIPS) memtest.c
$(LD_MIPS) -Ttext 0x10000000 -eentry -o test.axf boot.o memtest.o
convert_bin.exe
$(CONVERT_BIN)
 
bootldr:
$(AS_MIPS) -o boot.o boot.asm
174,7 → 227,7
$(LD_MIPS) -Ttext 0 -eentry -Map test.map -s -N -o test.axf \
boot.o bootldr.o no_os.o ddr_init.o
@$(DUMP_MIPS) --disassemble test.axf > test.lst
convert_bin.exe
$(CONVERT_BIN)
$(CP) code.txt $(VHDL_DIR)
@echo Next do "make toimage" or "make tohex".
 
186,7 → 239,7
$(LD_MIPS) -Ttext 0x1000 -eentry -Map test.map -s -N -o test.axf \
boot.o bootldr.o no_os.o ddr_init.o
@$(DUMP_MIPS) --disassemble test.axf > test.lst
convert_bin.exe
$(CONVERT_BIN)
$(CP) code.txt $(VHDL_DIR)
 
bootldr_little_endian: convert_le.exe
197,26 → 250,26
$(LD_MIPS) -EL -Ttext 0 -eentry -Map test.map -s -N -o test.axf \
boot.o bootldr.o no_os.o ddr_init.o
@$(DUMP_MIPS) --disassemble test.axf > test.lst
convert_le.exe
$(LINUX_PWD)convert_le.exe
$(CP) code.txt $(VHDL_DIR)
 
# Run a MIPS opcode simulator
run: mlite.exe
@mlite.exe test.bin
@$(LINUX_PWD)mlite.exe test.bin
 
run_little_endian: mlite.exe
@mlite.exe test.bin L
@$(LINUX_PWD)mlite.exe test.bin L
 
disassemble: mlite.exe
mlite.exe test.bin BD > test.txt
$(LINUX_PWD)mlite.exe test.bin BD > test.txt
 
# Used by Altera FPGAs for ram image
tohex: bintohex.exe
bintohex.exe test.bin
$(LINUX_PWD)bintohex.exe test.bin
$(CP) code*.hex $(VHDL_DIR)
 
# Used by Xilinx FPGAs for ram image
toimage:
ram_image.exe ../vhdl/ram_xilinx.vhd ../vhdl/code.txt ../vhdl/ram_image.vhd
$(LINUX_PWD)ram_image.exe ../vhdl/ram_xilinx.vhd ../vhdl/code.txt ../vhdl/ram_image.vhd
 
 
/trunk/tools/ddr_init.c
13,7 → 13,7
#define MemoryRead(A) (*(volatile int*)(A))
#define MemoryWrite(A,V) *(volatile int*)(A)=(V)
 
extern void putchar(int value);
extern int putchar(int value);
extern int puts(const char *string);
extern void print_hex(unsigned long num);
 

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