URL
https://opencores.org/ocsvn/or1k/or1k/trunk
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- This comparison shows the changes necessary to convert path
/
- from Rev 341 to Rev 342
- ↔ Reverse comparison
Rev 341 → Rev 342
/trunk/or1ksim/testbench/except.s
File deleted
trunk/or1ksim/testbench/except.s
Property changes :
Deleted: svn:executable
## -1 +0,0 ##
-*
\ No newline at end of property
Index: trunk/or1ksim/testbench/Makefile.in
===================================================================
--- trunk/or1ksim/testbench/Makefile.in (revision 341)
+++ trunk/or1ksim/testbench/Makefile.in (revision 342)
@@ -139,7 +139,7 @@
@OR1K_EXCEPT_FALSE@eth_SOURCES =
@OR1K_EXCEPT_TRUE@SUBDIRS = support $(SUB_TESTS) $(OR1K_SUB_TESTS)
@OR1K_EXCEPT_FALSE@SUBDIRS = support $(SUB_TESTS)
-@OR1K_EXCEPT_TRUE@OR1K_SUPPORT_S = except.s
+@OR1K_EXCEPT_TRUE@OR1K_SUPPORT_S = except.S
@OR1K_EXCEPT_FALSE@OR1K_SUPPORT_S =
LDADD = support/libsupport.a
/trunk/or1ksim/testbench/except.S
0,0 → 1,249
/* Support file for c based tests */ |
|
.section .except |
.extern _reset_support |
.extern _c_reset |
.extern _excpt_buserr |
.extern _excpt_dpfault |
.extern _excpt_ipfault |
.extern _excpt_lpint |
.extern _excpt_align |
.extern _excpt_illinsn |
.extern _excpt_hpint |
.extern _excpt_dtlbmiss |
.extern _excpt_itlbmiss |
.extern _excpt_range |
.extern _excpt_syscall |
.extern _excpt_break |
.extern _excpt_trap |
|
|
.org 0x100 |
_reset_vector: |
l.nop |
l.nop |
l.addi r1,r0,0x7f00 |
l.jal _reset |
l.nop |
|
.org 0x200 |
_buserr_vector: |
l.addi r1,r1,-116 |
l.sw 0x18(r1),r9 |
l.jal store_regs |
l.nop |
l.movhi r9,hi(end_except) |
l.ori r9,r0,lo(end_except) |
l.lwz r10,_excpt_buserr(r0) |
l.jr r10 |
l.nop |
|
.org 0x300 |
_dpfault_vector: |
l.addi r1,r1,-116 |
l.sw 0x18(r1),r9 |
l.jal store_regs |
l.nop |
l.movhi r9,hi(end_except) |
l.ori r9,r0,lo(end_except) |
l.lwz r10,lo(_excpt_dpfault)(r0) |
l.jr r10 |
l.nop |
|
.org 0x400 |
_ipfault_vector: |
l.addi r1,r1,-116 |
l.sw 0x18(r1),r9 |
l.jal store_regs |
l.nop |
l.movhi r9,hi(end_except) |
l.ori r9,r0,lo(end_except) |
l.lwz r10,_excpt_ipfault(r0) |
l.jr r10 |
l.nop |
|
.org 0x500 |
_lpint_vector: |
l.addi r1,r1,-116 |
l.sw 0x18(r1),r9 |
l.jal store_regs |
l.nop |
l.movhi r9,hi(end_except) |
l.ori r9,r0,lo(end_except) |
l.lwz r10,_excpt_lpint(r0) |
l.jr r10 |
l.nop |
|
.org 0x600 |
_align_vector: |
l.addi r1,r1,-116 |
l.sw 0x18(r1),r9 |
l.jal store_regs |
l.nop |
l.movhi r9,hi(end_except) |
l.ori r9,r0,lo(end_except) |
l.lwz r10,_excpt_align(r0) |
l.jr r10 |
l.nop |
|
.org 0x700 |
_illinsn_vector: |
l.addi r1,r1,-116 |
l.sw 0x18(r1),r9 |
l.jal store_regs |
l.nop |
l.movhi r9,hi(end_except) |
l.ori r9,r0,lo(end_except) |
l.lwz r10,_excpt_illinsn(r0) |
l.jr r10 |
l.nop |
|
.org 0x800 |
_hpint_vector: |
l.addi r1,r1,-116 |
l.sw 0x18(r1),r9 |
l.jal store_regs |
l.nop |
l.movhi r9,hi(end_except) |
l.ori r9,r0,lo(end_except) |
l.lwz r10,_excpt_hpint(r0) |
l.jr r10 |
l.nop |
|
.org 0x900 |
_dtlbmiss_vector: |
l.addi r1,r1,-116 |
l.sw 0x18(r1),r9 |
l.jal store_regs |
l.nop |
l.movhi r9,hi(end_except) |
l.ori r9,r0,lo(end_except) |
l.lwz r10,_excpt_dtlbmiss(r0) |
l.jr r10 |
l.nop |
|
.org 0xa00 |
_itlbmiss_vector: |
l.addi r1,r1,-116 |
l.sw 0x18(r1),r9 |
l.jal store_regs |
l.nop |
l.movhi r9,hi(end_except) |
l.ori r9,r0,lo(end_except) |
l.lwz r10,_excpt_itlbmiss(r0) |
l.jr r10 |
l.nop |
|
.org 0xb00 |
_range_vector: |
l.addi r1,r1,-116 |
l.sw 0x18(r1),r9 |
l.jal store_regs |
l.nop |
l.movhi r9,hi(end_except) |
l.ori r9,r0,lo(end_except) |
l.lwz r10,_excpt_range(r0) |
l.jr r10 |
l.nop |
|
.org 0xc00 |
_syscall_vector: |
l.addi r1,r1,-116 |
l.sw 0x18(r1),r9 |
l.jal store_regs |
l.nop |
l.movhi r9,hi(end_except) |
l.ori r9,r0,lo(end_except) |
l.lwz r10,_excpt_syscall(r0) |
l.jr r10 |
l.nop |
|
.org 0xd00 |
_break_vector: |
l.addi r1,r1,-116 |
l.sw 0x18(r1),r9 |
l.jal store_regs |
l.nop |
l.movhi r9,hi(end_except) |
l.ori r9,r0,lo(end_except) |
l.lwz r10,_excpt_break(r0) |
l.jr r10 |
l.nop |
|
.org 0xe00 |
_trap_vector: |
l.addi r1,r1,-116 |
l.sw 0x18(r1),r9 |
l.jal store_regs |
l.nop |
l.movhi r9,hi(end_except) |
l.ori r9,r0,lo(end_except) |
l.lwz r10,_excpt_trap(r0) |
l.jr r10 |
l.nop |
|
store_regs: |
l.sw 0x00(r1),r3 |
l.sw 0x04(r1),r4 |
l.sw 0x08(r1),r5 |
l.sw 0x0c(r1),r6 |
l.sw 0x10(r1),r7 |
l.sw 0x14(r1),r8 |
l.sw 0x1c(r1),r10 |
l.sw 0x20(r1),r11 |
l.sw 0x24(r1),r12 |
l.sw 0x28(r1),r13 |
l.sw 0x2c(r1),r14 |
l.sw 0x30(r1),r15 |
l.sw 0x34(r1),r16 |
l.sw 0x38(r1),r17 |
l.sw 0x3c(r1),r18 |
l.sw 0x40(r1),r19 |
l.sw 0x44(r1),r20 |
l.sw 0x48(r1),r21 |
l.sw 0x4c(r1),r22 |
l.sw 0x50(r1),r23 |
l.sw 0x54(r1),r24 |
l.sw 0x58(r1),r25 |
l.sw 0x5c(r1),r26 |
l.sw 0x60(r1),r27 |
l.sw 0x64(r1),r28 |
l.sw 0x68(r1),r29 |
l.sw 0x6c(r1),r30 |
l.sw 0x70(r1),r31 |
l.jalr r9 |
l.nop |
|
end_except: |
l.lwz r3,0x00(r1) |
l.lwz r4,0x04(r1) |
l.lwz r5,0x08(r1) |
l.lwz r6,0x0c(r1) |
l.lwz r7,0x10(r1) |
l.lwz r8,0x14(r1) |
l.lwz r9,0x18(r1) |
l.lwz r10,0x1c(r1) |
l.lwz r11,0x20(r1) |
l.lwz r12,0x24(r1) |
l.lwz r13,0x28(r1) |
l.lwz r14,0x2c(r1) |
l.lwz r15,0x30(r1) |
l.lwz r16,0x34(r1) |
l.lwz r17,0x38(r1) |
l.lwz r18,0x3c(r1) |
l.lwz r19,0x40(r1) |
l.lwz r20,0x44(r1) |
l.lwz r21,0x48(r1) |
l.lwz r22,0x4c(r1) |
l.lwz r23,0x50(r1) |
l.lwz r24,0x54(r1) |
l.lwz r25,0x58(r1) |
l.lwz r26,0x5c(r1) |
l.lwz r27,0x60(r1) |
l.lwz r28,0x64(r1) |
l.lwz r29,0x68(r1) |
l.lwz r30,0x6c(r1) |
l.lwz r31,0x70(r1) |
l.addi r1,r1,116 |
l.rfe |
l.nop |
trunk/or1ksim/testbench/except.S
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/or1ksim/testbench/except.ld
===================================================================
--- trunk/or1ksim/testbench/except.ld (revision 341)
+++ trunk/or1ksim/testbench/except.ld (revision 342)
@@ -1,15 +1,15 @@
MEMORY
{
- reset : ORIGIN = 0x00000100, LENGTH = 0x00001f00
+ flash : ORIGIN = 0x00000100, LENGTH = 0x00001f00
ram : ORIGIN = 0x00002000, LENGTH = 0x00010000
}
SECTIONS
{
- .reset :
+ .except :
{
*(.reset)
- } > reset
+ } > flash
.text :
{
*(.text)
/trunk/or1ksim/testbench/Makefile.am
86,7 → 86,7
endif |
|
if OR1K_EXCEPT |
OR1K_SUPPORT_S = except.s |
OR1K_SUPPORT_S = except.S |
else |
OR1K_SUPPORT_S = |
endif |
/trunk/or1ksim/testbench/support/support.h
42,4 → 42,18
extern void start_timer(int); |
extern unsigned int read_timer(int); |
|
extern unsigned long excpt_buserr; |
extern unsigned long excpt_dpfault; |
extern unsigned long excpt_ipfault; |
extern unsigned long excpt_lpint; |
extern unsigned long excpt_align; |
extern unsigned long excpt_illinsn; |
extern unsigned long excpt_hpint; |
extern unsigned long excpt_dtlbmiss; |
extern unsigned long excpt_itlbmiss; |
extern unsigned long excpt_range; |
extern unsigned long excpt_syscall; |
extern unsigned long excpt_break; |
extern unsigned long excpt_trap; |
|
#endif |
/trunk/or1ksim/testbench/support/support.c
3,6 → 3,22
#include <sys/time.h> |
#include "support.h" |
|
void excpt_dummy(); |
|
unsigned long excpt_buserr = (unsigned long) excpt_dummy; |
unsigned long excpt_dpfault = (unsigned long) excpt_dummy; |
unsigned long excpt_ipfault = (unsigned long) excpt_dummy; |
unsigned long excpt_lpint = (unsigned long) excpt_dummy; |
unsigned long excpt_align = (unsigned long) excpt_dummy; |
unsigned long excpt_illinsn = (unsigned long) excpt_dummy; |
unsigned long excpt_hpint = (unsigned long) excpt_dummy; |
unsigned long excpt_dtlbmiss = (unsigned long) excpt_dummy; |
unsigned long excpt_itlbmiss = (unsigned long) excpt_dummy; |
unsigned long excpt_range = (unsigned long) excpt_dummy; |
unsigned long excpt_syscall = (unsigned long) excpt_dummy; |
unsigned long excpt_break = (unsigned long) excpt_dummy; |
unsigned long excpt_trap = (unsigned long) excpt_dummy; |
|
#if OR1K |
|
/* Start function, called by reset exception handler. */ |
111,3 → 127,5
*dst++ = *src++; |
return dst; |
} |
|
void excpt_dummy() {} |