OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /
    from Rev 358 to Rev 359
    Reverse comparison

Rev 358 → Rev 359

/trunk/or1200/rtl/verilog/wb_biu.v
44,6 → 44,9
// CVS Revision History
//
// $Log: not supported by cvs2svn $
// Revision 1.10 2001/11/18 11:32:00 lampret
// OR1200_REGISTERED_OUTPUTS can now be enabled.
//
// Revision 1.9 2001/10/21 17:57:16 lampret
// Removed params from generic_XX.v. Added translate_off/on in sprs.v and id.v. Removed spr_addr from dc.v and ic.v. Fixed CR+LF.
//
118,6 → 121,10
reg [3:0] wb_sel_o; // byte select outputs
reg [dw-1:0] wb_dat_o; // output data bus
`endif
`ifdef OR1200_REGISTERED_INPUTS
reg biu_rdy; // normal termination
reg [dw-1:0] biu_from_biu; // input data bus
`endif
 
//
// WISHBONE I/F <-> Internal RISC I/F conversion
130,7 → 137,7
always @(posedge wb_clk_i or posedge wb_rst_i)
if (wb_rst_i)
wb_adr_o <= #1 {aw{1'b0}};
else
else if ((biu_read | biu_write) & ~biu_rdy)
wb_adr_o <= #1 biu_addr;
`else
assign wb_adr_o = biu_addr;
139,7 → 146,15
//
// Input data bus
//
`ifdef OR1200_REGISTERED_INPUTS
always @(posedge wb_clk_i or posedge wb_rst_i)
if (wb_rst_i)
biu_from_biu <= #1 32'h0000_0000;
else if (wb_ack_i)
biu_from_biu <= #1 wb_dat_i;
`else
assign biu_from_biu = wb_dat_i;
`endif
 
//
// Output data bus
148,7 → 163,7
always @(posedge wb_clk_i or posedge wb_rst_i)
if (wb_rst_i)
wb_dat_o <= #1 {dw{1'b0}};
else
else if ((biu_read | biu_write) & ~biu_rdy)
wb_dat_o <= #1 biu_to_biu;
`else
assign wb_dat_o = biu_to_biu;
157,14 → 172,19
//
// Acknowledgment of the data to the RISC
//
// biu_rdy
//
`ifdef OR1200_REGISTERED_INPUTS
always @(posedge wb_clk_i or posedge wb_rst_i)
if (wb_rst_i)
biu_rdy <= #1 1'b0;
else
biu_rdy <= #1 wb_ack_i;
`else
assign biu_rdy = wb_ack_i;
`endif
 
//
// WB cyc_o
//
assign wb_cyc_o = wb_stb_o;
 
//
// WB stb_o
//
`ifdef OR1200_REGISTERED_OUTPUTS
172,7 → 192,7
if (wb_rst_i)
wb_stb_o <= #1 1'b0;
else
wb_stb_o <= #1 (biu_read | biu_write) & ~wb_ack_i;
wb_stb_o <= #1 (biu_read | biu_write) & ~biu_rdy;
`else
assign wb_stb_o = (biu_read | biu_write);
`endif

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.