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https://opencores.org/ocsvn/or1k_old/or1k_old/trunk
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- This comparison shows the changes necessary to convert path
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- from Rev 364 to Rev 365
- ↔ Reverse comparison
Rev 364 → Rev 365
/trunk/or1200/rtl/verilog/wb_biu.v
44,6 → 44,9
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.11 2001/11/20 21:28:10 lampret |
// Added optional sampling of inputs. |
// |
// Revision 1.10 2001/11/18 11:32:00 lampret |
// OR1200_REGISTERED_OUTPUTS can now be enabled. |
// |
137,7 → 140,7
always @(posedge wb_clk_i or posedge wb_rst_i) |
if (wb_rst_i) |
wb_adr_o <= #1 {aw{1'b0}}; |
else if ((biu_read | biu_write) & ~biu_rdy) |
else if ((biu_read | biu_write) & ~wb_ack_i) |
wb_adr_o <= #1 biu_addr; |
`else |
assign wb_adr_o = biu_addr; |
163,7 → 166,7
always @(posedge wb_clk_i or posedge wb_rst_i) |
if (wb_rst_i) |
wb_dat_o <= #1 {dw{1'b0}}; |
else if ((biu_read | biu_write) & ~biu_rdy) |
else if ((biu_read | biu_write) & ~wb_ack_i) |
wb_dat_o <= #1 biu_to_biu; |
`else |
assign wb_dat_o = biu_to_biu; |
185,6 → 188,11
`endif |
|
// |
// WB cyc_o |
// |
assign wb_cyc_o = wb_stb_o; |
|
// |
// WB stb_o |
// |
`ifdef OR1200_REGISTERED_OUTPUTS |
192,7 → 200,7
if (wb_rst_i) |
wb_stb_o <= #1 1'b0; |
else |
wb_stb_o <= #1 (biu_read | biu_write) & ~biu_rdy; |
wb_stb_o <= #1 (biu_read | biu_write) & ~wb_ack_i; |
`else |
assign wb_stb_o = (biu_read | biu_write); |
`endif |