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URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

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    from Rev 38 to Rev 39
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Rev 38 → Rev 39

/trunk/rtl/verilog/tap_top.v
45,6 → 45,9
// CVS Revision History
//
// $Log: not supported by cvs2svn $
// Revision 1.3 2002/03/12 14:30:05 mohor
// Few outputs for boundary scan chain added.
//
// Revision 1.2 2002/03/12 10:31:53 mohor
// tap_top and dbg_top modules are put into two separate modules. tap_top
// contains only tap state machine and related logic. dbg_top contains all
65,7 → 68,7
// Top module
module tap_top(
// JTAG pins
tms_pad_i, tck_pad_i, trst_pad_i, tdi_pad_i, tdo_pad_o, tdo_padoen_o,
tms_pad_i, tck_pad_i, trst_pad_i, tdi_pad_i, tdo_pad_o, tdo_padoe_o,
 
// TAP states
ShiftDR, Exit1DR, UpdateDR, UpdateDR_q, CaptureDR,
89,7 → 92,7
input trst_pad_i; // JTAG test reset pad
input tdi_pad_i; // JTAG test data input pad
output tdo_pad_o; // JTAG test data output pad
output tdo_padoen_o; // Output enable for JTAG test data output pad
output tdo_padoe_o; // Output enable for JTAG test data output pad
 
// TAP states
output ShiftDR;
572,7 → 575,7
end
 
// Tristate control for tdo_pad_o pin
assign tdo_padoen_o = ShiftIR | ShiftDR | Exit1IR | Exit1DR | UpdateDR;
assign tdo_padoe_o = ShiftIR | ShiftDR | Exit1IR | Exit1DR | UpdateDR;
 
/**********************************************************************************
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