URL
https://opencores.org/ocsvn/zet86/zet86/trunk
Subversion Repositories zet86
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 38 to Rev 39
- ↔ Reverse comparison
Rev 38 → Rev 39
/trunk/uart16550/verilog/uart_tfifo.v
File deleted
/trunk/uart16550/verilog/uart_wb.v
File deleted
/trunk/uart16550/verilog/timescale.v
File deleted
/trunk/uart16550/verilog/uart_transmitter.v
File deleted
/trunk/uart16550/verilog/uart_defines.v
File deleted
/trunk/uart16550/verilog/uart_sync_flops.v
File deleted
/trunk/uart16550/verilog/uart_regs.v
File deleted
/trunk/uart16550/verilog/uart_top.v
File deleted
/trunk/uart16550/verilog/raminfr.v
File deleted
/trunk/uart16550/verilog/uart_receiver.v
File deleted
/trunk/uart16550/verilog/uart_debug_if.v
File deleted
/trunk/uart16550/verilog/uart_rfifo.v
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/trunk/uart16550/altera/altpll0.v
File deleted
/trunk/uart16550/altera/uart_test.v
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\ No newline at end of file
/trunk/uart16550/altera/uart16550.qpf
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/trunk/uart16550/altera/simulation/modelsim/gate.do
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/trunk/uart16550/altera/uart_top.qsf
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/trunk/files.txt
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/trunk/rtl-model/defines.v
23,4 → 23,4
`define ADD_IP `IR_SIZE'bx__0__1__0__1__10_001_001__0__01__0__0_1111_xxxx_xxxx_1111_xx |
`define OP_NOP 8'h90 |
|
`define DEBUG 1 |
//`define DEBUG 1 |
/trunk/rtl-model/regfile.v
22,7 → 22,8
|
module regfile ( |
`ifdef DEBUG |
output [15:0] sp, |
output [15:0] r1, |
output [15:0] r2, |
`endif |
|
output [15:0] a, |
60,7 → 61,8
|
// Assignments |
`ifdef DEBUG |
assign sp = r[4]; |
assign r1 = r[1]; |
assign r2 = r[7]; |
`endif |
assign a = (a_byte & ~addr_a[3]) ? { {8{a8[7]}}, a8} : r[addr_a]; |
assign a8 = addr_a[2] ? r[addr_a[1:0]][15:8] : r[addr_a][7:0]; |
81,19 → 83,19
// Behaviour |
always @(posedge clk) |
if (rst) begin |
r[0] <= 16'd0; r[1] <= 16'd0; |
r[2] <= 16'd0; r[3] <= 16'd0; |
r[4] <= 16'd0; r[5] <= 16'd0; |
r[6] <= 16'd0; r[7] <= 16'd0; |
r[0] <= 16'd0; r[1] <= 16'd0; |
r[2] <= 16'd0; r[3] <= 16'd0; |
r[4] <= 16'd0; r[5] <= 16'd0; |
r[6] <= 16'd0; r[7] <= 16'd0; |
r[8] <= 16'd0; r[9] <= 16'hf000; |
r[10] <= 16'd0; r[11] <= 16'd0; |
r[12] <= 16'd0; r[13] <= 16'd0; |
r[10] <= 16'd0; r[11] <= 16'd0; |
r[12] <= 16'd0; r[13] <= 16'd0; |
r[14] <= 16'd0; r[15] <= 16'hfff0; |
flags <= 9'd0; |
end else |
begin |
if (wr) begin |
if (word_op | addr_d[3:2]==2'b10) |
if (word_op | addr_d[3:2]==2'b10) |
r[addr_d] <= word_op ? d[15:0] : {{8{d[7]}},d[7:0]}; |
else if (addr_d[3]~^addr_d[2]) r[addr_d][7:0] <= d[7:0]; |
else r[{2'b0,addr_d[1:0]}][15:8] <= d[7:0]; |
/trunk/rtl-model/exec.v
26,7 → 26,8
output [15:0] x, |
output [15:0] y, |
output [15:0] aluo, |
output [15:0] sp, |
output [15:0] r1, |
output [15:0] r2, |
`endif |
input [`IR_SIZE-1:0] ir, |
input [15:0] off, |
70,11 → 71,11
wire dive; |
|
// Module instances |
alu alu0( {c, a }, bus_b, aluout, t, func, alu_iflags, oflags, |
alu alu0( {c, a }, bus_b, aluout, t, func, alu_iflags, oflags, |
alu_word, s, off, clk, dive); |
regfile reg0 ( |
`ifdef DEBUG |
sp, |
r1, r2, |
`endif |
a, b, c, cs, ip, {aluout[31:16], omemalu}, s, flags, wr_reg, wrfl, |
wr_high, clk, rst, addr_a, addr_b, addr_c, addr_d, addr_s, iflags, |
112,7 → 113,7
assign zf = flags[3]; |
|
assign iflags = oflags; |
assign alu_iflags = { 4'b0, flags[8:3], 1'b0, flags[2], 1'b0, flags[1], |
assign alu_iflags = { 4'b0, flags[8:3], 1'b0, flags[2], 1'b0, flags[1], |
1'b1, flags[0] }; |
assign logic_flags = { flags[8], flags[4], flags[3], flags[1], flags[0] }; |
|
/trunk/rtl-model/cpu.v
31,7 → 31,8
output [15:0] y, |
output [15:0] imm, |
output [15:0] aluo, |
output [15:0] sp, |
output [15:0] r1, |
output [15:0] r2, |
`endif |
|
// Wishbone master interface |
102,7 → 103,8
.x (x), |
.y (y), |
.aluo (aluo), |
.sp (sp), |
.r1 (r1), |
.r2 (r2), |
`endif |
.ir (ir), |
.off (off), |
/trunk/rtl-model/fetch.v
1662,9 → 1662,9
dst <= 4'b0; |
end |
|
default: // nop |
default: // hlt |
begin |
seq_addr <= `NOP; |
seq_addr <= `HLT; |
need_modrm <= 1'b0; |
need_off <= 1'b0; |
need_imm <= 1'b0; |
/trunk/rtl-model/util/div_uu.v
34,10 → 34,10
|
// CVS Log |
// |
// $Id: div_uu.v,v 1.2 2008-10-20 00:48:28 zeus Exp $ |
// $Id: div_uu.v,v 1.3 2008-11-14 03:31:17 zeus Exp $ |
// |
// $Date: 2008-10-20 00:48:28 $ |
// $Revision: 1.2 $ |
// $Date: 2008-11-14 03:31:17 $ |
// $Revision: 1.3 $ |
// $Author: zeus $ |
// $Locker: $ |
// $State: Exp $ |
/trunk/rtl-model/util/div_su.v
35,10 → 35,10
|
// CVS Log |
// |
// $Id: div_su.v,v 1.2 2008-10-20 00:48:28 zeus Exp $ |
// $Id: div_su.v,v 1.3 2008-11-14 03:31:17 zeus Exp $ |
// |
// $Date: 2008-10-20 00:48:28 $ |
// $Revision: 1.2 $ |
// $Date: 2008-11-14 03:31:17 $ |
// $Revision: 1.3 $ |
// $Author: zeus $ |
// $Locker: $ |
// $State: Exp $ |
/trunk/impl/stratix2-nios2dk/util/lcd_display.v
File deleted
/trunk/impl/stratix2-nios2dk/zet/simulation/modelsim/gate.do
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\ No newline at end of file
/trunk/impl/stratix2-nios2dk/zet/simulation/modelsim/rtl.do
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\ No newline at end of file
/trunk/impl/stratix2-nios2dk/zet/simulation/modelsim/gate-final.do
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\ No newline at end of file
/trunk/impl/stratix2-nios2dk/zet/simulation/modelsim/cpu_gate.v
File deleted
\ No newline at end of file
/trunk/impl/stratix2-nios2dk/zet/zet.qpf
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/trunk/impl/stratix2-nios2dk/zet/exec.v
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\ No newline at end of file
/trunk/impl/stratix2-nios2dk/zet/zet.qsf
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\ No newline at end of file
/trunk/impl/stratix2-nios2dk/zet/cpu.v
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\ No newline at end of file
/trunk/impl/stratix2-nios2dk/zet/altpll0.v
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/trunk/impl/stratix2-nios2dk/zet/memory.v
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\ No newline at end of file
/trunk/impl/stratix2-nios2dk/zet/fetch.v
File deleted
/trunk/impl/stratix2-nios2dk/zet/defines.v
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\ No newline at end of file
/trunk/impl/stratix2-nios2dk/zet/regfile.v
File deleted
\ No newline at end of file
/trunk/impl/virtex4-ml403ep/lcd_display/lcd_display.v
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\ No newline at end of file
/trunk/impl/virtex4-ml403ep/lcd_display/ml403.ucf
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\ No newline at end of file
/trunk/impl/virtex4-ml403ep/tareas.txt
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/trunk/impl/virtex4-ml403ep/mult.xco
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/trunk/impl/virtex4-ml403ep/vdu_test/test_vdu.v
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/trunk/impl/virtex4-ml403ep/vdu_test/clock.xaw
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\ No newline at end of file
/trunk/impl/virtex4-ml403ep/vdu_test/ml403.ucf
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/trunk/impl/virtex4-ml403ep/kotku.v
File deleted
/trunk/impl/virtex4-ml403ep/memory/README
File deleted
/trunk/impl/virtex4-ml403ep/memory/mem_map_test.v
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/trunk/impl/virtex4-ml403ep/memory/ml403-with-tft.ucf
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\ No newline at end of file
/trunk/impl/virtex4-ml403ep/memory/clock.v
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/trunk/impl/virtex4-ml403ep/memory/mem_map.v
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/trunk/impl/virtex4-ml403ep/memory/mem_ctrl.v
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/trunk/impl/virtex4-ml403ep/memory/mem_map_step.v
File deleted
/trunk/impl/virtex4-ml403ep/memory/clocks.xaw
File deleted
\ No newline at end of file
/trunk/impl/virtex4-ml403ep/memory/ml403-with-but.ucf
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\ No newline at end of file
/trunk/impl/virtex4-ml403ep/test/test_mem.v
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/trunk/impl/virtex4-ml403ep/test/test_mem_ctrl.v
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/trunk/impl/virtex4-ml403ep/test/clock.v
File deleted
/trunk/impl/virtex4-ml403ep/test/ml403.ucf
File deleted
\ No newline at end of file
/trunk/impl/virtex4-ml403ep/test/uart.v
0,0 → 1,47
module uart_ctrl(wr, trx_req, trx_ack, trx, |
clr, clk); |
// Entrades |
input [6:0] wr; |
input trx_req; |
input clr, clk; |
|
// Sortides |
output reg trx_ack, trx; |
|
// Registres |
reg [7:0] et, etrx; |
reg [6:0] data_wr; |
|
// Algorisme de transmissi� |
always @(negedge clk) |
if (clr) |
begin |
et <= 8'd00; |
etrx <= 8'd00; |
trx <= 1'b1; |
trx_ack <= 1'b0; |
end |
else |
case (et) |
8'd00: if (trx_req) et <= 8'd05; |
8'd05: |
if (~trx_req) |
begin et <= 8'd00; etrx <= 8'd00; end |
else |
case (etrx) |
8'd00: begin data_wr <= wr; trx <= 1'b1; etrx <= 8'd05; end |
8'd05: begin trx <= 1'b0; etrx <= 8'd10; end // Start bit |
8'd10: begin trx <= data_wr[0]; etrx <= 8'd15; end |
8'd15: begin trx <= data_wr[1]; etrx <= 8'd20; end |
8'd20: begin trx <= data_wr[2]; etrx <= 8'd25; end |
8'd25: begin trx <= data_wr[3]; etrx <= 8'd30; end |
8'd30: begin trx <= data_wr[4]; etrx <= 8'd35; end |
8'd35: begin trx <= data_wr[5]; etrx <= 8'd40; end |
8'd40: begin trx <= data_wr[6]; etrx <= 8'd45; end |
8'd45: begin trx <= 1'b0; etrx <= 8'd50; end |
8'd50: begin trx_ack <= 1'b1; trx <= 1'b1; etrx <= 8'd00; et <= 8'd10; end |
endcase |
8'd10: if (~trx_req) begin trx_ack <= 1'b0; et <= 8'd00; end |
endcase |
|
endmodule |
/trunk/impl/virtex4-ml403ep/test/base.cpj
0,0 → 1,3923
#ChipScope Pro Analyzer Project File, Version 3.0 |
#Fri Nov 07 17:28:21 GMT+01:00 2008 |
device.2.configFileDir=/home/zeus/zet/impl/virtex4-ml403ep/ise-kotku |
device.2.configFilename=kotku_ml403.bit |
deviceChain.deviceName0=System_ACE_CF |
deviceChain.deviceName1=XCF32P |
deviceChain.deviceName2=XC4VFX12 |
deviceChain.deviceName3=XC9500XL |
deviceChain.iRLength0=8 |
deviceChain.iRLength1=16 |
deviceChain.iRLength2=10 |
deviceChain.iRLength3=8 |
deviceChain.name0=MyDevice0 |
deviceChain.name1=MyDevice1 |
deviceChain.name2=MyDevice2 |
deviceChain.name3=MyDevice3 |
deviceIds=0a001093f505909321e5809359608093 |
mdiAreaHeight=0.7047872340425532 |
mdiAreaHeightLast=0.8218085106382979 |
mdiCount=2 |
mdiDevice0=2 |
mdiDevice1=2 |
mdiType0=1 |
mdiType1=0 |
mdiUnit0=0 |
mdiUnit1=0 |
navigatorHeight=0.4295212765957447 |
navigatorHeightLast=0.16356382978723405 |
navigatorWidth=0.14155629139072848 |
navigatorWidthLast=0.271523178807947 |
unit.-1.-1.username= |
unit.1.-1.username= |
unit.2.-1.username= |
unit.2.0.0.HEIGHT0=0.83111954 |
unit.2.0.0.TriggerRow0=1 |
unit.2.0.0.TriggerRow1=1 |
unit.2.0.0.TriggerRow2=1 |
unit.2.0.0.WIDTH0=0.64630544 |
unit.2.0.0.X0=0.10640394 |
unit.2.0.0.Y0=0.032258064 |
unit.2.0.1.HEIGHT1=1.0 |
unit.2.0.1.WIDTH1=1.0 |
unit.2.0.1.X1=0.0 |
unit.2.0.1.Y1=0.0 |
unit.2.0.MFBitsA0=XXXXXXXXXXXXXXXXXXXX |
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unit.2.0.MFCompareA8=0 |
unit.2.0.MFCompareA9=0 |
unit.2.0.MFCompareB0=999 |
unit.2.0.MFCompareB1=999 |
unit.2.0.MFCompareB10=999 |
unit.2.0.MFCompareB11=999 |
unit.2.0.MFCompareB12=999 |
unit.2.0.MFCompareB13=999 |
unit.2.0.MFCompareB14=999 |
unit.2.0.MFCompareB15=999 |
unit.2.0.MFCompareB2=999 |
unit.2.0.MFCompareB3=999 |
unit.2.0.MFCompareB4=999 |
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unit.2.0.MFCompareB6=999 |
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unit.2.0.MFCount=16 |
unit.2.0.MFDisplay0=0 |
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unit.2.0.MFDisplay10=1 |
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unit.2.0.MFDisplay12=0 |
unit.2.0.MFDisplay13=0 |
unit.2.0.MFDisplay14=0 |
unit.2.0.MFDisplay15=1 |
unit.2.0.MFDisplay2=1 |
unit.2.0.MFDisplay3=0 |
unit.2.0.MFDisplay4=0 |
unit.2.0.MFDisplay5=0 |
unit.2.0.MFDisplay6=0 |
unit.2.0.MFDisplay7=0 |
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unit.2.0.TCCondition0_0=M2 |
unit.2.0.TCCondition0_1= |
unit.2.0.TCConditionType0=0 |
unit.2.0.TCCount=1 |
unit.2.0.TCEventCount0=1 |
unit.2.0.TCEventType0=3 |
unit.2.0.TCName0=TriggerCondition0 |
unit.2.0.TCOutputEnable0=0 |
unit.2.0.TCOutputHigh0=1 |
unit.2.0.TCOutputMode0=0 |
unit.2.0.browser_tree_state<Data\ Port>=1 |
unit.2.0.browser_tree_state<adr>=0 |
unit.2.0.browser_tree_state<cnt>=0 |
unit.2.0.browser_tree_state<dat_i>=0 |
unit.2.0.browser_tree_state<dat_o>=0 |
unit.2.0.browser_tree_state<ds>=0 |
unit.2.0.browser_tree_state<func>=0 |
unit.2.0.browser_tree_state<io_reg>=0 |
unit.2.0.browser_tree_state<next_state>=0 |
unit.2.0.browser_tree_state<pc>=0 |
unit.2.0.browser_tree_state<s_addr_>=0 |
unit.2.0.browser_tree_state<sp>=1 |
unit.2.0.browser_tree_state<state>=1 |
unit.2.0.browser_tree_state<x>=0 |
unit.2.0.browser_tree_state<y>=0 |
unit.2.0.coretype=ILA |
unit.2.0.eventCount0=1 |
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unit.2.0.eventCount13=1 |
unit.2.0.eventCount14=1 |
unit.2.0.eventCount15=1 |
unit.2.0.eventCount2=1 |
unit.2.0.eventCount3=1 |
unit.2.0.eventCount4=1 |
unit.2.0.eventCount5=1 |
unit.2.0.eventCount6=1 |
unit.2.0.eventCount7=1 |
unit.2.0.eventCount8=1 |
unit.2.0.eventCount9=1 |
unit.2.0.export.format=2 |
unit.2.0.export.signals=Waveform Signals/Buses |
unit.2.0.export.unitName=DEV\:2 MyDevice2 (XC4VFX12) UNIT\:0 MyILA0 (ILA) |
unit.2.0.port.-1.b.0.alias=adr |
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unit.2.0.port.-1.b.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.-1.b.0.orderindex=-1 |
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unit.2.0.port.-1.b.0.visible=1 |
unit.2.0.port.-1.b.1.alias=aluo |
unit.2.0.port.-1.b.1.channellist=154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 |
unit.2.0.port.-1.b.1.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.-1.b.1.name=DataPort |
unit.2.0.port.-1.b.1.orderindex=-1 |
unit.2.0.port.-1.b.1.radix=Hex |
unit.2.0.port.-1.b.1.signedOffset=0.0 |
unit.2.0.port.-1.b.1.signedPrecision=0 |
unit.2.0.port.-1.b.1.signedScaleFactor=1.0 |
unit.2.0.port.-1.b.1.tokencount=0 |
unit.2.0.port.-1.b.1.unsignedOffset=0.0 |
unit.2.0.port.-1.b.1.unsignedPrecision=0 |
unit.2.0.port.-1.b.1.unsignedScaleFactor=1.0 |
unit.2.0.port.-1.b.1.visible=1 |
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unit.2.0.port.0.s.13.visible=1 |
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unit.2.0.port.0.s.19.visible=1 |
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unit.2.0.port.0.s.3.visible=1 |
unit.2.0.port.0.s.4.alias= |
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unit.2.0.port.0.s.4.visible=1 |
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unit.2.0.port.0.s.5.visible=1 |
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unit.2.0.port.0.s.7.visible=1 |
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unit.2.0.port.0.s.8.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.0.s.8.visible=1 |
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unit.2.0.port.0.s.9.visible=1 |
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unit.2.0.port.1.b.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.b.0.signedScaleFactor=1.0 |
unit.2.0.port.1.b.0.unsignedOffset=0.0 |
unit.2.0.port.1.b.0.unsignedPrecision=0 |
unit.2.0.port.1.b.0.unsignedScaleFactor=1.0 |
unit.2.0.port.1.b.0.visible=1 |
unit.2.0.port.1.buscount=1 |
unit.2.0.port.1.channelcount=32 |
unit.2.0.port.1.s.0.alias= |
unit.2.0.port.1.s.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.s.0.visible=1 |
unit.2.0.port.1.s.1.alias= |
unit.2.0.port.1.s.1.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.1.s.1.name=TriggerPort1[1] |
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unit.2.0.port.1.s.1.visible=1 |
unit.2.0.port.1.s.10.alias= |
unit.2.0.port.1.s.10.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.s.10.visible=1 |
unit.2.0.port.1.s.11.alias= |
unit.2.0.port.1.s.11.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.s.11.visible=1 |
unit.2.0.port.1.s.12.alias= |
unit.2.0.port.1.s.12.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.1.s.12.name=TriggerPort1[12] |
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unit.2.0.port.1.s.12.visible=1 |
unit.2.0.port.1.s.13.alias= |
unit.2.0.port.1.s.13.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.s.13.visible=1 |
unit.2.0.port.1.s.14.alias= |
unit.2.0.port.1.s.14.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.s.14.visible=1 |
unit.2.0.port.1.s.15.alias= |
unit.2.0.port.1.s.15.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.s.15.visible=1 |
unit.2.0.port.1.s.16.alias= |
unit.2.0.port.1.s.16.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.s.16.visible=1 |
unit.2.0.port.1.s.17.alias= |
unit.2.0.port.1.s.17.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.s.17.visible=1 |
unit.2.0.port.1.s.18.alias= |
unit.2.0.port.1.s.18.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.s.18.visible=1 |
unit.2.0.port.1.s.19.alias= |
unit.2.0.port.1.s.19.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.s.19.visible=1 |
unit.2.0.port.1.s.2.alias= |
unit.2.0.port.1.s.2.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.s.2.visible=1 |
unit.2.0.port.1.s.20.alias= |
unit.2.0.port.1.s.20.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.s.20.visible=1 |
unit.2.0.port.1.s.21.alias= |
unit.2.0.port.1.s.21.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.s.21.visible=1 |
unit.2.0.port.1.s.22.alias= |
unit.2.0.port.1.s.22.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.s.22.visible=1 |
unit.2.0.port.1.s.23.alias= |
unit.2.0.port.1.s.23.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.s.23.visible=1 |
unit.2.0.port.1.s.24.alias= |
unit.2.0.port.1.s.24.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.s.24.visible=1 |
unit.2.0.port.1.s.25.alias= |
unit.2.0.port.1.s.25.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.s.25.visible=1 |
unit.2.0.port.1.s.26.alias= |
unit.2.0.port.1.s.26.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.s.26.visible=1 |
unit.2.0.port.1.s.27.alias= |
unit.2.0.port.1.s.27.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.1.s.27.orderindex=-1 |
unit.2.0.port.1.s.27.visible=1 |
unit.2.0.port.1.s.28.alias= |
unit.2.0.port.1.s.28.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.1.s.28.name=TriggerPort1[28] |
unit.2.0.port.1.s.28.orderindex=-1 |
unit.2.0.port.1.s.28.visible=1 |
unit.2.0.port.1.s.29.alias= |
unit.2.0.port.1.s.29.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.1.s.29.name=TriggerPort1[29] |
unit.2.0.port.1.s.29.orderindex=-1 |
unit.2.0.port.1.s.29.visible=1 |
unit.2.0.port.1.s.3.alias= |
unit.2.0.port.1.s.3.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.1.s.3.name=TriggerPort1[3] |
unit.2.0.port.1.s.3.orderindex=-1 |
unit.2.0.port.1.s.3.visible=1 |
unit.2.0.port.1.s.30.alias= |
unit.2.0.port.1.s.30.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.1.s.30.name=TriggerPort1[30] |
unit.2.0.port.1.s.30.orderindex=-1 |
unit.2.0.port.1.s.30.visible=1 |
unit.2.0.port.1.s.31.alias= |
unit.2.0.port.1.s.31.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.1.s.31.name=TriggerPort1[31] |
unit.2.0.port.1.s.31.orderindex=-1 |
unit.2.0.port.1.s.31.visible=1 |
unit.2.0.port.1.s.4.alias= |
unit.2.0.port.1.s.4.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.1.s.4.name=TriggerPort1[4] |
unit.2.0.port.1.s.4.orderindex=-1 |
unit.2.0.port.1.s.4.visible=1 |
unit.2.0.port.1.s.5.alias= |
unit.2.0.port.1.s.5.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.1.s.5.name=TriggerPort1[5] |
unit.2.0.port.1.s.5.orderindex=-1 |
unit.2.0.port.1.s.5.visible=1 |
unit.2.0.port.1.s.6.alias= |
unit.2.0.port.1.s.6.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.1.s.6.name=TriggerPort1[6] |
unit.2.0.port.1.s.6.orderindex=-1 |
unit.2.0.port.1.s.6.visible=1 |
unit.2.0.port.1.s.7.alias= |
unit.2.0.port.1.s.7.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.1.s.7.name=TriggerPort1[7] |
unit.2.0.port.1.s.7.orderindex=-1 |
unit.2.0.port.1.s.7.visible=1 |
unit.2.0.port.1.s.8.alias= |
unit.2.0.port.1.s.8.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.1.s.8.name=TriggerPort1[8] |
unit.2.0.port.1.s.8.orderindex=-1 |
unit.2.0.port.1.s.8.visible=1 |
unit.2.0.port.1.s.9.alias= |
unit.2.0.port.1.s.9.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.1.s.9.name=TriggerPort1[9] |
unit.2.0.port.1.s.9.orderindex=-1 |
unit.2.0.port.1.s.9.visible=1 |
unit.2.0.port.10.b.0.alias= |
unit.2.0.port.10.b.0.channellist=0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 |
unit.2.0.port.10.b.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.b.0.name=TriggerPort10 |
unit.2.0.port.10.b.0.orderindex=-1 |
unit.2.0.port.10.b.0.radix=Hex |
unit.2.0.port.10.b.0.signedOffset=0.0 |
unit.2.0.port.10.b.0.signedPrecision=0 |
unit.2.0.port.10.b.0.signedScaleFactor=1.0 |
unit.2.0.port.10.b.0.unsignedOffset=0.0 |
unit.2.0.port.10.b.0.unsignedPrecision=0 |
unit.2.0.port.10.b.0.unsignedScaleFactor=1.0 |
unit.2.0.port.10.b.0.visible=1 |
unit.2.0.port.10.buscount=1 |
unit.2.0.port.10.channelcount=21 |
unit.2.0.port.10.s.0.alias= |
unit.2.0.port.10.s.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.0.name=TriggerPort10[0] |
unit.2.0.port.10.s.0.orderindex=-1 |
unit.2.0.port.10.s.0.visible=1 |
unit.2.0.port.10.s.1.alias= |
unit.2.0.port.10.s.1.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.1.name=TriggerPort10[1] |
unit.2.0.port.10.s.1.orderindex=-1 |
unit.2.0.port.10.s.1.visible=1 |
unit.2.0.port.10.s.10.alias= |
unit.2.0.port.10.s.10.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.10.name=TriggerPort10[10] |
unit.2.0.port.10.s.10.orderindex=-1 |
unit.2.0.port.10.s.10.visible=1 |
unit.2.0.port.10.s.11.alias= |
unit.2.0.port.10.s.11.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.11.name=TriggerPort10[11] |
unit.2.0.port.10.s.11.orderindex=-1 |
unit.2.0.port.10.s.11.visible=1 |
unit.2.0.port.10.s.12.alias= |
unit.2.0.port.10.s.12.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.12.name=TriggerPort10[12] |
unit.2.0.port.10.s.12.orderindex=-1 |
unit.2.0.port.10.s.12.visible=1 |
unit.2.0.port.10.s.13.alias= |
unit.2.0.port.10.s.13.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.13.name=TriggerPort10[13] |
unit.2.0.port.10.s.13.orderindex=-1 |
unit.2.0.port.10.s.13.visible=1 |
unit.2.0.port.10.s.14.alias= |
unit.2.0.port.10.s.14.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.14.name=TriggerPort10[14] |
unit.2.0.port.10.s.14.orderindex=-1 |
unit.2.0.port.10.s.14.visible=1 |
unit.2.0.port.10.s.15.alias= |
unit.2.0.port.10.s.15.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.15.name=TriggerPort10[15] |
unit.2.0.port.10.s.15.orderindex=-1 |
unit.2.0.port.10.s.15.visible=1 |
unit.2.0.port.10.s.16.alias= |
unit.2.0.port.10.s.16.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.16.name=TriggerPort10[16] |
unit.2.0.port.10.s.16.orderindex=-1 |
unit.2.0.port.10.s.16.visible=1 |
unit.2.0.port.10.s.17.alias= |
unit.2.0.port.10.s.17.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.17.name=TriggerPort10[17] |
unit.2.0.port.10.s.17.orderindex=-1 |
unit.2.0.port.10.s.17.visible=1 |
unit.2.0.port.10.s.18.alias= |
unit.2.0.port.10.s.18.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.18.name=TriggerPort10[18] |
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unit.2.0.port.10.s.18.visible=1 |
unit.2.0.port.10.s.19.alias= |
unit.2.0.port.10.s.19.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.19.name=TriggerPort10[19] |
unit.2.0.port.10.s.19.orderindex=-1 |
unit.2.0.port.10.s.19.visible=1 |
unit.2.0.port.10.s.2.alias= |
unit.2.0.port.10.s.2.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.2.name=TriggerPort10[2] |
unit.2.0.port.10.s.2.orderindex=-1 |
unit.2.0.port.10.s.2.visible=1 |
unit.2.0.port.10.s.20.alias= |
unit.2.0.port.10.s.20.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.20.name=TriggerPort10[20] |
unit.2.0.port.10.s.20.orderindex=-1 |
unit.2.0.port.10.s.20.visible=1 |
unit.2.0.port.10.s.3.alias= |
unit.2.0.port.10.s.3.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.3.name=TriggerPort10[3] |
unit.2.0.port.10.s.3.orderindex=-1 |
unit.2.0.port.10.s.3.visible=1 |
unit.2.0.port.10.s.4.alias= |
unit.2.0.port.10.s.4.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.4.name=TriggerPort10[4] |
unit.2.0.port.10.s.4.orderindex=-1 |
unit.2.0.port.10.s.4.visible=1 |
unit.2.0.port.10.s.5.alias= |
unit.2.0.port.10.s.5.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.5.name=TriggerPort10[5] |
unit.2.0.port.10.s.5.orderindex=-1 |
unit.2.0.port.10.s.5.visible=1 |
unit.2.0.port.10.s.6.alias= |
unit.2.0.port.10.s.6.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.6.name=TriggerPort10[6] |
unit.2.0.port.10.s.6.orderindex=-1 |
unit.2.0.port.10.s.6.visible=1 |
unit.2.0.port.10.s.7.alias= |
unit.2.0.port.10.s.7.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.7.name=TriggerPort10[7] |
unit.2.0.port.10.s.7.orderindex=-1 |
unit.2.0.port.10.s.7.visible=1 |
unit.2.0.port.10.s.8.alias= |
unit.2.0.port.10.s.8.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.8.name=TriggerPort10[8] |
unit.2.0.port.10.s.8.orderindex=-1 |
unit.2.0.port.10.s.8.visible=1 |
unit.2.0.port.10.s.9.alias= |
unit.2.0.port.10.s.9.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.10.s.9.name=TriggerPort10[9] |
unit.2.0.port.10.s.9.orderindex=-1 |
unit.2.0.port.10.s.9.visible=1 |
unit.2.0.port.11.b.0.alias= |
unit.2.0.port.11.b.0.channellist=0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 |
unit.2.0.port.11.b.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.11.b.0.name=TriggerPort11 |
unit.2.0.port.11.b.0.orderindex=-1 |
unit.2.0.port.11.b.0.radix=Hex |
unit.2.0.port.11.b.0.signedOffset=0.0 |
unit.2.0.port.11.b.0.signedPrecision=0 |
unit.2.0.port.11.b.0.signedScaleFactor=1.0 |
unit.2.0.port.11.b.0.unsignedOffset=0.0 |
unit.2.0.port.11.b.0.unsignedPrecision=0 |
unit.2.0.port.11.b.0.unsignedScaleFactor=1.0 |
unit.2.0.port.11.b.0.visible=1 |
unit.2.0.port.11.buscount=1 |
unit.2.0.port.11.channelcount=16 |
unit.2.0.port.11.s.0.alias= |
unit.2.0.port.11.s.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.11.s.0.name=TriggerPort11[0] |
unit.2.0.port.11.s.0.orderindex=-1 |
unit.2.0.port.11.s.0.visible=1 |
unit.2.0.port.11.s.1.alias= |
unit.2.0.port.11.s.1.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.11.s.1.name=TriggerPort11[1] |
unit.2.0.port.11.s.1.orderindex=-1 |
unit.2.0.port.11.s.1.visible=1 |
unit.2.0.port.11.s.10.alias= |
unit.2.0.port.11.s.10.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.11.s.10.name=TriggerPort11[10] |
unit.2.0.port.11.s.10.orderindex=-1 |
unit.2.0.port.11.s.10.visible=1 |
unit.2.0.port.11.s.11.alias= |
unit.2.0.port.11.s.11.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.11.s.11.name=TriggerPort11[11] |
unit.2.0.port.11.s.11.orderindex=-1 |
unit.2.0.port.11.s.11.visible=1 |
unit.2.0.port.11.s.12.alias= |
unit.2.0.port.11.s.12.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.11.s.12.name=TriggerPort11[12] |
unit.2.0.port.11.s.12.orderindex=-1 |
unit.2.0.port.11.s.12.visible=1 |
unit.2.0.port.11.s.13.alias= |
unit.2.0.port.11.s.13.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.11.s.13.name=TriggerPort11[13] |
unit.2.0.port.11.s.13.orderindex=-1 |
unit.2.0.port.11.s.13.visible=1 |
unit.2.0.port.11.s.14.alias= |
unit.2.0.port.11.s.14.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.11.s.14.name=TriggerPort11[14] |
unit.2.0.port.11.s.14.orderindex=-1 |
unit.2.0.port.11.s.14.visible=1 |
unit.2.0.port.11.s.15.alias= |
unit.2.0.port.11.s.15.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.11.s.15.name=TriggerPort11[15] |
unit.2.0.port.11.s.15.orderindex=-1 |
unit.2.0.port.11.s.15.visible=1 |
unit.2.0.port.11.s.2.alias= |
unit.2.0.port.11.s.2.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.11.s.2.name=TriggerPort11[2] |
unit.2.0.port.11.s.2.orderindex=-1 |
unit.2.0.port.11.s.2.visible=1 |
unit.2.0.port.11.s.3.alias= |
unit.2.0.port.11.s.3.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.11.s.3.name=TriggerPort11[3] |
unit.2.0.port.11.s.3.orderindex=-1 |
unit.2.0.port.11.s.3.visible=1 |
unit.2.0.port.11.s.4.alias= |
unit.2.0.port.11.s.4.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.11.s.4.name=TriggerPort11[4] |
unit.2.0.port.11.s.4.orderindex=-1 |
unit.2.0.port.11.s.4.visible=1 |
unit.2.0.port.11.s.5.alias= |
unit.2.0.port.11.s.5.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.11.s.5.name=TriggerPort11[5] |
unit.2.0.port.11.s.5.orderindex=-1 |
unit.2.0.port.11.s.5.visible=1 |
unit.2.0.port.11.s.6.alias= |
unit.2.0.port.11.s.6.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.11.s.6.name=TriggerPort11[6] |
unit.2.0.port.11.s.6.orderindex=-1 |
unit.2.0.port.11.s.6.visible=1 |
unit.2.0.port.11.s.7.alias= |
unit.2.0.port.11.s.7.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.11.s.7.name=TriggerPort11[7] |
unit.2.0.port.11.s.7.orderindex=-1 |
unit.2.0.port.11.s.7.visible=1 |
unit.2.0.port.11.s.8.alias= |
unit.2.0.port.11.s.8.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.11.s.8.name=TriggerPort11[8] |
unit.2.0.port.11.s.8.orderindex=-1 |
unit.2.0.port.11.s.8.visible=1 |
unit.2.0.port.11.s.9.alias= |
unit.2.0.port.11.s.9.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.11.s.9.name=TriggerPort11[9] |
unit.2.0.port.11.s.9.orderindex=-1 |
unit.2.0.port.11.s.9.visible=1 |
unit.2.0.port.12.b.0.alias= |
unit.2.0.port.12.b.0.channellist=0 1 2 3 4 5 6 7 8 |
unit.2.0.port.12.b.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.12.b.0.name=TriggerPort12 |
unit.2.0.port.12.b.0.orderindex=-1 |
unit.2.0.port.12.b.0.radix=Hex |
unit.2.0.port.12.b.0.signedOffset=0.0 |
unit.2.0.port.12.b.0.signedPrecision=0 |
unit.2.0.port.12.b.0.signedScaleFactor=1.0 |
unit.2.0.port.12.b.0.unsignedOffset=0.0 |
unit.2.0.port.12.b.0.unsignedPrecision=0 |
unit.2.0.port.12.b.0.unsignedScaleFactor=1.0 |
unit.2.0.port.12.b.0.visible=1 |
unit.2.0.port.12.buscount=1 |
unit.2.0.port.12.channelcount=9 |
unit.2.0.port.12.s.0.alias=flash_ce2_ |
unit.2.0.port.12.s.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.12.s.0.name=TriggerPort12[0] |
unit.2.0.port.12.s.0.orderindex=-1 |
unit.2.0.port.12.s.0.visible=1 |
unit.2.0.port.12.s.1.alias=sram_adv_ |
unit.2.0.port.12.s.1.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.12.s.1.name=TriggerPort12[1] |
unit.2.0.port.12.s.1.orderindex=-1 |
unit.2.0.port.12.s.1.visible=1 |
unit.2.0.port.12.s.2.alias=sram_cen_ |
unit.2.0.port.12.s.2.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.12.s.2.name=TriggerPort12[2] |
unit.2.0.port.12.s.2.orderindex=-1 |
unit.2.0.port.12.s.2.visible=1 |
unit.2.0.port.12.s.3.alias=DataPort[210] |
unit.2.0.port.12.s.3.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.12.s.3.name=TriggerPort12[3] |
unit.2.0.port.12.s.3.orderindex=-1 |
unit.2.0.port.12.s.3.visible=1 |
unit.2.0.port.12.s.4.alias= |
unit.2.0.port.12.s.4.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.12.s.4.name=TriggerPort12[4] |
unit.2.0.port.12.s.4.orderindex=-1 |
unit.2.0.port.12.s.4.visible=1 |
unit.2.0.port.12.s.5.alias= |
unit.2.0.port.12.s.5.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.12.s.5.name=TriggerPort12[5] |
unit.2.0.port.12.s.5.orderindex=-1 |
unit.2.0.port.12.s.5.visible=1 |
unit.2.0.port.12.s.6.alias= |
unit.2.0.port.12.s.6.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.12.s.6.name=TriggerPort12[6] |
unit.2.0.port.12.s.6.orderindex=-1 |
unit.2.0.port.12.s.6.visible=1 |
unit.2.0.port.12.s.7.alias=sf_we_ |
unit.2.0.port.12.s.7.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.12.s.7.name=TriggerPort12[7] |
unit.2.0.port.12.s.7.orderindex=-1 |
unit.2.0.port.12.s.7.visible=1 |
unit.2.0.port.12.s.8.alias=sf_oe_ |
unit.2.0.port.12.s.8.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.12.s.8.name=TriggerPort12[8] |
unit.2.0.port.12.s.8.orderindex=-1 |
unit.2.0.port.12.s.8.visible=1 |
unit.2.0.port.13.b.0.alias= |
unit.2.0.port.13.b.0.channellist=0 1 2 |
unit.2.0.port.13.b.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.13.b.0.name=TriggerPort13 |
unit.2.0.port.13.b.0.orderindex=-1 |
unit.2.0.port.13.b.0.radix=Hex |
unit.2.0.port.13.b.0.signedOffset=0.0 |
unit.2.0.port.13.b.0.signedPrecision=0 |
unit.2.0.port.13.b.0.signedScaleFactor=1.0 |
unit.2.0.port.13.b.0.unsignedOffset=0.0 |
unit.2.0.port.13.b.0.unsignedPrecision=0 |
unit.2.0.port.13.b.0.unsignedScaleFactor=1.0 |
unit.2.0.port.13.b.0.visible=1 |
unit.2.0.port.13.buscount=1 |
unit.2.0.port.13.channelcount=3 |
unit.2.0.port.13.s.0.alias= |
unit.2.0.port.13.s.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.13.s.0.name=TriggerPort13[0] |
unit.2.0.port.13.s.0.orderindex=-1 |
unit.2.0.port.13.s.0.visible=1 |
unit.2.0.port.13.s.1.alias= |
unit.2.0.port.13.s.1.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.13.s.1.name=TriggerPort13[1] |
unit.2.0.port.13.s.1.orderindex=-1 |
unit.2.0.port.13.s.1.visible=1 |
unit.2.0.port.13.s.2.alias= |
unit.2.0.port.13.s.2.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.13.s.2.name=TriggerPort13[2] |
unit.2.0.port.13.s.2.orderindex=-1 |
unit.2.0.port.13.s.2.visible=1 |
unit.2.0.port.14.b.0.alias= |
unit.2.0.port.14.b.0.channellist=0 1 2 3 4 |
unit.2.0.port.14.b.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.14.b.0.name=TriggerPort14 |
unit.2.0.port.14.b.0.orderindex=-1 |
unit.2.0.port.14.b.0.radix=Hex |
unit.2.0.port.14.b.0.signedOffset=0.0 |
unit.2.0.port.14.b.0.signedPrecision=0 |
unit.2.0.port.14.b.0.signedScaleFactor=1.0 |
unit.2.0.port.14.b.0.unsignedOffset=0.0 |
unit.2.0.port.14.b.0.unsignedPrecision=0 |
unit.2.0.port.14.b.0.unsignedScaleFactor=1.0 |
unit.2.0.port.14.b.0.visible=1 |
unit.2.0.port.14.buscount=1 |
unit.2.0.port.14.channelcount=5 |
unit.2.0.port.14.s.0.alias=op |
unit.2.0.port.14.s.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.14.s.0.name=TriggerPort14[0] |
unit.2.0.port.14.s.0.orderindex=-1 |
unit.2.0.port.14.s.0.visible=1 |
unit.2.0.port.14.s.1.alias=zbt_stb |
unit.2.0.port.14.s.1.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.14.s.1.name=TriggerPort14[1] |
unit.2.0.port.14.s.1.orderindex=-1 |
unit.2.0.port.14.s.1.visible=1 |
unit.2.0.port.14.s.2.alias=flash_stb |
unit.2.0.port.14.s.2.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.14.s.2.name=TriggerPort14[2] |
unit.2.0.port.14.s.2.orderindex=-1 |
unit.2.0.port.14.s.2.visible=1 |
unit.2.0.port.14.s.3.alias=flash_arena |
unit.2.0.port.14.s.3.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.14.s.3.name=TriggerPort14[3] |
unit.2.0.port.14.s.3.orderindex=-1 |
unit.2.0.port.14.s.3.visible=1 |
unit.2.0.port.14.s.4.alias=vdu_arena |
unit.2.0.port.14.s.4.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.14.s.4.name=TriggerPort14[4] |
unit.2.0.port.14.s.4.orderindex=-1 |
unit.2.0.port.14.s.4.visible=1 |
unit.2.0.port.15.b.0.alias= |
unit.2.0.port.15.b.0.channellist=0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
unit.2.0.port.15.b.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.b.0.name=TriggerPort15 |
unit.2.0.port.15.b.0.orderindex=-1 |
unit.2.0.port.15.b.0.radix=Hex |
unit.2.0.port.15.b.0.signedOffset=0.0 |
unit.2.0.port.15.b.0.signedPrecision=0 |
unit.2.0.port.15.b.0.signedScaleFactor=1.0 |
unit.2.0.port.15.b.0.unsignedOffset=0.0 |
unit.2.0.port.15.b.0.unsignedPrecision=0 |
unit.2.0.port.15.b.0.unsignedScaleFactor=1.0 |
unit.2.0.port.15.b.0.visible=1 |
unit.2.0.port.15.buscount=1 |
unit.2.0.port.15.channelcount=32 |
unit.2.0.port.15.s.0.alias= |
unit.2.0.port.15.s.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.0.name=TriggerPort15[0] |
unit.2.0.port.15.s.0.orderindex=-1 |
unit.2.0.port.15.s.0.visible=1 |
unit.2.0.port.15.s.1.alias= |
unit.2.0.port.15.s.1.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.1.name=TriggerPort15[1] |
unit.2.0.port.15.s.1.orderindex=-1 |
unit.2.0.port.15.s.1.visible=1 |
unit.2.0.port.15.s.10.alias= |
unit.2.0.port.15.s.10.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.10.name=TriggerPort15[10] |
unit.2.0.port.15.s.10.orderindex=-1 |
unit.2.0.port.15.s.10.visible=1 |
unit.2.0.port.15.s.11.alias= |
unit.2.0.port.15.s.11.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.11.name=TriggerPort15[11] |
unit.2.0.port.15.s.11.orderindex=-1 |
unit.2.0.port.15.s.11.visible=1 |
unit.2.0.port.15.s.12.alias= |
unit.2.0.port.15.s.12.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.12.name=TriggerPort15[12] |
unit.2.0.port.15.s.12.orderindex=-1 |
unit.2.0.port.15.s.12.visible=1 |
unit.2.0.port.15.s.13.alias= |
unit.2.0.port.15.s.13.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.13.name=TriggerPort15[13] |
unit.2.0.port.15.s.13.orderindex=-1 |
unit.2.0.port.15.s.13.visible=1 |
unit.2.0.port.15.s.14.alias= |
unit.2.0.port.15.s.14.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.14.name=TriggerPort15[14] |
unit.2.0.port.15.s.14.orderindex=-1 |
unit.2.0.port.15.s.14.visible=1 |
unit.2.0.port.15.s.15.alias= |
unit.2.0.port.15.s.15.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.15.name=TriggerPort15[15] |
unit.2.0.port.15.s.15.orderindex=-1 |
unit.2.0.port.15.s.15.visible=1 |
unit.2.0.port.15.s.16.alias= |
unit.2.0.port.15.s.16.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.16.name=TriggerPort15[16] |
unit.2.0.port.15.s.16.orderindex=-1 |
unit.2.0.port.15.s.16.visible=1 |
unit.2.0.port.15.s.17.alias= |
unit.2.0.port.15.s.17.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.17.name=TriggerPort15[17] |
unit.2.0.port.15.s.17.orderindex=-1 |
unit.2.0.port.15.s.17.visible=1 |
unit.2.0.port.15.s.18.alias= |
unit.2.0.port.15.s.18.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.18.name=TriggerPort15[18] |
unit.2.0.port.15.s.18.orderindex=-1 |
unit.2.0.port.15.s.18.visible=1 |
unit.2.0.port.15.s.19.alias= |
unit.2.0.port.15.s.19.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.19.name=TriggerPort15[19] |
unit.2.0.port.15.s.19.orderindex=-1 |
unit.2.0.port.15.s.19.visible=1 |
unit.2.0.port.15.s.2.alias= |
unit.2.0.port.15.s.2.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.2.name=TriggerPort15[2] |
unit.2.0.port.15.s.2.orderindex=-1 |
unit.2.0.port.15.s.2.visible=1 |
unit.2.0.port.15.s.20.alias= |
unit.2.0.port.15.s.20.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.20.name=TriggerPort15[20] |
unit.2.0.port.15.s.20.orderindex=-1 |
unit.2.0.port.15.s.20.visible=1 |
unit.2.0.port.15.s.21.alias= |
unit.2.0.port.15.s.21.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.21.name=TriggerPort15[21] |
unit.2.0.port.15.s.21.orderindex=-1 |
unit.2.0.port.15.s.21.visible=1 |
unit.2.0.port.15.s.22.alias= |
unit.2.0.port.15.s.22.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.22.name=TriggerPort15[22] |
unit.2.0.port.15.s.22.orderindex=-1 |
unit.2.0.port.15.s.22.visible=1 |
unit.2.0.port.15.s.23.alias= |
unit.2.0.port.15.s.23.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.23.name=TriggerPort15[23] |
unit.2.0.port.15.s.23.orderindex=-1 |
unit.2.0.port.15.s.23.visible=1 |
unit.2.0.port.15.s.24.alias= |
unit.2.0.port.15.s.24.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.24.name=TriggerPort15[24] |
unit.2.0.port.15.s.24.orderindex=-1 |
unit.2.0.port.15.s.24.visible=1 |
unit.2.0.port.15.s.25.alias= |
unit.2.0.port.15.s.25.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.25.name=TriggerPort15[25] |
unit.2.0.port.15.s.25.orderindex=-1 |
unit.2.0.port.15.s.25.visible=1 |
unit.2.0.port.15.s.26.alias= |
unit.2.0.port.15.s.26.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.26.name=TriggerPort15[26] |
unit.2.0.port.15.s.26.orderindex=-1 |
unit.2.0.port.15.s.26.visible=1 |
unit.2.0.port.15.s.27.alias= |
unit.2.0.port.15.s.27.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.27.name=TriggerPort15[27] |
unit.2.0.port.15.s.27.orderindex=-1 |
unit.2.0.port.15.s.27.visible=1 |
unit.2.0.port.15.s.28.alias= |
unit.2.0.port.15.s.28.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.28.name=TriggerPort15[28] |
unit.2.0.port.15.s.28.orderindex=-1 |
unit.2.0.port.15.s.28.visible=1 |
unit.2.0.port.15.s.29.alias= |
unit.2.0.port.15.s.29.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.29.name=TriggerPort15[29] |
unit.2.0.port.15.s.29.orderindex=-1 |
unit.2.0.port.15.s.29.visible=1 |
unit.2.0.port.15.s.3.alias= |
unit.2.0.port.15.s.3.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.3.name=TriggerPort15[3] |
unit.2.0.port.15.s.3.orderindex=-1 |
unit.2.0.port.15.s.3.visible=1 |
unit.2.0.port.15.s.30.alias= |
unit.2.0.port.15.s.30.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.30.name=TriggerPort15[30] |
unit.2.0.port.15.s.30.orderindex=-1 |
unit.2.0.port.15.s.30.visible=1 |
unit.2.0.port.15.s.31.alias= |
unit.2.0.port.15.s.31.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.31.name=TriggerPort15[31] |
unit.2.0.port.15.s.31.orderindex=-1 |
unit.2.0.port.15.s.31.visible=1 |
unit.2.0.port.15.s.4.alias= |
unit.2.0.port.15.s.4.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.4.name=TriggerPort15[4] |
unit.2.0.port.15.s.4.orderindex=-1 |
unit.2.0.port.15.s.4.visible=1 |
unit.2.0.port.15.s.5.alias= |
unit.2.0.port.15.s.5.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.5.name=TriggerPort15[5] |
unit.2.0.port.15.s.5.orderindex=-1 |
unit.2.0.port.15.s.5.visible=1 |
unit.2.0.port.15.s.6.alias= |
unit.2.0.port.15.s.6.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.6.name=TriggerPort15[6] |
unit.2.0.port.15.s.6.orderindex=-1 |
unit.2.0.port.15.s.6.visible=1 |
unit.2.0.port.15.s.7.alias= |
unit.2.0.port.15.s.7.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.7.name=TriggerPort15[7] |
unit.2.0.port.15.s.7.orderindex=-1 |
unit.2.0.port.15.s.7.visible=1 |
unit.2.0.port.15.s.8.alias= |
unit.2.0.port.15.s.8.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.8.name=TriggerPort15[8] |
unit.2.0.port.15.s.8.orderindex=-1 |
unit.2.0.port.15.s.8.visible=1 |
unit.2.0.port.15.s.9.alias= |
unit.2.0.port.15.s.9.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.15.s.9.name=TriggerPort15[9] |
unit.2.0.port.15.s.9.orderindex=-1 |
unit.2.0.port.15.s.9.visible=1 |
unit.2.0.port.2.b.0.alias= |
unit.2.0.port.2.b.0.channellist=0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 |
unit.2.0.port.2.b.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.b.0.name=TriggerPort2 |
unit.2.0.port.2.b.0.orderindex=-1 |
unit.2.0.port.2.b.0.radix=Hex |
unit.2.0.port.2.b.0.signedOffset=0.0 |
unit.2.0.port.2.b.0.signedPrecision=0 |
unit.2.0.port.2.b.0.signedScaleFactor=1.0 |
unit.2.0.port.2.b.0.unsignedOffset=0.0 |
unit.2.0.port.2.b.0.unsignedPrecision=0 |
unit.2.0.port.2.b.0.unsignedScaleFactor=1.0 |
unit.2.0.port.2.b.0.visible=1 |
unit.2.0.port.2.buscount=1 |
unit.2.0.port.2.channelcount=20 |
unit.2.0.port.2.s.0.alias= |
unit.2.0.port.2.s.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.0.name=TriggerPort2[0] |
unit.2.0.port.2.s.0.orderindex=-1 |
unit.2.0.port.2.s.0.visible=1 |
unit.2.0.port.2.s.1.alias= |
unit.2.0.port.2.s.1.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.1.name=TriggerPort2[1] |
unit.2.0.port.2.s.1.orderindex=-1 |
unit.2.0.port.2.s.1.visible=1 |
unit.2.0.port.2.s.10.alias= |
unit.2.0.port.2.s.10.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.10.name=TriggerPort2[10] |
unit.2.0.port.2.s.10.orderindex=-1 |
unit.2.0.port.2.s.10.visible=1 |
unit.2.0.port.2.s.11.alias= |
unit.2.0.port.2.s.11.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.11.name=TriggerPort2[11] |
unit.2.0.port.2.s.11.orderindex=-1 |
unit.2.0.port.2.s.11.visible=1 |
unit.2.0.port.2.s.12.alias= |
unit.2.0.port.2.s.12.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.12.name=TriggerPort2[12] |
unit.2.0.port.2.s.12.orderindex=-1 |
unit.2.0.port.2.s.12.visible=1 |
unit.2.0.port.2.s.13.alias= |
unit.2.0.port.2.s.13.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.13.name=TriggerPort2[13] |
unit.2.0.port.2.s.13.orderindex=-1 |
unit.2.0.port.2.s.13.visible=1 |
unit.2.0.port.2.s.14.alias= |
unit.2.0.port.2.s.14.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.14.name=TriggerPort2[14] |
unit.2.0.port.2.s.14.orderindex=-1 |
unit.2.0.port.2.s.14.visible=1 |
unit.2.0.port.2.s.15.alias= |
unit.2.0.port.2.s.15.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.15.name=TriggerPort2[15] |
unit.2.0.port.2.s.15.orderindex=-1 |
unit.2.0.port.2.s.15.visible=1 |
unit.2.0.port.2.s.16.alias= |
unit.2.0.port.2.s.16.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.16.name=TriggerPort2[16] |
unit.2.0.port.2.s.16.orderindex=-1 |
unit.2.0.port.2.s.16.visible=1 |
unit.2.0.port.2.s.17.alias= |
unit.2.0.port.2.s.17.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.17.name=TriggerPort2[17] |
unit.2.0.port.2.s.17.orderindex=-1 |
unit.2.0.port.2.s.17.visible=1 |
unit.2.0.port.2.s.18.alias= |
unit.2.0.port.2.s.18.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.18.name=TriggerPort2[18] |
unit.2.0.port.2.s.18.orderindex=-1 |
unit.2.0.port.2.s.18.visible=1 |
unit.2.0.port.2.s.19.alias= |
unit.2.0.port.2.s.19.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.19.name=TriggerPort2[19] |
unit.2.0.port.2.s.19.orderindex=-1 |
unit.2.0.port.2.s.19.visible=1 |
unit.2.0.port.2.s.2.alias= |
unit.2.0.port.2.s.2.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.2.name=TriggerPort2[2] |
unit.2.0.port.2.s.2.orderindex=-1 |
unit.2.0.port.2.s.2.visible=1 |
unit.2.0.port.2.s.3.alias= |
unit.2.0.port.2.s.3.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.3.name=TriggerPort2[3] |
unit.2.0.port.2.s.3.orderindex=-1 |
unit.2.0.port.2.s.3.visible=1 |
unit.2.0.port.2.s.4.alias= |
unit.2.0.port.2.s.4.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.4.name=TriggerPort2[4] |
unit.2.0.port.2.s.4.orderindex=-1 |
unit.2.0.port.2.s.4.visible=1 |
unit.2.0.port.2.s.5.alias= |
unit.2.0.port.2.s.5.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.5.name=TriggerPort2[5] |
unit.2.0.port.2.s.5.orderindex=-1 |
unit.2.0.port.2.s.5.visible=1 |
unit.2.0.port.2.s.6.alias= |
unit.2.0.port.2.s.6.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.6.name=TriggerPort2[6] |
unit.2.0.port.2.s.6.orderindex=-1 |
unit.2.0.port.2.s.6.visible=1 |
unit.2.0.port.2.s.7.alias= |
unit.2.0.port.2.s.7.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.7.name=TriggerPort2[7] |
unit.2.0.port.2.s.7.orderindex=-1 |
unit.2.0.port.2.s.7.visible=1 |
unit.2.0.port.2.s.8.alias= |
unit.2.0.port.2.s.8.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.8.name=TriggerPort2[8] |
unit.2.0.port.2.s.8.orderindex=-1 |
unit.2.0.port.2.s.8.visible=1 |
unit.2.0.port.2.s.9.alias= |
unit.2.0.port.2.s.9.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.2.s.9.name=TriggerPort2[9] |
unit.2.0.port.2.s.9.orderindex=-1 |
unit.2.0.port.2.s.9.visible=1 |
unit.2.0.port.3.b.0.alias= |
unit.2.0.port.3.b.0.channellist=0 1 2 3 4 5 |
unit.2.0.port.3.b.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.3.b.0.name=TriggerPort3 |
unit.2.0.port.3.b.0.orderindex=-1 |
unit.2.0.port.3.b.0.radix=Hex |
unit.2.0.port.3.b.0.signedOffset=0.0 |
unit.2.0.port.3.b.0.signedPrecision=0 |
unit.2.0.port.3.b.0.signedScaleFactor=1.0 |
unit.2.0.port.3.b.0.unsignedOffset=0.0 |
unit.2.0.port.3.b.0.unsignedPrecision=0 |
unit.2.0.port.3.b.0.unsignedScaleFactor=1.0 |
unit.2.0.port.3.b.0.visible=1 |
unit.2.0.port.3.buscount=1 |
unit.2.0.port.3.channelcount=6 |
unit.2.0.port.3.s.0.alias=ack |
unit.2.0.port.3.s.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.3.s.0.name=TriggerPort3[0] |
unit.2.0.port.3.s.0.orderindex=-1 |
unit.2.0.port.3.s.0.visible=1 |
unit.2.0.port.3.s.1.alias=stb |
unit.2.0.port.3.s.1.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.3.s.1.name=TriggerPort3[1] |
unit.2.0.port.3.s.1.orderindex=-1 |
unit.2.0.port.3.s.1.visible=1 |
unit.2.0.port.3.s.2.alias=cyc |
unit.2.0.port.3.s.2.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.3.s.2.name=TriggerPort3[2] |
unit.2.0.port.3.s.2.orderindex=-1 |
unit.2.0.port.3.s.2.visible=1 |
unit.2.0.port.3.s.3.alias=tga |
unit.2.0.port.3.s.3.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.3.s.3.name=TriggerPort3[3] |
unit.2.0.port.3.s.3.orderindex=-1 |
unit.2.0.port.3.s.3.visible=1 |
unit.2.0.port.3.s.4.alias=we |
unit.2.0.port.3.s.4.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.3.s.4.name=TriggerPort3[4] |
unit.2.0.port.3.s.4.orderindex=-1 |
unit.2.0.port.3.s.4.visible=1 |
unit.2.0.port.3.s.5.alias=clk |
unit.2.0.port.3.s.5.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.3.s.5.name=TriggerPort3[5] |
unit.2.0.port.3.s.5.orderindex=-1 |
unit.2.0.port.3.s.5.visible=1 |
unit.2.0.port.4.b.0.alias= |
unit.2.0.port.4.b.0.channellist=0 1 2 3 4 5 |
unit.2.0.port.4.b.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.4.b.0.name=TriggerPort4 |
unit.2.0.port.4.b.0.orderindex=-1 |
unit.2.0.port.4.b.0.radix=Hex |
unit.2.0.port.4.b.0.signedOffset=0.0 |
unit.2.0.port.4.b.0.signedPrecision=0 |
unit.2.0.port.4.b.0.signedScaleFactor=1.0 |
unit.2.0.port.4.b.0.unsignedOffset=0.0 |
unit.2.0.port.4.b.0.unsignedPrecision=0 |
unit.2.0.port.4.b.0.unsignedScaleFactor=1.0 |
unit.2.0.port.4.b.0.visible=1 |
unit.2.0.port.4.buscount=1 |
unit.2.0.port.4.channelcount=6 |
unit.2.0.port.4.s.0.alias=DataPort[78] |
unit.2.0.port.4.s.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.4.s.0.name=TriggerPort4[0] |
unit.2.0.port.4.s.0.orderindex=-1 |
unit.2.0.port.4.s.0.visible=1 |
unit.2.0.port.4.s.1.alias= |
unit.2.0.port.4.s.1.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.4.s.1.name=TriggerPort4[1] |
unit.2.0.port.4.s.1.orderindex=-1 |
unit.2.0.port.4.s.1.visible=1 |
unit.2.0.port.4.s.10.alias= |
unit.2.0.port.4.s.10.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.4.s.10.name=TriggerPort4[10] |
unit.2.0.port.4.s.10.orderindex=-1 |
unit.2.0.port.4.s.10.visible=1 |
unit.2.0.port.4.s.11.alias= |
unit.2.0.port.4.s.11.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.4.s.11.name=TriggerPort4[11] |
unit.2.0.port.4.s.11.orderindex=-1 |
unit.2.0.port.4.s.11.visible=1 |
unit.2.0.port.4.s.12.alias= |
unit.2.0.port.4.s.12.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.4.s.12.name=TriggerPort4[12] |
unit.2.0.port.4.s.12.orderindex=-1 |
unit.2.0.port.4.s.12.visible=1 |
unit.2.0.port.4.s.13.alias= |
unit.2.0.port.4.s.13.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.4.s.13.name=TriggerPort4[13] |
unit.2.0.port.4.s.13.orderindex=-1 |
unit.2.0.port.4.s.13.visible=1 |
unit.2.0.port.4.s.14.alias= |
unit.2.0.port.4.s.14.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.4.s.14.name=TriggerPort4[14] |
unit.2.0.port.4.s.14.orderindex=-1 |
unit.2.0.port.4.s.14.visible=1 |
unit.2.0.port.4.s.15.alias= |
unit.2.0.port.4.s.15.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.4.s.15.name=TriggerPort4[15] |
unit.2.0.port.4.s.15.orderindex=-1 |
unit.2.0.port.4.s.15.visible=1 |
unit.2.0.port.4.s.2.alias= |
unit.2.0.port.4.s.2.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.4.s.2.name=TriggerPort4[2] |
unit.2.0.port.4.s.2.orderindex=-1 |
unit.2.0.port.4.s.2.visible=1 |
unit.2.0.port.4.s.3.alias= |
unit.2.0.port.4.s.3.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.4.s.3.name=TriggerPort4[3] |
unit.2.0.port.4.s.3.orderindex=-1 |
unit.2.0.port.4.s.3.visible=1 |
unit.2.0.port.4.s.4.alias= |
unit.2.0.port.4.s.4.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.4.s.4.name=TriggerPort4[4] |
unit.2.0.port.4.s.4.orderindex=-1 |
unit.2.0.port.4.s.4.visible=1 |
unit.2.0.port.4.s.5.alias= |
unit.2.0.port.4.s.5.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.4.s.5.name=TriggerPort4[5] |
unit.2.0.port.4.s.5.orderindex=-1 |
unit.2.0.port.4.s.5.visible=1 |
unit.2.0.port.4.s.6.alias= |
unit.2.0.port.4.s.6.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.4.s.6.name=TriggerPort4[6] |
unit.2.0.port.4.s.6.orderindex=-1 |
unit.2.0.port.4.s.6.visible=1 |
unit.2.0.port.4.s.7.alias= |
unit.2.0.port.4.s.7.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.4.s.7.name=TriggerPort4[7] |
unit.2.0.port.4.s.7.orderindex=-1 |
unit.2.0.port.4.s.7.visible=1 |
unit.2.0.port.4.s.8.alias= |
unit.2.0.port.4.s.8.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.4.s.8.name=TriggerPort4[8] |
unit.2.0.port.4.s.8.orderindex=-1 |
unit.2.0.port.4.s.8.visible=1 |
unit.2.0.port.4.s.9.alias= |
unit.2.0.port.4.s.9.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.4.s.9.name=TriggerPort4[9] |
unit.2.0.port.4.s.9.orderindex=-1 |
unit.2.0.port.4.s.9.visible=1 |
unit.2.0.port.5.b.0.alias= |
unit.2.0.port.5.b.0.channellist=0 1 2 3 4 5 |
unit.2.0.port.5.b.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.5.b.0.name=TriggerPort5 |
unit.2.0.port.5.b.0.orderindex=-1 |
unit.2.0.port.5.b.0.radix=Hex |
unit.2.0.port.5.b.0.signedOffset=0.0 |
unit.2.0.port.5.b.0.signedPrecision=0 |
unit.2.0.port.5.b.0.signedScaleFactor=1.0 |
unit.2.0.port.5.b.0.unsignedOffset=0.0 |
unit.2.0.port.5.b.0.unsignedPrecision=0 |
unit.2.0.port.5.b.0.unsignedScaleFactor=1.0 |
unit.2.0.port.5.b.0.visible=1 |
unit.2.0.port.5.buscount=1 |
unit.2.0.port.5.channelcount=6 |
unit.2.0.port.5.s.0.alias= |
unit.2.0.port.5.s.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.5.s.0.name=TriggerPort5[0] |
unit.2.0.port.5.s.0.orderindex=-1 |
unit.2.0.port.5.s.0.visible=1 |
unit.2.0.port.5.s.1.alias= |
unit.2.0.port.5.s.1.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.5.s.1.name=TriggerPort5[1] |
unit.2.0.port.5.s.1.orderindex=-1 |
unit.2.0.port.5.s.1.visible=1 |
unit.2.0.port.5.s.2.alias= |
unit.2.0.port.5.s.2.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.5.s.2.name=TriggerPort5[2] |
unit.2.0.port.5.s.2.orderindex=-1 |
unit.2.0.port.5.s.2.visible=1 |
unit.2.0.port.5.s.3.alias= |
unit.2.0.port.5.s.3.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.5.s.3.name=TriggerPort5[3] |
unit.2.0.port.5.s.3.orderindex=-1 |
unit.2.0.port.5.s.3.visible=1 |
unit.2.0.port.5.s.4.alias= |
unit.2.0.port.5.s.4.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.5.s.4.name=TriggerPort5[4] |
unit.2.0.port.5.s.4.orderindex=-1 |
unit.2.0.port.5.s.4.visible=1 |
unit.2.0.port.5.s.5.alias= |
unit.2.0.port.5.s.5.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.5.s.5.name=TriggerPort5[5] |
unit.2.0.port.5.s.5.orderindex=-1 |
unit.2.0.port.5.s.5.visible=1 |
unit.2.0.port.6.b.0.alias= |
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unit.2.0.port.6.b.0.radix=Hex |
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unit.2.0.port.6.b.0.signedScaleFactor=1.0 |
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unit.2.0.port.6.b.0.unsignedScaleFactor=1.0 |
unit.2.0.port.6.b.0.visible=1 |
unit.2.0.port.6.buscount=1 |
unit.2.0.port.6.channelcount=16 |
unit.2.0.port.6.s.0.alias= |
unit.2.0.port.6.s.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.6.s.0.visible=1 |
unit.2.0.port.6.s.1.alias= |
unit.2.0.port.6.s.1.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.6.s.1.visible=1 |
unit.2.0.port.6.s.10.alias= |
unit.2.0.port.6.s.10.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.6.s.10.visible=1 |
unit.2.0.port.6.s.11.alias= |
unit.2.0.port.6.s.11.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.6.s.11.visible=1 |
unit.2.0.port.6.s.12.alias= |
unit.2.0.port.6.s.12.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.6.s.12.visible=1 |
unit.2.0.port.6.s.13.alias= |
unit.2.0.port.6.s.13.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.6.s.13.visible=1 |
unit.2.0.port.6.s.14.alias= |
unit.2.0.port.6.s.14.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.6.s.14.visible=1 |
unit.2.0.port.6.s.15.alias= |
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unit.2.0.port.6.s.15.visible=1 |
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unit.2.0.port.6.s.2.visible=1 |
unit.2.0.port.6.s.3.alias= |
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unit.2.0.port.6.s.3.visible=1 |
unit.2.0.port.6.s.4.alias= |
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unit.2.0.port.6.s.4.visible=1 |
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unit.2.0.port.6.s.5.visible=1 |
unit.2.0.port.6.s.6.alias= |
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unit.2.0.port.6.s.6.visible=1 |
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unit.2.0.port.6.s.7.visible=1 |
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unit.2.0.port.7.b.0.unsignedScaleFactor=1.0 |
unit.2.0.port.7.b.0.visible=1 |
unit.2.0.port.7.buscount=1 |
unit.2.0.port.7.channelcount=16 |
unit.2.0.port.7.s.0.alias= |
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unit.2.0.port.7.s.0.visible=1 |
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unit.2.0.port.7.s.1.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.7.s.1.visible=1 |
unit.2.0.port.7.s.10.alias= |
unit.2.0.port.7.s.10.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.7.s.10.visible=1 |
unit.2.0.port.7.s.11.alias= |
unit.2.0.port.7.s.11.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.7.s.11.visible=1 |
unit.2.0.port.7.s.12.alias= |
unit.2.0.port.7.s.12.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.7.s.12.visible=1 |
unit.2.0.port.7.s.13.alias= |
unit.2.0.port.7.s.13.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.7.s.13.visible=1 |
unit.2.0.port.7.s.14.alias= |
unit.2.0.port.7.s.14.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.7.s.14.visible=1 |
unit.2.0.port.7.s.15.alias= |
unit.2.0.port.7.s.15.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.7.s.15.visible=1 |
unit.2.0.port.7.s.2.alias= |
unit.2.0.port.7.s.2.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.7.s.2.visible=1 |
unit.2.0.port.7.s.3.alias= |
unit.2.0.port.7.s.3.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.7.s.3.visible=1 |
unit.2.0.port.7.s.4.alias= |
unit.2.0.port.7.s.4.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.7.s.4.visible=1 |
unit.2.0.port.7.s.5.alias= |
unit.2.0.port.7.s.5.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.7.s.5.visible=1 |
unit.2.0.port.7.s.6.alias= |
unit.2.0.port.7.s.6.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.7.s.6.visible=1 |
unit.2.0.port.7.s.7.alias= |
unit.2.0.port.7.s.7.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.7.s.7.visible=1 |
unit.2.0.port.7.s.8.alias= |
unit.2.0.port.7.s.8.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.7.s.8.visible=1 |
unit.2.0.port.7.s.9.alias= |
unit.2.0.port.7.s.9.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.7.s.9.visible=1 |
unit.2.0.port.8.b.0.alias= |
unit.2.0.port.8.b.0.channellist=0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 |
unit.2.0.port.8.b.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.b.0.radix=Hex |
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unit.2.0.port.8.b.0.unsignedScaleFactor=1.0 |
unit.2.0.port.8.b.0.visible=1 |
unit.2.0.port.8.buscount=1 |
unit.2.0.port.8.channelcount=32 |
unit.2.0.port.8.s.0.alias= |
unit.2.0.port.8.s.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.s.0.visible=1 |
unit.2.0.port.8.s.1.alias= |
unit.2.0.port.8.s.1.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.s.1.visible=1 |
unit.2.0.port.8.s.10.alias= |
unit.2.0.port.8.s.10.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.s.10.visible=1 |
unit.2.0.port.8.s.11.alias= |
unit.2.0.port.8.s.11.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.s.11.visible=1 |
unit.2.0.port.8.s.12.alias= |
unit.2.0.port.8.s.12.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.s.12.visible=1 |
unit.2.0.port.8.s.13.alias= |
unit.2.0.port.8.s.13.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.s.13.visible=1 |
unit.2.0.port.8.s.14.alias= |
unit.2.0.port.8.s.14.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.s.14.visible=1 |
unit.2.0.port.8.s.15.alias= |
unit.2.0.port.8.s.15.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.8.s.15.name=TriggerPort8[15] |
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unit.2.0.port.8.s.15.visible=1 |
unit.2.0.port.8.s.16.alias= |
unit.2.0.port.8.s.16.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.s.16.visible=1 |
unit.2.0.port.8.s.17.alias= |
unit.2.0.port.8.s.17.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.s.17.visible=1 |
unit.2.0.port.8.s.18.alias= |
unit.2.0.port.8.s.18.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.s.18.visible=1 |
unit.2.0.port.8.s.19.alias= |
unit.2.0.port.8.s.19.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.s.19.visible=1 |
unit.2.0.port.8.s.2.alias= |
unit.2.0.port.8.s.2.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.s.2.visible=1 |
unit.2.0.port.8.s.20.alias= |
unit.2.0.port.8.s.20.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.s.20.visible=1 |
unit.2.0.port.8.s.21.alias= |
unit.2.0.port.8.s.21.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.s.21.visible=1 |
unit.2.0.port.8.s.22.alias= |
unit.2.0.port.8.s.22.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.s.22.visible=1 |
unit.2.0.port.8.s.23.alias= |
unit.2.0.port.8.s.23.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.s.23.visible=1 |
unit.2.0.port.8.s.24.alias= |
unit.2.0.port.8.s.24.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.s.24.visible=1 |
unit.2.0.port.8.s.25.alias= |
unit.2.0.port.8.s.25.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.s.25.visible=1 |
unit.2.0.port.8.s.26.alias= |
unit.2.0.port.8.s.26.color=java.awt.Color[r\=0,g\=0,b\=124] |
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unit.2.0.port.8.s.26.visible=1 |
unit.2.0.port.8.s.27.alias= |
unit.2.0.port.8.s.27.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.8.s.27.name=TriggerPort8[27] |
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unit.2.0.port.8.s.27.visible=1 |
unit.2.0.port.8.s.28.alias= |
unit.2.0.port.8.s.28.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.8.s.28.name=TriggerPort8[28] |
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unit.2.0.port.8.s.28.visible=1 |
unit.2.0.port.8.s.29.alias= |
unit.2.0.port.8.s.29.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.8.s.29.name=TriggerPort8[29] |
unit.2.0.port.8.s.29.orderindex=-1 |
unit.2.0.port.8.s.29.visible=1 |
unit.2.0.port.8.s.3.alias= |
unit.2.0.port.8.s.3.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.8.s.3.name=TriggerPort8[3] |
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unit.2.0.port.8.s.3.visible=1 |
unit.2.0.port.8.s.30.alias= |
unit.2.0.port.8.s.30.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.8.s.30.name=TriggerPort8[30] |
unit.2.0.port.8.s.30.orderindex=-1 |
unit.2.0.port.8.s.30.visible=1 |
unit.2.0.port.8.s.31.alias= |
unit.2.0.port.8.s.31.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.8.s.31.name=TriggerPort8[31] |
unit.2.0.port.8.s.31.orderindex=-1 |
unit.2.0.port.8.s.31.visible=1 |
unit.2.0.port.8.s.4.alias= |
unit.2.0.port.8.s.4.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.8.s.4.name=TriggerPort8[4] |
unit.2.0.port.8.s.4.orderindex=-1 |
unit.2.0.port.8.s.4.visible=1 |
unit.2.0.port.8.s.5.alias= |
unit.2.0.port.8.s.5.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.8.s.5.name=TriggerPort8[5] |
unit.2.0.port.8.s.5.orderindex=-1 |
unit.2.0.port.8.s.5.visible=1 |
unit.2.0.port.8.s.6.alias= |
unit.2.0.port.8.s.6.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.8.s.6.name=TriggerPort8[6] |
unit.2.0.port.8.s.6.orderindex=-1 |
unit.2.0.port.8.s.6.visible=1 |
unit.2.0.port.8.s.7.alias= |
unit.2.0.port.8.s.7.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.8.s.7.name=TriggerPort8[7] |
unit.2.0.port.8.s.7.orderindex=-1 |
unit.2.0.port.8.s.7.visible=1 |
unit.2.0.port.8.s.8.alias= |
unit.2.0.port.8.s.8.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.8.s.8.name=TriggerPort8[8] |
unit.2.0.port.8.s.8.orderindex=-1 |
unit.2.0.port.8.s.8.visible=1 |
unit.2.0.port.8.s.9.alias= |
unit.2.0.port.8.s.9.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.8.s.9.name=TriggerPort8[9] |
unit.2.0.port.8.s.9.orderindex=-1 |
unit.2.0.port.8.s.9.visible=1 |
unit.2.0.port.9.b.0.alias= |
unit.2.0.port.9.b.0.channellist=0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 |
unit.2.0.port.9.b.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.b.0.name=TriggerPort9 |
unit.2.0.port.9.b.0.orderindex=-1 |
unit.2.0.port.9.b.0.radix=Hex |
unit.2.0.port.9.b.0.signedOffset=0.0 |
unit.2.0.port.9.b.0.signedPrecision=0 |
unit.2.0.port.9.b.0.signedScaleFactor=1.0 |
unit.2.0.port.9.b.0.unsignedOffset=0.0 |
unit.2.0.port.9.b.0.unsignedPrecision=0 |
unit.2.0.port.9.b.0.unsignedScaleFactor=1.0 |
unit.2.0.port.9.b.0.visible=1 |
unit.2.0.port.9.buscount=1 |
unit.2.0.port.9.channelcount=16 |
unit.2.0.port.9.s.0.alias= |
unit.2.0.port.9.s.0.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.0.name=TriggerPort9[0] |
unit.2.0.port.9.s.0.orderindex=-1 |
unit.2.0.port.9.s.0.visible=1 |
unit.2.0.port.9.s.1.alias= |
unit.2.0.port.9.s.1.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.1.name=TriggerPort9[1] |
unit.2.0.port.9.s.1.orderindex=-1 |
unit.2.0.port.9.s.1.visible=1 |
unit.2.0.port.9.s.10.alias= |
unit.2.0.port.9.s.10.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.10.name=TriggerPort9[10] |
unit.2.0.port.9.s.10.orderindex=-1 |
unit.2.0.port.9.s.10.visible=1 |
unit.2.0.port.9.s.11.alias= |
unit.2.0.port.9.s.11.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.11.name=TriggerPort9[11] |
unit.2.0.port.9.s.11.orderindex=-1 |
unit.2.0.port.9.s.11.visible=1 |
unit.2.0.port.9.s.12.alias= |
unit.2.0.port.9.s.12.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.12.name=TriggerPort9[12] |
unit.2.0.port.9.s.12.orderindex=-1 |
unit.2.0.port.9.s.12.visible=1 |
unit.2.0.port.9.s.13.alias= |
unit.2.0.port.9.s.13.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.13.name=TriggerPort9[13] |
unit.2.0.port.9.s.13.orderindex=-1 |
unit.2.0.port.9.s.13.visible=1 |
unit.2.0.port.9.s.14.alias= |
unit.2.0.port.9.s.14.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.14.name=TriggerPort9[14] |
unit.2.0.port.9.s.14.orderindex=-1 |
unit.2.0.port.9.s.14.visible=1 |
unit.2.0.port.9.s.15.alias= |
unit.2.0.port.9.s.15.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.15.name=TriggerPort9[15] |
unit.2.0.port.9.s.15.orderindex=-1 |
unit.2.0.port.9.s.15.visible=1 |
unit.2.0.port.9.s.16.alias= |
unit.2.0.port.9.s.16.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.16.name=TriggerPort9[16] |
unit.2.0.port.9.s.16.orderindex=-1 |
unit.2.0.port.9.s.16.visible=1 |
unit.2.0.port.9.s.17.alias= |
unit.2.0.port.9.s.17.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.17.name=TriggerPort9[17] |
unit.2.0.port.9.s.17.orderindex=-1 |
unit.2.0.port.9.s.17.visible=1 |
unit.2.0.port.9.s.18.alias= |
unit.2.0.port.9.s.18.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.18.name=TriggerPort9[18] |
unit.2.0.port.9.s.18.orderindex=-1 |
unit.2.0.port.9.s.18.visible=1 |
unit.2.0.port.9.s.19.alias= |
unit.2.0.port.9.s.19.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.19.name=TriggerPort9[19] |
unit.2.0.port.9.s.19.orderindex=-1 |
unit.2.0.port.9.s.19.visible=1 |
unit.2.0.port.9.s.2.alias= |
unit.2.0.port.9.s.2.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.2.name=TriggerPort9[2] |
unit.2.0.port.9.s.2.orderindex=-1 |
unit.2.0.port.9.s.2.visible=1 |
unit.2.0.port.9.s.20.alias= |
unit.2.0.port.9.s.20.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.20.name=TriggerPort9[20] |
unit.2.0.port.9.s.20.orderindex=-1 |
unit.2.0.port.9.s.20.visible=1 |
unit.2.0.port.9.s.21.alias= |
unit.2.0.port.9.s.21.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.21.name=TriggerPort9[21] |
unit.2.0.port.9.s.21.orderindex=-1 |
unit.2.0.port.9.s.21.visible=1 |
unit.2.0.port.9.s.22.alias= |
unit.2.0.port.9.s.22.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.22.name=TriggerPort9[22] |
unit.2.0.port.9.s.22.orderindex=-1 |
unit.2.0.port.9.s.22.visible=1 |
unit.2.0.port.9.s.23.alias= |
unit.2.0.port.9.s.23.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.23.name=TriggerPort9[23] |
unit.2.0.port.9.s.23.orderindex=-1 |
unit.2.0.port.9.s.23.visible=1 |
unit.2.0.port.9.s.24.alias= |
unit.2.0.port.9.s.24.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.24.name=TriggerPort9[24] |
unit.2.0.port.9.s.24.orderindex=-1 |
unit.2.0.port.9.s.24.visible=1 |
unit.2.0.port.9.s.25.alias= |
unit.2.0.port.9.s.25.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.25.name=TriggerPort9[25] |
unit.2.0.port.9.s.25.orderindex=-1 |
unit.2.0.port.9.s.25.visible=1 |
unit.2.0.port.9.s.26.alias= |
unit.2.0.port.9.s.26.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.26.name=TriggerPort9[26] |
unit.2.0.port.9.s.26.orderindex=-1 |
unit.2.0.port.9.s.26.visible=1 |
unit.2.0.port.9.s.27.alias= |
unit.2.0.port.9.s.27.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.27.name=TriggerPort9[27] |
unit.2.0.port.9.s.27.orderindex=-1 |
unit.2.0.port.9.s.27.visible=1 |
unit.2.0.port.9.s.28.alias= |
unit.2.0.port.9.s.28.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.28.name=TriggerPort9[28] |
unit.2.0.port.9.s.28.orderindex=-1 |
unit.2.0.port.9.s.28.visible=1 |
unit.2.0.port.9.s.29.alias= |
unit.2.0.port.9.s.29.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.29.name=TriggerPort9[29] |
unit.2.0.port.9.s.29.orderindex=-1 |
unit.2.0.port.9.s.29.visible=1 |
unit.2.0.port.9.s.3.alias= |
unit.2.0.port.9.s.3.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.3.name=TriggerPort9[3] |
unit.2.0.port.9.s.3.orderindex=-1 |
unit.2.0.port.9.s.3.visible=1 |
unit.2.0.port.9.s.30.alias= |
unit.2.0.port.9.s.30.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.30.name=TriggerPort9[30] |
unit.2.0.port.9.s.30.orderindex=-1 |
unit.2.0.port.9.s.30.visible=1 |
unit.2.0.port.9.s.31.alias= |
unit.2.0.port.9.s.31.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.31.name=TriggerPort9[31] |
unit.2.0.port.9.s.31.orderindex=-1 |
unit.2.0.port.9.s.31.visible=1 |
unit.2.0.port.9.s.4.alias= |
unit.2.0.port.9.s.4.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.4.name=TriggerPort9[4] |
unit.2.0.port.9.s.4.orderindex=-1 |
unit.2.0.port.9.s.4.visible=1 |
unit.2.0.port.9.s.5.alias= |
unit.2.0.port.9.s.5.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.5.name=TriggerPort9[5] |
unit.2.0.port.9.s.5.orderindex=-1 |
unit.2.0.port.9.s.5.visible=1 |
unit.2.0.port.9.s.6.alias= |
unit.2.0.port.9.s.6.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.6.name=TriggerPort9[6] |
unit.2.0.port.9.s.6.orderindex=-1 |
unit.2.0.port.9.s.6.visible=1 |
unit.2.0.port.9.s.7.alias= |
unit.2.0.port.9.s.7.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.7.name=TriggerPort9[7] |
unit.2.0.port.9.s.7.orderindex=-1 |
unit.2.0.port.9.s.7.visible=1 |
unit.2.0.port.9.s.8.alias= |
unit.2.0.port.9.s.8.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.8.name=TriggerPort9[8] |
unit.2.0.port.9.s.8.orderindex=-1 |
unit.2.0.port.9.s.8.visible=1 |
unit.2.0.port.9.s.9.alias= |
unit.2.0.port.9.s.9.color=java.awt.Color[r\=0,g\=0,b\=124] |
unit.2.0.port.9.s.9.name=TriggerPort9[9] |
unit.2.0.port.9.s.9.orderindex=-1 |
unit.2.0.port.9.s.9.visible=1 |
unit.2.0.portcount=16 |
unit.2.0.samplesPerTrigger=1 |
unit.2.0.triggerCapture=1 |
unit.2.0.triggerNSamplesTS=0 |
unit.2.0.triggerPosition=0 |
unit.2.0.triggerWindowCount=1 |
unit.2.0.triggerWindowDepth=1024 |
unit.2.0.triggerWindowTS=0 |
unit.2.0.username=MyILA0 |
unit.2.0.waveform.count=35 |
unit.2.0.waveform.posn.0.channel=2147483646 |
unit.2.0.waveform.posn.0.name=aluo |
unit.2.0.waveform.posn.0.radix=1 |
unit.2.0.waveform.posn.0.type=bus |
unit.2.0.waveform.posn.1.channel=2147483646 |
unit.2.0.waveform.posn.1.name=x |
unit.2.0.waveform.posn.1.radix=1 |
unit.2.0.waveform.posn.1.type=bus |
unit.2.0.waveform.posn.10.channel=2147483646 |
unit.2.0.waveform.posn.10.name=dat_o |
unit.2.0.waveform.posn.10.radix=1 |
unit.2.0.waveform.posn.10.type=bus |
unit.2.0.waveform.posn.100.channel=2147483646 |
unit.2.0.waveform.posn.100.name=adr |
unit.2.0.waveform.posn.100.radix=1 |
unit.2.0.waveform.posn.100.type=bus |
unit.2.0.waveform.posn.101.channel=2147483646 |
unit.2.0.waveform.posn.101.name=adr |
unit.2.0.waveform.posn.101.radix=1 |
unit.2.0.waveform.posn.101.type=bus |
unit.2.0.waveform.posn.102.channel=2147483646 |
unit.2.0.waveform.posn.102.name=adr |
unit.2.0.waveform.posn.102.radix=1 |
unit.2.0.waveform.posn.102.type=bus |
unit.2.0.waveform.posn.103.channel=2147483646 |
unit.2.0.waveform.posn.103.name=adr |
unit.2.0.waveform.posn.103.radix=1 |
unit.2.0.waveform.posn.103.type=bus |
unit.2.0.waveform.posn.104.channel=2147483646 |
unit.2.0.waveform.posn.104.name=adr |
unit.2.0.waveform.posn.104.radix=1 |
unit.2.0.waveform.posn.104.type=bus |
unit.2.0.waveform.posn.105.channel=2147483646 |
unit.2.0.waveform.posn.105.name=adr |
unit.2.0.waveform.posn.105.radix=1 |
unit.2.0.waveform.posn.105.type=bus |
unit.2.0.waveform.posn.106.channel=2147483646 |
unit.2.0.waveform.posn.106.name=adr |
unit.2.0.waveform.posn.106.radix=1 |
unit.2.0.waveform.posn.106.type=bus |
unit.2.0.waveform.posn.107.channel=2147483646 |
unit.2.0.waveform.posn.107.name=adr |
unit.2.0.waveform.posn.107.radix=1 |
unit.2.0.waveform.posn.107.type=bus |
unit.2.0.waveform.posn.108.channel=2147483646 |
unit.2.0.waveform.posn.108.name=adr |
unit.2.0.waveform.posn.108.radix=1 |
unit.2.0.waveform.posn.108.type=bus |
unit.2.0.waveform.posn.109.channel=2147483646 |
unit.2.0.waveform.posn.109.name=adr |
unit.2.0.waveform.posn.109.radix=1 |
unit.2.0.waveform.posn.109.type=bus |
unit.2.0.waveform.posn.11.channel=2147483646 |
unit.2.0.waveform.posn.11.name=imm |
unit.2.0.waveform.posn.11.radix=1 |
unit.2.0.waveform.posn.11.type=bus |
unit.2.0.waveform.posn.110.channel=2147483646 |
unit.2.0.waveform.posn.110.name=adr |
unit.2.0.waveform.posn.110.radix=1 |
unit.2.0.waveform.posn.110.type=bus |
unit.2.0.waveform.posn.111.channel=2147483646 |
unit.2.0.waveform.posn.111.name=adr |
unit.2.0.waveform.posn.111.radix=1 |
unit.2.0.waveform.posn.111.type=bus |
unit.2.0.waveform.posn.112.channel=2147483646 |
unit.2.0.waveform.posn.112.name=adr |
unit.2.0.waveform.posn.112.radix=1 |
unit.2.0.waveform.posn.112.type=bus |
unit.2.0.waveform.posn.113.channel=2147483646 |
unit.2.0.waveform.posn.113.name=adr |
unit.2.0.waveform.posn.113.radix=1 |
unit.2.0.waveform.posn.113.type=bus |
unit.2.0.waveform.posn.114.channel=2147483646 |
unit.2.0.waveform.posn.114.name=adr |
unit.2.0.waveform.posn.114.radix=1 |
unit.2.0.waveform.posn.114.type=bus |
unit.2.0.waveform.posn.115.channel=2147483646 |
unit.2.0.waveform.posn.115.name=adr |
unit.2.0.waveform.posn.115.radix=1 |
unit.2.0.waveform.posn.115.type=bus |
unit.2.0.waveform.posn.116.channel=2147483646 |
unit.2.0.waveform.posn.116.name=adr |
unit.2.0.waveform.posn.116.radix=1 |
unit.2.0.waveform.posn.116.type=bus |
unit.2.0.waveform.posn.117.channel=2147483646 |
unit.2.0.waveform.posn.117.name=adr |
unit.2.0.waveform.posn.117.radix=1 |
unit.2.0.waveform.posn.117.type=bus |
unit.2.0.waveform.posn.118.channel=2147483646 |
unit.2.0.waveform.posn.118.name=adr |
unit.2.0.waveform.posn.118.radix=1 |
unit.2.0.waveform.posn.118.type=bus |
unit.2.0.waveform.posn.119.channel=2147483646 |
unit.2.0.waveform.posn.119.name=adr |
unit.2.0.waveform.posn.119.radix=1 |
unit.2.0.waveform.posn.119.type=bus |
unit.2.0.waveform.posn.12.channel=2147483646 |
unit.2.0.waveform.posn.12.name=pc |
unit.2.0.waveform.posn.12.radix=1 |
unit.2.0.waveform.posn.12.type=bus |
unit.2.0.waveform.posn.120.channel=2147483646 |
unit.2.0.waveform.posn.120.name=adr |
unit.2.0.waveform.posn.120.radix=1 |
unit.2.0.waveform.posn.120.type=bus |
unit.2.0.waveform.posn.121.channel=2147483646 |
unit.2.0.waveform.posn.121.name=adr |
unit.2.0.waveform.posn.121.radix=1 |
unit.2.0.waveform.posn.121.type=bus |
unit.2.0.waveform.posn.122.channel=2147483646 |
unit.2.0.waveform.posn.122.name=adr |
unit.2.0.waveform.posn.122.radix=1 |
unit.2.0.waveform.posn.122.type=bus |
unit.2.0.waveform.posn.123.channel=2147483646 |
unit.2.0.waveform.posn.123.name=adr |
unit.2.0.waveform.posn.123.radix=1 |
unit.2.0.waveform.posn.123.type=bus |
unit.2.0.waveform.posn.124.channel=2147483646 |
unit.2.0.waveform.posn.124.name=adr |
unit.2.0.waveform.posn.124.radix=1 |
unit.2.0.waveform.posn.124.type=bus |
unit.2.0.waveform.posn.125.channel=2147483646 |
unit.2.0.waveform.posn.125.name=adr |
unit.2.0.waveform.posn.125.radix=1 |
unit.2.0.waveform.posn.125.type=bus |
unit.2.0.waveform.posn.126.channel=2147483646 |
unit.2.0.waveform.posn.126.name=adr |
unit.2.0.waveform.posn.126.radix=1 |
unit.2.0.waveform.posn.126.type=bus |
unit.2.0.waveform.posn.127.channel=2147483646 |
unit.2.0.waveform.posn.127.name=adr |
unit.2.0.waveform.posn.127.radix=1 |
unit.2.0.waveform.posn.127.type=bus |
unit.2.0.waveform.posn.128.channel=2147483646 |
unit.2.0.waveform.posn.128.name=adr |
unit.2.0.waveform.posn.128.radix=1 |
unit.2.0.waveform.posn.128.type=bus |
unit.2.0.waveform.posn.129.channel=2147483646 |
unit.2.0.waveform.posn.129.name=adr |
unit.2.0.waveform.posn.129.radix=1 |
unit.2.0.waveform.posn.129.type=bus |
unit.2.0.waveform.posn.13.channel=72 |
unit.2.0.waveform.posn.13.name=ack |
unit.2.0.waveform.posn.13.radix=1 |
unit.2.0.waveform.posn.13.type=signal |
unit.2.0.waveform.posn.130.channel=2147483646 |
unit.2.0.waveform.posn.130.name=adr |
unit.2.0.waveform.posn.130.radix=1 |
unit.2.0.waveform.posn.130.type=bus |
unit.2.0.waveform.posn.14.channel=73 |
unit.2.0.waveform.posn.14.name=stb |
unit.2.0.waveform.posn.14.radix=1 |
unit.2.0.waveform.posn.14.type=signal |
unit.2.0.waveform.posn.15.channel=74 |
unit.2.0.waveform.posn.15.name=cyc |
unit.2.0.waveform.posn.15.radix=1 |
unit.2.0.waveform.posn.15.type=signal |
unit.2.0.waveform.posn.16.channel=75 |
unit.2.0.waveform.posn.16.name=tga |
unit.2.0.waveform.posn.16.radix=1 |
unit.2.0.waveform.posn.16.type=signal |
unit.2.0.waveform.posn.17.channel=76 |
unit.2.0.waveform.posn.17.name=we |
unit.2.0.waveform.posn.17.radix=1 |
unit.2.0.waveform.posn.17.type=signal |
unit.2.0.waveform.posn.18.channel=77 |
unit.2.0.waveform.posn.18.name=clk |
unit.2.0.waveform.posn.18.radix=1 |
unit.2.0.waveform.posn.18.type=signal |
unit.2.0.waveform.posn.19.channel=207 |
unit.2.0.waveform.posn.19.name=flash_ce2_ |
unit.2.0.waveform.posn.19.radix=1 |
unit.2.0.waveform.posn.19.type=signal |
unit.2.0.waveform.posn.2.channel=2147483646 |
unit.2.0.waveform.posn.2.name=y |
unit.2.0.waveform.posn.2.radix=1 |
unit.2.0.waveform.posn.2.type=bus |
unit.2.0.waveform.posn.20.channel=208 |
unit.2.0.waveform.posn.20.name=sram_adv_ |
unit.2.0.waveform.posn.20.radix=1 |
unit.2.0.waveform.posn.20.type=signal |
unit.2.0.waveform.posn.21.channel=209 |
unit.2.0.waveform.posn.21.name=sram_cen_ |
unit.2.0.waveform.posn.21.radix=1 |
unit.2.0.waveform.posn.21.type=signal |
unit.2.0.waveform.posn.22.channel=214 |
unit.2.0.waveform.posn.22.name=sf_we_ |
unit.2.0.waveform.posn.22.radix=1 |
unit.2.0.waveform.posn.22.type=signal |
unit.2.0.waveform.posn.23.channel=215 |
unit.2.0.waveform.posn.23.name=sf_oe_ |
unit.2.0.waveform.posn.23.radix=1 |
unit.2.0.waveform.posn.23.type=signal |
unit.2.0.waveform.posn.24.channel=2147483646 |
unit.2.0.waveform.posn.24.name=s_bw_ |
unit.2.0.waveform.posn.24.radix=1 |
unit.2.0.waveform.posn.24.type=bus |
unit.2.0.waveform.posn.25.channel=2147483646 |
unit.2.0.waveform.posn.25.name=s_data_ |
unit.2.0.waveform.posn.25.radix=1 |
unit.2.0.waveform.posn.25.type=bus |
unit.2.0.waveform.posn.26.channel=2147483646 |
unit.2.0.waveform.posn.26.name=s_addr_ |
unit.2.0.waveform.posn.26.radix=1 |
unit.2.0.waveform.posn.26.type=bus |
unit.2.0.waveform.posn.27.channel=2147483646 |
unit.2.0.waveform.posn.27.name=cnt |
unit.2.0.waveform.posn.27.radix=1 |
unit.2.0.waveform.posn.27.type=bus |
unit.2.0.waveform.posn.28.channel=219 |
unit.2.0.waveform.posn.28.name=op |
unit.2.0.waveform.posn.28.radix=1 |
unit.2.0.waveform.posn.28.type=signal |
unit.2.0.waveform.posn.29.channel=220 |
unit.2.0.waveform.posn.29.name=zbt_stb |
unit.2.0.waveform.posn.29.radix=1 |
unit.2.0.waveform.posn.29.type=signal |
unit.2.0.waveform.posn.3.channel=2147483646 |
unit.2.0.waveform.posn.3.name=io_reg |
unit.2.0.waveform.posn.3.radix=1 |
unit.2.0.waveform.posn.3.type=bus |
unit.2.0.waveform.posn.30.channel=221 |
unit.2.0.waveform.posn.30.name=flash_stb |
unit.2.0.waveform.posn.30.radix=1 |
unit.2.0.waveform.posn.30.type=signal |
unit.2.0.waveform.posn.31.channel=222 |
unit.2.0.waveform.posn.31.name=flash_arena |
unit.2.0.waveform.posn.31.radix=1 |
unit.2.0.waveform.posn.31.type=signal |
unit.2.0.waveform.posn.32.channel=223 |
unit.2.0.waveform.posn.32.name=vdu_arena |
unit.2.0.waveform.posn.32.radix=1 |
unit.2.0.waveform.posn.32.type=signal |
unit.2.0.waveform.posn.33.channel=2147483646 |
unit.2.0.waveform.posn.33.name=cx |
unit.2.0.waveform.posn.33.radix=1 |
unit.2.0.waveform.posn.33.type=bus |
unit.2.0.waveform.posn.34.channel=2147483646 |
unit.2.0.waveform.posn.34.name=di |
unit.2.0.waveform.posn.34.radix=1 |
unit.2.0.waveform.posn.34.type=bus |
unit.2.0.waveform.posn.35.channel=2147483646 |
unit.2.0.waveform.posn.35.name=adr |
unit.2.0.waveform.posn.35.radix=1 |
unit.2.0.waveform.posn.35.type=bus |
unit.2.0.waveform.posn.36.channel=2147483646 |
unit.2.0.waveform.posn.36.name=adr |
unit.2.0.waveform.posn.36.radix=1 |
unit.2.0.waveform.posn.36.type=bus |
unit.2.0.waveform.posn.37.channel=2147483646 |
unit.2.0.waveform.posn.37.name=adr |
unit.2.0.waveform.posn.37.radix=1 |
unit.2.0.waveform.posn.37.type=bus |
unit.2.0.waveform.posn.38.channel=2147483646 |
unit.2.0.waveform.posn.38.name=adr |
unit.2.0.waveform.posn.38.radix=1 |
unit.2.0.waveform.posn.38.type=bus |
unit.2.0.waveform.posn.39.channel=2147483646 |
unit.2.0.waveform.posn.39.name=adr |
unit.2.0.waveform.posn.39.radix=1 |
unit.2.0.waveform.posn.39.type=bus |
unit.2.0.waveform.posn.4.channel=2147483646 |
unit.2.0.waveform.posn.4.name=state |
unit.2.0.waveform.posn.4.radix=1 |
unit.2.0.waveform.posn.4.type=bus |
unit.2.0.waveform.posn.40.channel=2147483646 |
unit.2.0.waveform.posn.40.name=adr |
unit.2.0.waveform.posn.40.radix=1 |
unit.2.0.waveform.posn.40.type=bus |
unit.2.0.waveform.posn.41.channel=2147483646 |
unit.2.0.waveform.posn.41.name=adr |
unit.2.0.waveform.posn.41.radix=1 |
unit.2.0.waveform.posn.41.type=bus |
unit.2.0.waveform.posn.42.channel=2147483646 |
unit.2.0.waveform.posn.42.name=adr |
unit.2.0.waveform.posn.42.radix=1 |
unit.2.0.waveform.posn.42.type=bus |
unit.2.0.waveform.posn.43.channel=2147483646 |
unit.2.0.waveform.posn.43.name=adr |
unit.2.0.waveform.posn.43.radix=1 |
unit.2.0.waveform.posn.43.type=bus |
unit.2.0.waveform.posn.44.channel=2147483646 |
unit.2.0.waveform.posn.44.name=adr |
unit.2.0.waveform.posn.44.radix=1 |
unit.2.0.waveform.posn.44.type=bus |
unit.2.0.waveform.posn.45.channel=2147483646 |
unit.2.0.waveform.posn.45.name=adr |
unit.2.0.waveform.posn.45.radix=1 |
unit.2.0.waveform.posn.45.type=bus |
unit.2.0.waveform.posn.46.channel=2147483646 |
unit.2.0.waveform.posn.46.name=adr |
unit.2.0.waveform.posn.46.radix=1 |
unit.2.0.waveform.posn.46.type=bus |
unit.2.0.waveform.posn.47.channel=2147483646 |
unit.2.0.waveform.posn.47.name=adr |
unit.2.0.waveform.posn.47.radix=1 |
unit.2.0.waveform.posn.47.type=bus |
unit.2.0.waveform.posn.48.channel=2147483646 |
unit.2.0.waveform.posn.48.name=adr |
unit.2.0.waveform.posn.48.radix=1 |
unit.2.0.waveform.posn.48.type=bus |
unit.2.0.waveform.posn.49.channel=2147483646 |
unit.2.0.waveform.posn.49.name=adr |
unit.2.0.waveform.posn.49.radix=1 |
unit.2.0.waveform.posn.49.type=bus |
unit.2.0.waveform.posn.5.channel=2147483646 |
unit.2.0.waveform.posn.5.name=next_state |
unit.2.0.waveform.posn.5.radix=1 |
unit.2.0.waveform.posn.5.type=bus |
unit.2.0.waveform.posn.50.channel=2147483646 |
unit.2.0.waveform.posn.50.name=adr |
unit.2.0.waveform.posn.50.radix=1 |
unit.2.0.waveform.posn.50.type=bus |
unit.2.0.waveform.posn.51.channel=2147483646 |
unit.2.0.waveform.posn.51.name=adr |
unit.2.0.waveform.posn.51.radix=1 |
unit.2.0.waveform.posn.51.type=bus |
unit.2.0.waveform.posn.52.channel=2147483646 |
unit.2.0.waveform.posn.52.name=adr |
unit.2.0.waveform.posn.52.radix=1 |
unit.2.0.waveform.posn.52.type=bus |
unit.2.0.waveform.posn.53.channel=2147483646 |
unit.2.0.waveform.posn.53.name=adr |
unit.2.0.waveform.posn.53.radix=1 |
unit.2.0.waveform.posn.53.type=bus |
unit.2.0.waveform.posn.54.channel=2147483646 |
unit.2.0.waveform.posn.54.name=adr |
unit.2.0.waveform.posn.54.radix=1 |
unit.2.0.waveform.posn.54.type=bus |
unit.2.0.waveform.posn.55.channel=2147483646 |
unit.2.0.waveform.posn.55.name=adr |
unit.2.0.waveform.posn.55.radix=1 |
unit.2.0.waveform.posn.55.type=bus |
unit.2.0.waveform.posn.56.channel=2147483646 |
unit.2.0.waveform.posn.56.name=adr |
unit.2.0.waveform.posn.56.radix=1 |
unit.2.0.waveform.posn.56.type=bus |
unit.2.0.waveform.posn.57.channel=2147483646 |
unit.2.0.waveform.posn.57.name=adr |
unit.2.0.waveform.posn.57.radix=1 |
unit.2.0.waveform.posn.57.type=bus |
unit.2.0.waveform.posn.58.channel=2147483646 |
unit.2.0.waveform.posn.58.name=adr |
unit.2.0.waveform.posn.58.radix=1 |
unit.2.0.waveform.posn.58.type=bus |
unit.2.0.waveform.posn.59.channel=2147483646 |
unit.2.0.waveform.posn.59.name=adr |
unit.2.0.waveform.posn.59.radix=1 |
unit.2.0.waveform.posn.59.type=bus |
unit.2.0.waveform.posn.6.channel=2147483646 |
unit.2.0.waveform.posn.6.name=func |
unit.2.0.waveform.posn.6.radix=1 |
unit.2.0.waveform.posn.6.type=bus |
unit.2.0.waveform.posn.60.channel=2147483646 |
unit.2.0.waveform.posn.60.name=adr |
unit.2.0.waveform.posn.60.radix=1 |
unit.2.0.waveform.posn.60.type=bus |
unit.2.0.waveform.posn.61.channel=2147483646 |
unit.2.0.waveform.posn.61.name=adr |
unit.2.0.waveform.posn.61.radix=1 |
unit.2.0.waveform.posn.61.type=bus |
unit.2.0.waveform.posn.62.channel=2147483646 |
unit.2.0.waveform.posn.62.name=adr |
unit.2.0.waveform.posn.62.radix=1 |
unit.2.0.waveform.posn.62.type=bus |
unit.2.0.waveform.posn.63.channel=2147483646 |
unit.2.0.waveform.posn.63.name=adr |
unit.2.0.waveform.posn.63.radix=1 |
unit.2.0.waveform.posn.63.type=bus |
unit.2.0.waveform.posn.64.channel=2147483646 |
unit.2.0.waveform.posn.64.name=adr |
unit.2.0.waveform.posn.64.radix=1 |
unit.2.0.waveform.posn.64.type=bus |
unit.2.0.waveform.posn.65.channel=2147483646 |
unit.2.0.waveform.posn.65.name=adr |
unit.2.0.waveform.posn.65.radix=1 |
unit.2.0.waveform.posn.65.type=bus |
unit.2.0.waveform.posn.66.channel=2147483646 |
unit.2.0.waveform.posn.66.name=adr |
unit.2.0.waveform.posn.66.radix=1 |
unit.2.0.waveform.posn.66.type=bus |
unit.2.0.waveform.posn.67.channel=2147483646 |
unit.2.0.waveform.posn.67.name=adr |
unit.2.0.waveform.posn.67.radix=1 |
unit.2.0.waveform.posn.67.type=bus |
unit.2.0.waveform.posn.68.channel=2147483646 |
unit.2.0.waveform.posn.68.name=adr |
unit.2.0.waveform.posn.68.radix=1 |
unit.2.0.waveform.posn.68.type=bus |
unit.2.0.waveform.posn.69.channel=2147483646 |
unit.2.0.waveform.posn.69.name=adr |
unit.2.0.waveform.posn.69.radix=1 |
unit.2.0.waveform.posn.69.type=bus |
unit.2.0.waveform.posn.7.channel=2147483646 |
unit.2.0.waveform.posn.7.name=t |
unit.2.0.waveform.posn.7.radix=1 |
unit.2.0.waveform.posn.7.type=bus |
unit.2.0.waveform.posn.70.channel=2147483646 |
unit.2.0.waveform.posn.70.name=adr |
unit.2.0.waveform.posn.70.radix=1 |
unit.2.0.waveform.posn.70.type=bus |
unit.2.0.waveform.posn.71.channel=2147483646 |
unit.2.0.waveform.posn.71.name=adr |
unit.2.0.waveform.posn.71.radix=1 |
unit.2.0.waveform.posn.71.type=bus |
unit.2.0.waveform.posn.72.channel=2147483646 |
unit.2.0.waveform.posn.72.name=adr |
unit.2.0.waveform.posn.72.radix=1 |
unit.2.0.waveform.posn.72.type=bus |
unit.2.0.waveform.posn.73.channel=2147483646 |
unit.2.0.waveform.posn.73.name=adr |
unit.2.0.waveform.posn.73.radix=1 |
unit.2.0.waveform.posn.73.type=bus |
unit.2.0.waveform.posn.74.channel=2147483646 |
unit.2.0.waveform.posn.74.name=adr |
unit.2.0.waveform.posn.74.radix=1 |
unit.2.0.waveform.posn.74.type=bus |
unit.2.0.waveform.posn.75.channel=2147483646 |
unit.2.0.waveform.posn.75.name=adr |
unit.2.0.waveform.posn.75.radix=1 |
unit.2.0.waveform.posn.75.type=bus |
unit.2.0.waveform.posn.76.channel=2147483646 |
unit.2.0.waveform.posn.76.name=adr |
unit.2.0.waveform.posn.76.radix=1 |
unit.2.0.waveform.posn.76.type=bus |
unit.2.0.waveform.posn.77.channel=2147483646 |
unit.2.0.waveform.posn.77.name=adr |
unit.2.0.waveform.posn.77.radix=1 |
unit.2.0.waveform.posn.77.type=bus |
unit.2.0.waveform.posn.78.channel=2147483646 |
unit.2.0.waveform.posn.78.name=adr |
unit.2.0.waveform.posn.78.radix=1 |
unit.2.0.waveform.posn.78.type=bus |
unit.2.0.waveform.posn.79.channel=2147483646 |
unit.2.0.waveform.posn.79.name=adr |
unit.2.0.waveform.posn.79.radix=1 |
unit.2.0.waveform.posn.79.type=bus |
unit.2.0.waveform.posn.8.channel=2147483646 |
unit.2.0.waveform.posn.8.name=adr |
unit.2.0.waveform.posn.8.radix=1 |
unit.2.0.waveform.posn.8.type=bus |
unit.2.0.waveform.posn.80.channel=2147483646 |
unit.2.0.waveform.posn.80.name=adr |
unit.2.0.waveform.posn.80.radix=1 |
unit.2.0.waveform.posn.80.type=bus |
unit.2.0.waveform.posn.81.channel=2147483646 |
unit.2.0.waveform.posn.81.name=adr |
unit.2.0.waveform.posn.81.radix=1 |
unit.2.0.waveform.posn.81.type=bus |
unit.2.0.waveform.posn.82.channel=2147483646 |
unit.2.0.waveform.posn.82.name=adr |
unit.2.0.waveform.posn.82.radix=1 |
unit.2.0.waveform.posn.82.type=bus |
unit.2.0.waveform.posn.83.channel=2147483646 |
unit.2.0.waveform.posn.83.name=adr |
unit.2.0.waveform.posn.83.radix=1 |
unit.2.0.waveform.posn.83.type=bus |
unit.2.0.waveform.posn.84.channel=2147483646 |
unit.2.0.waveform.posn.84.name=adr |
unit.2.0.waveform.posn.84.radix=1 |
unit.2.0.waveform.posn.84.type=bus |
unit.2.0.waveform.posn.85.channel=2147483646 |
unit.2.0.waveform.posn.85.name=adr |
unit.2.0.waveform.posn.85.radix=1 |
unit.2.0.waveform.posn.85.type=bus |
unit.2.0.waveform.posn.86.channel=2147483646 |
unit.2.0.waveform.posn.86.name=adr |
unit.2.0.waveform.posn.86.radix=1 |
unit.2.0.waveform.posn.86.type=bus |
unit.2.0.waveform.posn.87.channel=2147483646 |
unit.2.0.waveform.posn.87.name=adr |
unit.2.0.waveform.posn.87.radix=1 |
unit.2.0.waveform.posn.87.type=bus |
unit.2.0.waveform.posn.88.channel=2147483646 |
unit.2.0.waveform.posn.88.name=adr |
unit.2.0.waveform.posn.88.radix=1 |
unit.2.0.waveform.posn.88.type=bus |
unit.2.0.waveform.posn.89.channel=2147483646 |
unit.2.0.waveform.posn.89.name=adr |
unit.2.0.waveform.posn.89.radix=1 |
unit.2.0.waveform.posn.89.type=bus |
unit.2.0.waveform.posn.9.channel=2147483646 |
unit.2.0.waveform.posn.9.name=dat_i |
unit.2.0.waveform.posn.9.radix=1 |
unit.2.0.waveform.posn.9.type=bus |
unit.2.0.waveform.posn.90.channel=2147483646 |
unit.2.0.waveform.posn.90.name=adr |
unit.2.0.waveform.posn.90.radix=1 |
unit.2.0.waveform.posn.90.type=bus |
unit.2.0.waveform.posn.91.channel=2147483646 |
unit.2.0.waveform.posn.91.name=adr |
unit.2.0.waveform.posn.91.radix=1 |
unit.2.0.waveform.posn.91.type=bus |
unit.2.0.waveform.posn.92.channel=2147483646 |
unit.2.0.waveform.posn.92.name=adr |
unit.2.0.waveform.posn.92.radix=1 |
unit.2.0.waveform.posn.92.type=bus |
unit.2.0.waveform.posn.93.channel=2147483646 |
unit.2.0.waveform.posn.93.name=adr |
unit.2.0.waveform.posn.93.radix=1 |
unit.2.0.waveform.posn.93.type=bus |
unit.2.0.waveform.posn.94.channel=2147483646 |
unit.2.0.waveform.posn.94.name=adr |
unit.2.0.waveform.posn.94.radix=1 |
unit.2.0.waveform.posn.94.type=bus |
unit.2.0.waveform.posn.95.channel=2147483646 |
unit.2.0.waveform.posn.95.name=adr |
unit.2.0.waveform.posn.95.radix=1 |
unit.2.0.waveform.posn.95.type=bus |
unit.2.0.waveform.posn.96.channel=2147483646 |
unit.2.0.waveform.posn.96.name=adr |
unit.2.0.waveform.posn.96.radix=1 |
unit.2.0.waveform.posn.96.type=bus |
unit.2.0.waveform.posn.97.channel=2147483646 |
unit.2.0.waveform.posn.97.name=adr |
unit.2.0.waveform.posn.97.radix=1 |
unit.2.0.waveform.posn.97.type=bus |
unit.2.0.waveform.posn.98.channel=2147483646 |
unit.2.0.waveform.posn.98.name=adr |
unit.2.0.waveform.posn.98.radix=1 |
unit.2.0.waveform.posn.98.type=bus |
unit.2.0.waveform.posn.99.channel=2147483646 |
unit.2.0.waveform.posn.99.name=adr |
unit.2.0.waveform.posn.99.radix=1 |
unit.2.0.waveform.posn.99.type=bus |
/trunk/impl/virtex4-ml403ep/test/flash_dump.v
0,0 → 1,150
//`define HIGH_BIOS 13'h0000 |
`define HIGH_BIOS 13'h00FF |
|
module flash_dump ( |
input sys_clk_in, |
output trx, |
|
output [20:0] flash_addr, |
input [15:0] flash_data, |
output flash_we_n, |
output flash_oe_n, |
output flash_ce2 |
); |
|
reg clk_9600; |
reg [11:0] count_uart; |
reg [ 6:0] dada_wr; |
reg [ 7:0] estat; |
reg [ 7:0] addr; |
reg [ 2:0] espacios; |
reg [ 6:0] char; |
reg [ 3:0] nibble; |
reg [ 7:0] col; |
reg trx_req; |
reg [ 7:0] adr0; |
|
wire clk_60M; |
wire rst, lock; |
wire trx_ack; |
wire [15:0] rd_data; |
|
reg [15:0] ram[0:255]; |
reg [15:0] dades; |
|
reg [ 3:0] count; |
|
// Instanciacions de mòduls |
clocks c0 ( |
.CLKIN_IN (sys_clk_in), |
.CLKFX_OUT (clk_60M), |
.LOCKED_OUT (lock) |
); |
|
uart_ctrl u0 (dada_wr, trx_req, trx_ack, trx, |
rst, clk_9600); |
|
// Assignacions contínues |
assign rst = ~lock; |
|
assign flash_addr = { `HIGH_BIOS, adr0 }; |
assign rd_data = flash_data; |
assign flash_we_n = 1'b1; |
assign flash_oe_n = 1'b0; |
assign flash_ce2 = 1'b1; |
|
// Descripció del comportament |
// count_uart |
always @(posedge clk_60M) |
if (rst) count_uart <= 12'h0; |
else count_uart <= (count_uart==12'd3124) ? |
12'd0 : count_uart + 12'd1; |
|
// clk_9600 |
always @(posedge clk_60M) |
if (rst) clk_9600 <= 1'b0; |
else clk_9600 <= (count_uart==12'd0) ? |
!clk_9600 : clk_9600; |
|
// adr0 |
always @(posedge clk_60M) |
if (rst) adr0 <= 8'h00; |
else adr0 <= (adr0==8'hff || count!=4'hf) ? adr0 |
: (adr0 + 8'h01); |
// count |
always @(posedge clk_60M) |
if (rst) count <= 4'h0; |
else count <= count + 4'h1; |
|
// ram |
always @(posedge clk_60M) ram[adr0] <= rd_data; |
|
// dades |
always @(posedge clk_60M) |
if (rst) dades <= 16'h0; |
else dades <= ram[addr]; |
|
always @(posedge clk_60M) |
if (adr0!=8'hff) |
begin |
dada_wr <= 7'h30; |
trx_req <= 0; |
estat <= 8'd0; |
addr <= 8'h00; |
espacios <= 3'd2; |
char <= 7'd00; |
nibble <= 4'd0; |
col <= 8'd79; |
end |
else |
case (estat) |
8'd00: if (~trx_ack) |
begin estat <= 8'd01; |
if (espacios > 3'd0) |
begin char <= 7'h20; espacios <= espacios - 3'd1; end |
else |
begin |
char <= ascii(nibble); espacios <= 3'd4; |
nibble <= nibble + 4'd1; |
end |
end |
8'd01: begin dada_wr <= char; trx_req <= 1; estat <= 8'd2; end |
8'd02: if (trx_ack) begin trx_req <= 0; estat <= 8'd3; end |
8'd03: if (col > 8'd0) begin col <= col - 8'd1; estat <= 8'd0; end |
else estat <= 8'd04; |
|
8'd04: if (~trx_ack) estat <= 8'd05; |
8'd05: begin dada_wr <= ascii(addr[7:4]); trx_req <= 1; estat <= 8'd10; end |
8'd10: if (trx_ack) begin trx_req <= 0; estat <= 8'd15; end |
|
8'd15: if (~trx_ack) estat <= 8'd20; |
8'd20: begin dada_wr <= ascii(dades[15:12]); trx_req <= 1; estat <= 8'd25; end |
8'd25: if (trx_ack) begin trx_req <= 0; estat <= 8'd30; end |
|
8'd30: if (~trx_ack) estat <= 8'd35; |
8'd35: begin dada_wr <= ascii(dades[11:8]); trx_req <= 1; estat <= 8'd40; end |
8'd40: if (trx_ack) begin trx_req <= 0; estat <= 8'd45; end |
|
8'd45: if (~trx_ack) estat <= 8'd50; |
8'd50: begin dada_wr <= ascii(dades[7:4]); trx_req <= 1; estat <= 8'd55; end |
8'd55: if (trx_ack) begin trx_req <= 0; estat <= 8'd60; end |
|
8'd60: if (~trx_ack) estat <= 8'd65; |
8'd65: begin dada_wr <= ascii(dades[3:0]); trx_req <= 1; estat <= 8'd70; end |
8'd70: if (trx_ack) begin trx_req <= 0; estat <= 8'd75; end |
|
8'd75: if (addr[3:0] == 4'hf) estat <= 8'd90; |
else if (~trx_ack) estat <= 8'd80; |
8'd80: begin dada_wr <= 7'h20; trx_req <= 1; estat <= 8'd85; end |
8'd85: if (trx_ack) begin trx_req <= 0; estat <= 8'd90; end |
|
8'd90: if (addr < 9'h0ff) begin addr <= addr + 8'd1; estat <= 8'd91; end |
else estat <= 8'd95; |
8'd91: estat <= (addr[3:0]==4'h0) ? 8'd4 : 8'd15; |
endcase |
|
function [6:0] ascii(input [3:0] num); |
if (num <= 4'd9) ascii = 7'h30 + num; |
else ascii = 7'd87 + num; |
endfunction |
endmodule |
/trunk/impl/virtex4-ml403ep/test/ml403-flash.ucf
0,0 → 1,56
NET sys_clk_in TNM_NET = "sys_clk_in"; |
TIMESPEC "TSSYSCLK" = PERIOD "sys_clk_in" 9.9 ns HIGH 50 %; |
|
NET sys_clk_in LOC = AE14; |
NET sys_clk_in IOSTANDARD = LVCMOS33; |
|
NET trx LOC = W1; |
|
#NET flash_addr[24] LOC = T21; |
#NET flash_addr[23] LOC = U20; |
#NET flash_addr[22] LOC = T19; |
NET flash_addr[20] LOC = AC5; |
NET flash_addr[19] LOC = AB5; |
NET flash_addr[18] LOC = AC4; |
NET flash_addr[17] LOC = AB4; |
NET flash_addr[16] LOC = AB3; |
NET flash_addr[15] LOC = AA4; |
NET flash_addr[14] LOC = AA3; |
NET flash_addr[13] LOC = W5; |
NET flash_addr[12] LOC = W6; |
NET flash_addr[11] LOC = W3; |
NET flash_addr[10] LOC = AF3; |
NET flash_addr[9] LOC = AE3; |
NET flash_addr[8] LOC = AD2; |
NET flash_addr[7] LOC = AD1; |
NET flash_addr[6] LOC = AC2; |
NET flash_addr[5] LOC = AC1; |
NET flash_addr[4] LOC = AB2; |
NET flash_addr[3] LOC = AB1; |
NET flash_addr[2] LOC = AA1; |
NET flash_addr[1] LOC = Y2; |
NET flash_addr[0] LOC = Y1; |
#NET flash_addr[0] LOC = T20; |
|
NET flash_data[15] LOC = AA14; |
NET flash_data[14] LOC = AB14; |
NET flash_data[13] LOC = AC12; |
NET flash_data[12] LOC = AC11; |
NET flash_data[11] LOC = AA16; |
NET flash_data[10] LOC = AA15; |
NET flash_data[9] LOC = AB13; |
NET flash_data[8] LOC = AA13; |
NET flash_data[7] LOC = AC14; |
NET flash_data[6] LOC = AD14; |
NET flash_data[5] LOC = AA12; |
NET flash_data[4] LOC = AA11; |
NET flash_data[3] LOC = AC16; |
NET flash_data[2] LOC = AC15; |
NET flash_data[1] LOC = AC13; |
NET flash_data[0] LOC = AD13; |
|
NET flash_oe_n LOC = AC6; |
NET flash_we_n LOC = AB6; |
#NET flash_byte_n LOC = N22; |
NET flash_ce2 LOC = W7; |
#NET flash_audio_reset_n LOC = AD10; |
/trunk/impl/virtex4-ml403ep/test/ml403-sram.ucf
0,0 → 1,146
NET sys_clk_in TNM_NET = "sys_clk_in"; |
TIMESPEC "TSSYSCLK" = PERIOD "sys_clk_in" 9.9 ns HIGH 50 %; |
|
NET sys_clk_in LOC = AE14; |
NET sys_clk_in IOSTANDARD = LVCMOS33; |
#NET sys_rst_in LOC = D6; |
#NET sys_rst_in PULLUP; |
#NET sys_rst_in TIG; |
|
NET trx LOC = W1; |
#NET trx IOSTANDARD = LVCMOS33; |
#NET trx TIG; |
|
# GPLED 0-3 |
#NET gpio[0] LOC = G5; #GPLED0 |
#NET gpio[1] LOC = G6; #GPLED1 |
#NET gpio[2] LOC = A11; #GPLED2 |
#NET gpio[3] LOC = A12; #GPLED3 |
# North-East-South-West-Center LEDs |
#NET gpio[4] LOC = C6; # C LED |
#NET gpio[5] LOC = F9; # W LED |
#NET gpio[6] LOC = A5; # S LED |
#NET gpio[7] LOC = E10; # E LED |
#NET gpio[8] LOC = E2; # N LED |
|
#NET "gpio[*]" PULLDOWN; |
#NET "gpio[*]" TIG; |
#NET "gpio[*]" SLEW = SLOW; |
#NET "gpio[*]" DRIVE = 2; |
|
NET "sram_clk" LOC = "AF7" ; #| IOSTANDARD = LVCMOS33 | DRIVE = 16 | SLEW = FAST; |
NET "flash_ce" LOC = "W7" ; #| IOSTANDARD = LVDCI_33; |
|
#NET sram_clk_fb LOC = AD17; |
#NET flash_a23 LOC = T21; |
#NET sram_flash_addr[22] LOC = U20; |
#NET sram_flash_addr[21] LOC = T19; |
NET sram_flash_addr[20] LOC = AC5; |
NET sram_flash_addr[19] LOC = AB5; |
NET sram_flash_addr[18] LOC = AC4; |
NET sram_flash_addr[17] LOC = AB4; |
|
NET sram_flash_addr[16] LOC = AB3; |
NET sram_flash_addr[15] LOC = AA4; |
NET sram_flash_addr[14] LOC = AA3; |
NET sram_flash_addr[13] LOC = W5; |
NET sram_flash_addr[12] LOC = W6; |
NET sram_flash_addr[11] LOC = W3; |
NET sram_flash_addr[10] LOC = AF3; |
NET sram_flash_addr[9] LOC = AE3; |
NET sram_flash_addr[8] LOC = AD2; |
NET sram_flash_addr[7] LOC = AD1; |
NET sram_flash_addr[6] LOC = AC2; |
NET sram_flash_addr[5] LOC = AC1; |
NET sram_flash_addr[4] LOC = AB2; |
NET sram_flash_addr[3] LOC = AB1; |
NET sram_flash_addr[2] LOC = AA1; |
NET sram_flash_addr[1] LOC = Y2; |
NET sram_flash_addr[0] LOC = Y1; |
#NET sram_flash_data[31] LOC = F14; |
#NET sram_flash_data[30] LOC = F13; |
#NET sram_flash_data[29] LOC = F12; |
#NET sram_flash_data[28] LOC = F11; |
#NET sram_flash_data[27] LOC = F16; |
#NET sram_flash_data[26] LOC = F15; |
#NET sram_flash_data[25] LOC = D14; |
#NET sram_flash_data[24] LOC = D13; |
#NET sram_flash_data[23] LOC = D15; |
#NET sram_flash_data[22] LOC = E14; |
#NET sram_flash_data[21] LOC = C11; |
#NET sram_flash_data[20] LOC = D11; |
#NET sram_flash_data[19] LOC = D16; |
#NET sram_flash_data[18] LOC = C16; |
#NET sram_flash_data[17] LOC = E13; |
|
#NET sram_flash_data[16] LOC = D12; |
#NET sram_flash_data[15] LOC = AA14; |
#NET sram_flash_data[14] LOC = AB14; |
#NET sram_flash_data[13] LOC = AC12; |
#NET sram_flash_data[12] LOC = AC11; |
#NET sram_flash_data[11] LOC = AA16; |
#NET sram_flash_data[10] LOC = AA15; |
#NET sram_flash_data[9] LOC = AB13; |
|
NET sram_flash_data[15] LOC = AA14; |
NET sram_flash_data[14] LOC = AB14; |
NET sram_flash_data[13] LOC = AC12; |
NET sram_flash_data[12] LOC = AC11; |
NET sram_flash_data[11] LOC = AA16; |
NET sram_flash_data[10] LOC = AA15; |
NET sram_flash_data[9] LOC = AB13; |
|
NET sram_flash_data[8] LOC = AA13; |
NET sram_flash_data[7] LOC = AC14; |
NET sram_flash_data[6] LOC = AD14; |
NET sram_flash_data[5] LOC = AA12; |
NET sram_flash_data[4] LOC = AA11; |
NET sram_flash_data[3] LOC = AC16; |
NET sram_flash_data[2] LOC = AC15; |
NET sram_flash_data[1] LOC = AC13; |
NET sram_flash_data[0] LOC = AD13; |
NET sram_cen LOC = V7; |
NET sram_flash_oe_n LOC = AC6; |
NET sram_flash_we_n LOC = AB6; |
NET sram_bw[3] LOC = Y3; #Y4; |
NET sram_bw[2] LOC = Y4; #Y3; |
NET sram_bw[1] LOC = Y5; #Y6; |
NET sram_bw[0] LOC = Y6; #Y5; |
#NET sram_adv_ld_n LOC = W4; |
#NET sram_mode LOC = V26; |
|
#NET sram_clk_fb IOSTANDARD = LVCMOS33; |
|
#NET flash_a23 IOSTANDARD = LVDCI_33; |
#NET sram_mode IOSTANDARD = LVDCI_33; |
|
#NET sram_flash_addr[*] IOSTANDARD = LVDCI_33; |
#NET sram_flash_addr[*] SLEW = FAST; |
#NET sram_flash_addr[*] DRIVE = 8; |
|
#NET sram_flash_data[*] IOSTANDARD = LVCMOS33; |
#NET sram_flash_data[*] DRIVE = 12; |
#NET sram_flash_data[*] SLEW = FAST; |
#NET sram_flash_data[*] PULLDOWN; |
|
#NET sram_flash_oe_n IOSTANDARD = LVDCI_33; |
#NET sram_flash_oe_n SLEW = FAST; |
#NET sram_flash_oe_n DRIVE = 8; |
|
#NET sram_flash_we_n IOSTANDARD = LVDCI_33; |
#NET sram_flash_we_n SLEW = FAST; |
#NET sram_flash_we_n DRIVE = 8; |
|
#NET sram_bw[*] IOSTANDARD = LVDCI_33; |
#NET sram_bw[*] SLEW = FAST; |
#NET sram_bw[*] DRIVE = 8; |
|
#NET flash_ce SLEW = FAST; |
#NET flash_ce DRIVE = 8; |
|
#NET sram_cen SLEW = FAST; |
#NET sram_cen DRIVE = 8; |
|
#NET sram_adv_ld_n IOSTANDARD = LVDCI_33; |
#NET sram_adv_ld_n SLEW = FAST; |
#NET sram_adv_ld_n DRIVE = 8; |
/trunk/impl/virtex4-ml403ep/test/sram_dump.v
0,0 → 1,157
`define HIGH_RAM 13'h00fd |
|
module sram_dump ( |
input sys_clk_in, |
output trx, |
|
output sram_clk, |
output [20:0] sram_flash_addr, |
inout [15:0] sram_flash_data, |
output [ 3:0] sram_bw, |
|
output sram_cen, |
output sram_flash_oe_n, |
output sram_flash_we_n, |
output flash_ce |
); |
|
reg clk_9600; |
reg [11:0] count_uart; |
reg [ 6:0] dada_wr; |
reg [ 7:0] estat; |
reg [ 7:0] addr; |
reg [ 2:0] espacios; |
reg [ 6:0] char; |
reg [ 3:0] nibble; |
reg [ 7:0] col; |
reg trx_req; |
reg [ 8:0] adr0; |
|
wire clk_60M; |
wire rst, lock; |
wire trx_ack; |
wire [15:0] rd_data; |
|
reg [15:0] ram[0:255]; |
reg [15:0] dades; |
|
reg [ 3:0] count; |
|
// Instanciacions de mòduls |
clocks c0 ( |
.CLKIN_IN (sys_clk_in), |
.CLKFX_OUT (clk_60M), |
.LOCKED_OUT (lock) |
); |
|
uart_ctrl u0 (dada_wr, trx_req, trx_ack, trx, |
rst, clk_9600); |
|
// Assignacions contínues |
assign rst = ~lock; |
|
assign sram_clk = clk_60M; |
assign sram_flash_addr = { `HIGH_RAM, adr0[7:0] }; |
assign rd_data = sram_flash_data; |
assign sram_bw = 4'b00; |
//assign SRAM_ADV_LB = 1'b0; |
assign sram_cen = 1'b0; |
assign sram_flash_oe_n = 1'b0; |
assign sram_flash_we_n = 1'b1; |
assign flash_ce = 1'b0; |
|
// Descripció del comportament |
// count_uart |
always @(posedge clk_60M) |
if (rst) count_uart <= 12'h0; |
else count_uart <= (count_uart==12'd3124) ? |
12'd0 : count_uart + 12'd1; |
|
// clk_9600 |
always @(posedge clk_60M) |
if (rst) clk_9600 <= 1'b0; |
else clk_9600 <= (count_uart==12'd0) ? |
!clk_9600 : clk_9600; |
|
// adr0 |
always @(posedge clk_60M) |
if (rst) adr0 <= 9'h000; |
else adr0 <= (adr0==9'h1ff || count!=4'hf) ? adr0 |
: (adr0 + 8'h01); |
// count |
always @(posedge clk_60M) |
if (rst) count <= 4'h0; |
else count <= count + 4'h1; |
|
// ram |
always @(posedge clk_60M) ram[adr0] <= rd_data; |
|
// dades |
always @(posedge clk_60M) |
if (rst) dades <= 16'h0; |
else dades <= ram[addr]; |
|
always @(posedge clk_60M) |
if (adr0!=9'h1ff) |
begin |
dada_wr <= 7'h30; |
trx_req <= 0; |
estat <= 8'd0; |
addr <= 8'h00; |
espacios <= 3'd2; |
char <= 7'd00; |
nibble <= 4'd0; |
col <= 8'd79; |
end |
else |
case (estat) |
8'd00: if (~trx_ack) |
begin estat <= 8'd01; |
if (espacios > 3'd0) |
begin char <= 7'h20; espacios <= espacios - 3'd1; end |
else |
begin |
char <= ascii(nibble); espacios <= 3'd4; |
nibble <= nibble + 4'd1; |
end |
end |
8'd01: begin dada_wr <= char; trx_req <= 1; estat <= 8'd2; end |
8'd02: if (trx_ack) begin trx_req <= 0; estat <= 8'd3; end |
8'd03: if (col > 8'd0) begin col <= col - 8'd1; estat <= 8'd0; end |
else estat <= 8'd04; |
|
8'd04: if (~trx_ack) estat <= 8'd05; |
8'd05: begin dada_wr <= ascii(addr[7:4]); trx_req <= 1; estat <= 8'd10; end |
8'd10: if (trx_ack) begin trx_req <= 0; estat <= 8'd15; end |
|
8'd15: if (~trx_ack) estat <= 8'd20; |
8'd20: begin dada_wr <= ascii(dades[15:12]); trx_req <= 1; estat <= 8'd25; end |
8'd25: if (trx_ack) begin trx_req <= 0; estat <= 8'd30; end |
|
8'd30: if (~trx_ack) estat <= 8'd35; |
8'd35: begin dada_wr <= ascii(dades[11:8]); trx_req <= 1; estat <= 8'd40; end |
8'd40: if (trx_ack) begin trx_req <= 0; estat <= 8'd45; end |
|
8'd45: if (~trx_ack) estat <= 8'd50; |
8'd50: begin dada_wr <= ascii(dades[7:4]); trx_req <= 1; estat <= 8'd55; end |
8'd55: if (trx_ack) begin trx_req <= 0; estat <= 8'd60; end |
|
8'd60: if (~trx_ack) estat <= 8'd65; |
8'd65: begin dada_wr <= ascii(dades[3:0]); trx_req <= 1; estat <= 8'd70; end |
8'd70: if (trx_ack) begin trx_req <= 0; estat <= 8'd75; end |
|
8'd75: if (addr[3:0] == 4'hf) estat <= 8'd90; |
else if (~trx_ack) estat <= 8'd80; |
8'd80: begin dada_wr <= 7'h20; trx_req <= 1; estat <= 8'd85; end |
8'd85: if (trx_ack) begin trx_req <= 0; estat <= 8'd90; end |
|
8'd90: if (addr < 9'h0ff) begin addr <= addr + 8'd1; estat <= 8'd91; end |
else estat <= 8'd95; |
8'd91: estat <= (addr[3:0]==4'h0) ? 8'd4 : 8'd15; |
endcase |
|
function [6:0] ascii(input [3:0] num); |
if (num <= 4'd9) ascii = 7'h30 + num; |
else ascii = 7'd87 + num; |
endfunction |
endmodule |
/trunk/impl/virtex4-ml403ep/lcd/test_lcd_cntrl.v
0,0 → 1,26
module lcd_test ( |
// Pad signals |
input sys_clk_in_, |
output rs_, |
output rw_, |
output e_, |
inout [7:4] db_, |
input but_ |
); |
|
// Module instantiations |
lcd_display lcd0 ( |
.clk (sys_clk_in_), |
.rst (but_), |
.f1 (64'h123456f890abcde7), |
.f2 (64'h7645321dcbaef987), |
.m1 (16'b0101011101011111), |
.m2 (16'b1110101110101111), |
|
.lcd_rs_ (rs_), |
.lcd_rw_ (rw_), |
.lcd_e_ (e_), |
.lcd_dat_(db_) |
); |
|
endmodule |
/trunk/impl/virtex4-ml403ep/lcd/lcd_display.v
0,0 → 1,136
module lcd_display ( |
input [63:0] f1, // 1st row |
input [63:0] f2, // 2nd row |
input [15:0] m1, // 1st row mask |
input [15:0] m2, // 2nd row mask |
|
input clk, // 100 Mhz clock |
input rst, |
|
// Pad signals |
output reg lcd_rs_, |
output reg lcd_rw_, |
output reg lcd_e_, |
output reg [7:4] lcd_dat_ |
); |
|
// Parameter definitions |
parameter n = 8; |
parameter k = 16; |
|
// Register declarations |
reg [k+n+1:0] cnt = 0; |
reg [ 5:0] lcd; |
|
// Net declarations |
wire [127:0] f; |
wire [ 31:0] m; |
wire [ 4:0] i; |
wire [ 3:0] c; |
|
// Module instantiations |
sel128_4 sel ( |
.in (f), |
.sel (i), |
.out (c) |
); |
|
// Continuous assignments |
assign f = { f1, f2 }; |
assign m = { m1, m2 }; |
assign i = cnt[k+7:k+3]; |
|
// Behaviour |
always @(posedge clk) |
if (rst) cnt <= 26'hfffffff; |
else begin |
cnt <= cnt - 1; |
casex (cnt[k+1+n:k+2]) |
8'hff: lcd <= 6'b000010; // function set |
8'hfe: lcd <= 6'b000010; |
8'hfd: lcd <= 6'b001000; |
8'hfc: lcd <= 6'b000000; // display on/off control |
8'hfb: lcd <= 6'b001100; |
8'hfa: lcd <= 6'b000000; // display clear |
8'hf9: lcd <= 6'b000001; |
8'hf8: lcd <= 6'b000000; // entry mode set |
8'hf7: lcd <= 6'b000110; |
8'hf6: cnt[k+1+n:k+2] <= 8'b10111111; |
|
8'b101xxxx1: lcd <= { 2'b10, m[i] ? itoa1(c) : 4'h2 }; |
8'b101xxxx0: lcd <= { 2'b10, m[i] ? itoa0(c) : 4'h0 }; |
8'b10011111: lcd <= 6'h0c; |
8'b10011110: lcd <= 6'h00; |
8'b10011101: cnt[k+1+n:k+2] <= 8'b01011111; |
8'b010xxxx1: lcd <= { 2'b10, m[i] ? itoa1(c) : 4'h2 }; |
8'b010xxxx0: lcd <= { 2'b10, m[i] ? itoa0(c) : 4'h0 }; |
8'b00111111: lcd <= 6'h08; |
8'b00111110: lcd <= 6'h00; |
8'b00111101: cnt[k+1+n:k+2] <= 8'b10111111; |
|
default: lcd <= 6'b010000; |
endcase |
lcd_e_ <= ^cnt[k+1:k+0] & ~lcd_rw_; |
{ lcd_rs_, lcd_rw_, lcd_dat_ } <= lcd; |
end |
|
// Function definitions |
function [3:0] itoa1; |
input [3:0] i; |
begin |
if (i < 8'd10) itoa1 = 4'h3; |
else itoa1 = 4'h6; |
end |
endfunction |
|
function [3:0] itoa0; |
input [3:0] i; |
begin |
if (i < 8'd10) itoa0 = i + 4'h0; |
else itoa0 = i + 4'h7; |
end |
endfunction |
endmodule |
|
module sel128_4 ( |
input [127:0] in, |
input [ 4:0] sel, |
output reg [ 3:0] out |
); |
|
always @(in or sel) |
case (sel) |
5'h00: out <= in[ 3: 0]; |
5'h01: out <= in[ 7: 4]; |
5'h02: out <= in[ 11: 8]; |
5'h03: out <= in[ 15: 12]; |
5'h04: out <= in[ 19: 16]; |
5'h05: out <= in[ 23: 20]; |
5'h06: out <= in[ 27: 24]; |
5'h07: out <= in[ 31: 28]; |
5'h08: out <= in[ 35: 32]; |
5'h09: out <= in[ 39: 36]; |
5'h0a: out <= in[ 43: 40]; |
5'h0b: out <= in[ 47: 44]; |
5'h0c: out <= in[ 51: 48]; |
5'h0d: out <= in[ 55: 52]; |
5'h0e: out <= in[ 59: 56]; |
5'h0f: out <= in[ 63: 60]; |
5'h10: out <= in[ 67: 64]; |
5'h11: out <= in[ 71: 68]; |
5'h12: out <= in[ 75: 72]; |
5'h13: out <= in[ 79: 76]; |
5'h14: out <= in[ 83: 80]; |
5'h15: out <= in[ 87: 84]; |
5'h16: out <= in[ 91: 88]; |
5'h17: out <= in[ 95: 92]; |
5'h18: out <= in[ 99: 96]; |
5'h19: out <= in[103:100]; |
5'h1a: out <= in[107:104]; |
5'h1b: out <= in[111:108]; |
5'h1c: out <= in[115:112]; |
5'h1d: out <= in[119:116]; |
5'h1e: out <= in[123:120]; |
5'h1f: out <= in[127:124]; |
endcase |
endmodule |
/trunk/impl/virtex4-ml403ep/lcd/ml403.ucf
0,0 → 1,16
NET sys_clk_in_ TNM_NET = "sys_clk_in_"; |
TIMESPEC "TSSYSCLK" = PERIOD "sys_clk_in_" 9.9 ns HIGH 50 %; |
|
NET sys_clk_in_ LOC = AE14; |
NET sys_clk_in_ IOSTANDARD = LVCMOS33; |
|
NET e_ LOC = AE13 | IOSTANDARD = LVCMOS33 | TIG; # LCD_E |
NET rs_ LOC = AC17 | IOSTANDARD = LVCMOS33 | TIG; # LCD_RS |
NET rw_ LOC = AB17 | IOSTANDARD = LVCMOS33 | TIG; # LCD_RW |
|
NET db_[7] LOC = AF12 | IOSTANDARD = LVCMOS33 | TIG; # LCD_DB7 |
NET db_[6] LOC = AE12 | IOSTANDARD = LVCMOS33 | TIG; # LCD_DB6 |
NET db_[5] LOC = AC10 | IOSTANDARD = LVCMOS33 | TIG; # LCD_DB5 |
NET db_[4] LOC = AB10 | IOSTANDARD = LVCMOS33 | TIG; # LCD_DB4 |
|
NET but_ LOC = B6; # C Button |
/trunk/impl/virtex4-ml403ep/ace/ml40x_bit2ace.bat
0,0 → 1,13
echo off |
if exist tmp_ml40x____datafile.bit del tmp_ml40x____datafile.bit |
if exist tmp_ml40x____datafile.ace del tmp_ml40x____datafile.ace |
copy /Y %XILINX%\xcfp\data\xcf32p_vo48.bsd . |
copy /Y %XILINX%\xc9500xl\data\xc95144xl_tq100.bsd . |
copy /Y %1 tmp_ml40x____datafile.bit |
impact -batch ml40x.scr |
impact -batch ml40x_svf2ace.scr |
if exist tmp_ml40x____datafile.bit del tmp_ml40x____datafile.bit |
if exist tmp_ml40x____datafile.svf del tmp_ml40x____datafile.svf |
if exist %2 del %2 |
if exist tmp_ml40x____datafile.ace ren tmp_ml40x____datafile.ace %2 |
echo on |
/trunk/impl/virtex4-ml403ep/ace/ml40x_svf2ace.scr
0,0 → 1,7
setMode -cf |
svf2ace -wtck -d -i tmp_ml40x____datafile.svf -o tmp_ml40x____datafile.ace |
quit |
|
|
|
|
/trunk/impl/virtex4-ml403ep/ace/ml40x.scr
0,0 → 1,11
setmode -bs |
setCable -p svf -file tmp_ml40x____datafile.svf |
addDevice -p 1 -file xcf32p_vo48.bsd |
addDevice -p 2 -file tmp_ml40x____datafile.bit |
addDevice -p 3 -file xc95144xl_tq100.bsd |
program -p 2 |
quit |
|
|
|
|
/trunk/impl/virtex4-ml403ep/ace/ml40x_bit2ace
0,0 → 1,11
#!/bin/sh |
rm -f tmp_ml40x____datafile.ace |
cp -f $XILINX/xcfp/data/xcf32p_vo48.bsd . |
cp -f $XILINX/xc9500xl/data/xc95144xl_tq100.bsd . |
cp -f $1 tmp_ml40x____datafile.bit |
$XILINX/bin/lin64/impact -batch $3/ml40x.scr |
$XILINX/bin/lin64/impact -batch $3/ml40x_svf2ace.scr |
rm -f tmp_ml40x____datafile.bit |
rm -f tmp_ml40x____datafile.svf |
rm -f $2 |
mv -f tmp_ml40x____datafile.ace $2 |
trunk/impl/virtex4-ml403ep/ace/ml40x_bit2ace
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/impl/virtex4-ml403ep/sim/test_kotku.v
===================================================================
--- trunk/impl/virtex4-ml403ep/sim/test_kotku.v (nonexistent)
+++ trunk/impl/virtex4-ml403ep/sim/test_kotku.v (revision 39)
@@ -0,0 +1,75 @@
+`timescale 1ns/10ps
+
+module testbench;
+
+ // Net and register declarations
+ wire lcd_clk;
+ wire [ 1:0] lcd_r, lcd_g, lcd_b;
+ wire lcd_hsync;
+ wire lcd_vsync;
+ reg clk;
+ wire s_clk;
+ wire [20:0] sf_addr;
+ wire [15:0] sf_data;
+ wire sf_oe;
+ wire sf_we;
+ wire [ 3:0] s_bw;
+ wire s_ce;
+ wire s_adv;
+ wire f_ce;
+
+ // Module instances
+ kotku_ml403 kotku (
+ .tft_lcd_clk_ (lcd_clk),
+ .tft_lcd_r_ (lcd_r),
+ .tft_lcd_g_ (lcd_g),
+ .tft_lcd_b_ (lcd_b),
+ .tft_lcd_hsync_ (lcd_hsync),
+ .tft_lcd_vsync_ (lcd_vsync),
+
+ .sys_clk_in_ (clk),
+
+ .sram_clk_ (s_clk),
+ .sram_flash_addr_ (sf_addr),
+ .sram_flash_data_ (sf_data),
+ .sram_flash_oe_n_ (sf_oe),
+ .sram_flash_we_n_ (sf_we),
+ .sram_bw_ (s_bw),
+ .sram_cen_ (s_ce),
+ .sram_adv_ld_n_ (s_adv),
+ .flash_ce2_ (f_ce)
+ );
+
+ flash_stub fs0 (
+ .flash_addr_ (sf_addr),
+ .flash_data_ (sf_data),
+ .flash_oe_n_ (sf_oe),
+ .flash_we_n_ (sf_we),
+ .flash_ce2_ (f_ce)
+ );
+
+ cy7c1354 zbt (
+ .d (sf_data),
+ .clk (s_clk),
+ .a (sf_addr[17:0]),
+ .bws (s_bw),
+ .we_b (sf_we),
+ .adv_lb (s_adv),
+ .ce1b (s_ce),
+ .ce2 (1'b1),
+ .ce3b (1'b0),
+ .oeb (sf_oe),
+ .cenb (1'b0),
+ .mode (1'b0)
+ );
+
+ // Behaviour
+ // Clock generation
+ always #5 clk = ~clk;
+
+ initial
+ begin
+ clk <= 1'b1;
+ end
+
+endmodule
Index: trunk/impl/virtex4-ml403ep/sim/s.do
===================================================================
--- trunk/impl/virtex4-ml403ep/sim/s.do (nonexistent)
+++ trunk/impl/virtex4-ml403ep/sim/s.do (revision 39)
@@ -0,0 +1,48 @@
+vsim -L /opt/Xilinx/10.1/modelsim/verilog/unisims -novopt -t ps work.testbench work.glbl
+add wave -label clk100 /testbench/clk
+add wave -label clk /testbench/kotku/clk
+add wave -label rst /testbench/kotku/rst
+add wave -label pc -radix hexadecimal /testbench/kotku/zet_proc/fetch0/pc
+add wave -divider fetch
+add wave -label state -radix hexadecimal /testbench/kotku/zet_proc/fetch0/state
+add wave -label next_state -radix hexadecimal /testbench/kotku/zet_proc/fetch0/next_state
+add wave -label opcode -radix hexadecimal /testbench/kotku/zet_proc/fetch0/opcode
+add wave -label modrm -radix hexadecimal /testbench/kotku/zet_proc/fetch0/modrm
+add wave -label seq_addr /testbench/kotku/zet_proc/fetch0/decode0/seq_addr
+add wave -label end_seq /testbench/kotku/zet_proc/fetch0/end_seq
+add wave -label need_modrm /testbench/kotku/zet_proc/fetch0/need_modrm
+add wave -label need_off /testbench/kotku/zet_proc/fetch0/need_off
+add wave -label need_imm /testbench/kotku/zet_proc/fetch0/need_imm
+add wave -label ir /testbench/kotku/zet_proc/fetch0/ir
+add wave -label imm -radix hexadecimal /testbench/kotku/zet_proc/fetch0/imm
+add wave -label off -radix hexadecimal /testbench/kotku/zet_proc/fetch0/off
+add wave -divider mem
+add wave -label cs -radix hexadecimal /testbench/kotku/zet_proc/wm0/cs
+add wave -label op -radix hexadecimal /testbench/kotku/zet_proc/wm0/op
+add wave -label block /testbench/kotku/zet_proc/wm0/cpu_block
+add wave -label dat_o -radix hexadecimal sim:/testbench/kotku/dat_o
+add wave -label dat_i -radix hexadecimal sim:/testbench/kotku/dat_i
+add wave -label adr -radix hexadecimal /testbench/kotku/adr
+add wave -label byte_o -radix hexadecimal /testbench/kotku/zet_proc/wm0/cpu_byte_o
+add wave -label sel_o -radix hexadecimal /testbench/kotku/zet_proc/wm0/wb_sel_o
+add wave -label stb_o -radix hexadecimal /testbench/kotku/zet_proc/wm0/wb_stb_o
+add wave -label cyc_o -radix hexadecimal /testbench/kotku/zet_proc/wm0/wb_cyc_o
+add wave -label ack_i -radix hexadecimal /testbench/kotku/zet_proc/wm0/wb_ack_i
+add wave -label we_o -radix hexadecimal /testbench/kotku/zet_proc/wm0/wb_we_o
+add wave -label tga_o -radix hexadecimal /testbench/kotku/zet_proc/wm0/wb_tga_o
+add wave -label cpu_dat_i -radix hexadecimal /testbench/kotku/zet_proc/wm0/cpu_dat_i
+add wave -divider alu
+add wave -label x -radix hexadecimal /testbench/kotku/zet_proc/exec0/a
+add wave -label y -radix hexadecimal /testbench/kotku/zet_proc/exec0/bus_b
+add wave -label t -radix hexadecimal /testbench/kotku/zet_proc/exec0/alu0/t
+add wave -label func -radix hexadecimal /testbench/kotku/zet_proc/exec0/alu0/func
+add wave -label r\[1\] -radix hexadecimal /testbench/kotku/zet_proc/exec0/reg0/r\[1\]
+add wave -label d -radix hexadecimal /testbench/kotku/zet_proc/exec0/reg0/d
+add wave -label addr_a /testbench/kotku/zet_proc/exec0/reg0/addr_a
+add wave -label addr_d /testbench/kotku/zet_proc/exec0/reg0/addr_d
+add wave -label wr /testbench/kotku/zet_proc/exec0/reg0/wr
+add wave -label we /testbench/kotku/we
+add wave -label ack /testbench/kotku/ack
+add wave -label fetch_or_exec /testbench/kotku/zet_proc/fetch_or_exec
+add memory /testbench/zbt/mem
+run 3ms
Index: trunk/impl/virtex4-ml403ep/sim/t.do
===================================================================
--- trunk/impl/virtex4-ml403ep/sim/t.do (nonexistent)
+++ trunk/impl/virtex4-ml403ep/sim/t.do (revision 39)
@@ -0,0 +1,54 @@
+vdel -all -lib work
+vmap unisims /opt/Xilinx/10.1/modelsim/verilog/unisims
+vlib work
+vlog -work work -lint +incdir+../../../rtl-model +incdir+../../../sim ../kotku.v ../clock.v ../../../rtl-model/regfile.v ../../../rtl-model/alu.v ../../../rtl-model/cpu.v ../../../rtl-model/exec.v ../../../rtl-model/fetch.v ../../../rtl-model/jmp_cond.v ../../../rtl-model/util/primitives.v ../../../rtl-model/util/div_su.v ../../../rtl-model/util/div_uu.v ../../../rtl-model/rotate.v test_kotku.v flash_stub.v ../../../sim/mult.v ../../../soc/vga/vdu.v ../../../soc/vga/char_rom_b16.v ../../../soc/vga/ram2k_b16_attr.v ../../../soc/vga/ram2k_b16.v ../memory/flash_cntrl.v ../memory/zbt_cntrl.v CY7C1354BV25.v
+vlog -work unisims /opt/Xilinx/10.1/ISE/verilog/src/glbl.v
+vsim -L /opt/Xilinx/10.1/modelsim/verilog/unisims -novopt -t ps work.testbench work.glbl
+add wave -label clk100 /testbench/clk
+add wave -label clk /testbench/kotku/clk
+add wave -label rst /testbench/kotku/rst
+add wave -label pc -radix hexadecimal /testbench/kotku/zet_proc/fetch0/pc
+add wave -divider fetch
+add wave -label state -radix hexadecimal /testbench/kotku/zet_proc/fetch0/state
+add wave -label next_state -radix hexadecimal /testbench/kotku/zet_proc/fetch0/next_state
+add wave -label opcode -radix hexadecimal /testbench/kotku/zet_proc/fetch0/opcode
+add wave -label modrm -radix hexadecimal /testbench/kotku/zet_proc/fetch0/modrm
+add wave -label seq_addr /testbench/kotku/zet_proc/fetch0/decode0/seq_addr
+add wave -label end_seq /testbench/kotku/zet_proc/fetch0/end_seq
+add wave -label need_modrm /testbench/kotku/zet_proc/fetch0/need_modrm
+add wave -label need_off /testbench/kotku/zet_proc/fetch0/need_off
+add wave -label need_imm /testbench/kotku/zet_proc/fetch0/need_imm
+add wave -label ir /testbench/kotku/zet_proc/fetch0/ir
+add wave -label imm -radix hexadecimal /testbench/kotku/zet_proc/fetch0/imm
+add wave -label off -radix hexadecimal /testbench/kotku/zet_proc/fetch0/off
+add wave -divider mem
+add wave -label cs -radix hexadecimal /testbench/kotku/zet_proc/wm0/cs
+add wave -label op -radix hexadecimal /testbench/kotku/zet_proc/wm0/op
+add wave -label block /testbench/kotku/zet_proc/wm0/cpu_block
+add wave -label dat_o -radix hexadecimal sim:/testbench/kotku/dat_o
+add wave -label dat_i -radix hexadecimal sim:/testbench/kotku/dat_i
+add wave -label adr -radix hexadecimal /testbench/kotku/adr
+add wave -label byte_o -radix hexadecimal /testbench/kotku/zet_proc/wm0/cpu_byte_o
+add wave -label sel_o -radix hexadecimal /testbench/kotku/zet_proc/wm0/wb_sel_o
+add wave -label stb_o -radix hexadecimal /testbench/kotku/zet_proc/wm0/wb_stb_o
+add wave -label cyc_o -radix hexadecimal /testbench/kotku/zet_proc/wm0/wb_cyc_o
+add wave -label ack_i -radix hexadecimal /testbench/kotku/zet_proc/wm0/wb_ack_i
+add wave -label we_o -radix hexadecimal /testbench/kotku/zet_proc/wm0/wb_we_o
+add wave -label tga_o -radix hexadecimal /testbench/kotku/zet_proc/wm0/wb_tga_o
+add wave -label cpu_dat_i -radix hexadecimal /testbench/kotku/zet_proc/wm0/cpu_dat_i
+add wave -divider alu
+add wave -label x -radix hexadecimal /testbench/kotku/zet_proc/exec0/a
+add wave -label y -radix hexadecimal /testbench/kotku/zet_proc/exec0/bus_b
+add wave -label t -radix hexadecimal /testbench/kotku/zet_proc/exec0/alu0/t
+add wave -label func -radix hexadecimal /testbench/kotku/zet_proc/exec0/alu0/func
+add wave -label r\[1\] -radix hexadecimal /testbench/kotku/zet_proc/exec0/reg0/r\[1\]
+add wave -label d -radix hexadecimal /testbench/kotku/zet_proc/exec0/reg0/d
+add wave -label addr_a /testbench/kotku/zet_proc/exec0/reg0/addr_a
+add wave -label addr_d /testbench/kotku/zet_proc/exec0/reg0/addr_d
+add wave -label wr /testbench/kotku/zet_proc/exec0/reg0/wr
+add wave -label we /testbench/kotku/we
+add wave -label ack /testbench/kotku/ack
+add wave -label fetch_or_exec /testbench/kotku/zet_proc/fetch_or_exec
+add wave -divider zbt
+add wave -radix hexadecimal /testbench/kotku/vdu0/*
+run 50us
Index: trunk/impl/virtex4-ml403ep/sim/CY7C1354BV25.v
===================================================================
--- trunk/impl/virtex4-ml403ep/sim/CY7C1354BV25.v (nonexistent)
+++ trunk/impl/virtex4-ml403ep/sim/CY7C1354BV25.v (revision 39)
@@ -0,0 +1,487 @@
+//************************************************************************
+//************************************************************************
+//** This model is the property of Cypress Semiconductor Corp and is **
+//** protected by the US copyright laws, any unauthorized copying and **
+//** distribution is prohibited. Cypress reserves the right to change **
+//** any of the functional specifications without any prior notice. **
+//** Cypress is not liable for any damages which may result from the **
+//** use of this functional model. **
+//** **
+//** File Name : CY7C1354BV25 **
+//** **
+//** Revision : 1.1 - 01/30/2004 **
+//** **
+//** The timings are to be selected by the user depending upon the **
+//** frequency of operation from the datasheet. **
+//** **
+//** Model : CY7C1354BV25 - 256K x 36 NoBL Pipelined SRAM **
+//** Queries : MPD Applications **
+//** e-mail: mpd_apps@cypress.com **
+//************************************************************************
+//************************************************************************
+
+`timescale 1ns / 10ps
+
+// NOTE : Any setup/hold errors will force input signal to x state
+// or if results indeterminant (write addr) core is reset x
+
+// define fixed values
+
+`define wordsize (36 -1) //
+`define no_words (262144 -1) // 256K x 36 RAM
+
+module cy7c1354 ( d, clk, a, bws, we_b, adv_lb, ce1b, ce2, ce3b, oeb, cenb, mode);
+
+inout [31:0] d;
+input clk, // clock input (R)
+ we_b, // byte write enable(L)
+ adv_lb, // burst(H)/load(L) address
+ ce1b, // chip enable(L)
+ ce2, // chip enable(H)
+ ce3b, // chip enable(L)
+ oeb, // async output enable(L)(read)
+ cenb, // clock enable(L)
+ mode; // interleave(H)/linear(L) burst
+input [3:0] bws; // byte write select(L)
+input [18:0] a; // address bus
+
+// *** NOTE DEVICE OPERATES #0.01 AFTER CLOCK ***
+// *** THEREFORE DELAYS HAVE TO TAKE THIS INTO ACCOUNT ***
+
+//**********************************************************************
+// This model is configured for 166 MHz Operation (CY7C1354-166).
+//**********************************************************************
+ `define teohz #3.5
+ `define teolz #0
+ `define tchz #3.5
+ `define tclz #1.5
+
+ `define tco #3.5
+ `define tdoh #1.5
+
+ `define tas 1.5
+ `define tah 0.5
+
+/**********************************************************************
+// Timings for 225MHz
+//**********************************************************************
+ `define teohz #2.8
+ `define teolz #0
+ `define tchz #2.8
+ `define tclz #1.25
+
+ `define tco #2.8
+ `define tdoh #1.25
+
+ `define tas 1.4
+ `define tah 0.4
+
+//***********************************************************************
+// Timings for 200MHz
+//**********************************************************************
+ `define teohz #3.2
+ `define teolz #0
+ `define tchz #3.2
+ `define tclz #1.5
+
+ `define tco #3.2
+ `define tdoh #1.5
+
+ `define tas 1.5
+ `define tah 0.5
+***********************************************************************/
+
+reg notifier; // error support reg's
+reg noti1_0;
+reg noti1_1;
+reg noti1_2;
+reg noti1_3;
+reg noti1_4;
+reg noti1_5;
+reg noti1_6;
+reg noti2;
+
+
+wire chipen; // combined chip enable (high for an active chip)
+
+reg chipen_d; // _d = delayed
+reg chipen_o; // _o = operational = delayed sig or _d sig
+
+wire writestate; // holds 1 if any of writebus is low
+reg writestate_d;
+reg writestate_o;
+
+wire loadcyc; // holds 1 for load cycles (setup and hold checks)
+wire writecyc; // holds 1 for write cycles (setup and hold checks)
+wire [3:0] bws; // holds the bws values
+
+wire [3:0] writebusb; // holds the "internal" bws bus based on we_b
+reg [3:0] writebusb_d;
+reg [3:0] writebusb_o;
+
+wire [2:0] operation; // holds chipen, adv_ld and writestate
+reg [2:0] operation_d;
+reg [2:0] operation_o;
+
+wire [17:0] a; // address input bus
+reg [17:0] a_d;
+reg [17:0] a_o;
+
+reg [`wordsize:0] do; // data output reg
+reg [`wordsize:0] di; // data input bus
+reg [`wordsize:0] dd; // data delayed bus
+
+wire tristate; // tristate output (on a bytewise basis) when asserted
+reg cetri; // register set by chip disable which sets the tristate
+reg oetri; // register set by oe which sets the tristate
+reg enable; // register to make the ram enabled when equal to 1
+reg [17:0] addreg; // register to hold the input address
+reg [`wordsize:0] pipereg; // register for the output data
+
+reg [`wordsize:0] mem [0:`no_words]; // RAM array
+
+reg [`wordsize:0] writeword; // temporary holding register for the write data
+reg burstinit; // register to hold a[0] for burst type
+reg [18:0] i; // temporary register used to write to all mem locs.
+reg writetri; // tristate
+reg lw, bw; // pipelined write functions
+reg we_bl;
+
+
+wire [31:0] d = !tristate ?
+ {do[34:27],do[25:18],do[16:9],do[7:0]}
+ : 32'bz ; // data bus
+
+assign chipen = (adv_lb == 1 ) ? chipen_d :
+ ~ce1b & ce2 & ~ce3b ;
+
+assign writestate = ~& writebusb;
+
+assign operation = {chipen, adv_lb, writestate};
+
+assign writebusb[3:0] = ( we_b ==0 & adv_lb ==0) ? bws[3:0]:
+ ( we_b ==1 & adv_lb ==0) ? 4'b1111 :
+ ( we_bl ==0 & adv_lb ==1) ? bws[3:0]:
+ ( we_bl ==1 & adv_lb ==1) ? 4'b1111 :
+ 4'bxxxx ;
+
+assign loadcyc = chipen & !cenb;
+
+assign writecyc = writestate_d & enable & ~cenb & chipen; // check
+
+assign tristate = cetri | writetri | oetri;
+
+pullup (mode);
+
+// formers for notices/errors etc
+//
+//$display("NOTICE : xxx :");
+//$display("WARNING : xxx :");
+//$display("ERROR *** : xxx :");
+
+
+// initialize the output to be tri-state, ram to be disabled
+
+initial
+ begin
+// signals
+
+ writetri = 0;
+ cetri = 1;
+ enable = 0;
+ lw = 0;
+ bw = 0;
+
+// error signals
+
+ notifier = 0;
+ noti1_0 = 0;
+ noti1_1 = 0;
+ noti1_2 = 0;
+ noti1_3 = 0;
+ noti1_4 = 0;
+ noti1_5 = 0;
+ noti1_6 = 0;
+ noti2 = 0;
+
+end
+
+
+
+// asynchronous OE
+
+always @(oeb)
+begin
+ if (oeb == 1)
+ oetri <= `teohz 1;
+ else
+ oetri <= `teolz 0;
+end
+
+// *** SETUP / HOLD VIOLATIONS ***
+
+always @(noti2)
+begin
+$display("NOTICE : 020 : Data bus corruption");
+ force d =36'bx;
+ #1;
+ release d;
+end
+
+always @(noti1_0)
+begin
+$display("NOTICE : 010 : Byte write corruption");
+ force bws = 4'bx;
+ #1;
+ release bws;
+end
+
+always @(noti1_1)
+begin
+$display("NOTICE : 011 : Byte enable corruption");
+ force we_b = 1'bx;
+ #1;
+ release we_b;
+end
+
+always @(noti1_2)
+begin
+$display("NOTICE : 012 : CE1B corruption");
+ force ce1b =1'bx;
+ #1;
+ release ce1b;
+end
+
+always @(noti1_3)
+begin
+$display("NOTICE : 013 : CE2 corruption");
+ force ce2 =1'bx;
+ #1;
+ release ce2;
+end
+
+always @(noti1_4)
+begin
+$display("NOTICE : 014 : CE3B corruption");
+ force ce3b =1'bx;
+ #1;
+ release ce3b;
+end
+
+always @(noti1_5)
+begin
+$display("NOTICE : 015 : CENB corruption");
+ force cenb =1'bx;
+ #1;
+ release cenb;
+end
+
+always @(noti1_6)
+begin
+$display("NOTICE : 016 : ADV_LB corruption");
+ force adv_lb = 1'bx;
+ #1;
+ release adv_lb;
+end
+
+// synchronous functions from clk edge
+
+always @(posedge clk)
+if (!cenb)
+begin
+#0.01;
+ // latch conditions on adv_lb
+
+ if (adv_lb)
+ we_bl <= we_bl;
+ else
+ we_bl <= we_b;
+
+ chipen_d <= chipen;
+
+
+ chipen_o <= chipen;
+ writestate_o <= writestate;
+ writestate_d <= writestate_o;
+ writebusb_o <= writebusb;
+ writebusb_d <= writebusb_o;
+ operation_o <= operation;
+ a_o <= a;
+ a_d <= a_o;
+ di = {1'b0,d[31:24],
+ 1'b0,d[23:16],
+ 1'b0,d[15:8],
+ 1'b0,d[7:0]};
+
+ // execute previously pipelined fns
+
+ if (lw) begin
+ loadwrite;
+ lw =0;
+ end
+
+ if (bw) begin
+ burstwrite;
+ bw =0;
+ end
+
+ // decode input/piplined state
+
+ casex (operation_o)
+ 3'b0?? : turnoff;
+ 3'b101 : setlw;
+ 3'b111 : setbw;
+ 3'b100 : loadread;
+ 3'b110 : burstread;
+ default : unknown; // output unknown values and display an error message
+ endcase
+
+ do <= `tco pipereg;
+
+end
+
+// *** task section ***
+
+task read;
+begin
+ if (enable) cetri <= `tclz 0;
+ do <= `tdoh 36'hx;
+ writetri <= `tchz 0;
+ pipereg = mem[addreg];
+end
+endtask
+
+task write;
+begin
+ if (enable) cetri <= `tclz 0;
+ writeword = mem[addreg]; // set up a word to hold the data for the current location
+ /* overwrite the current word for the bytes being written to */
+ if (!writebusb_d[3]) writeword[35:27] = di[35:27];
+ if (!writebusb_d[2]) writeword[26:18] = di[26:18];
+ if (!writebusb_d[1]) writeword[17:9] = di[17:9];
+ if (!writebusb_d[0]) writeword[8:0] = di[8:0];
+ writeword = writeword & writeword; //convert z to x states
+ mem[addreg] = writeword; // store the new word into the memory location
+ //writetri <= `tchz 1; // tristate the outputs
+end
+endtask
+
+task setlw;
+begin
+ lw =1;
+ writetri <= `tchz 1; // tristate the outputs
+end
+endtask
+
+task setbw;
+begin
+ bw =1;
+ writetri <= `tchz 1; // tristate the outputs
+end
+endtask
+
+task loadread;
+begin
+ burstinit = a_o[0];
+ addreg = a_o;
+ enable = 1;
+ read;
+end
+endtask
+
+task loadwrite;
+begin
+ burstinit = a_d[0];
+ addreg = a_d;
+ enable = 1;
+ write;
+end
+endtask
+
+task burstread;
+begin
+ burst;
+ read;
+end
+endtask
+
+task burstwrite;
+begin
+ burst;
+ write;
+end
+endtask
+
+task unknown;
+begin
+ do = 36'bx;
+ // $display ("Unknown function: Operation = %b\n", operation);
+end
+endtask
+
+task turnoff;
+begin
+ enable = 0;
+ cetri <= `tchz 1;
+ pipereg = 36'h0;
+end
+endtask
+
+task burst;
+begin
+ if (burstinit == 0 || mode == 0)
+ begin
+ case (addreg[1:0])
+ 2'b00: addreg[1:0] = 2'b01;
+ 2'b01: addreg[1:0] = 2'b10;
+ 2'b10: addreg[1:0] = 2'b11;
+ 2'b11: addreg[1:0] = 2'b00;
+ default: addreg[1:0] = 2'bxx;
+ endcase
+ end
+ else
+ begin
+ case (addreg[1:0])
+ 2'b00: addreg[1:0] = 2'b11;
+ 2'b01: addreg[1:0] = 2'b00;
+ 2'b10: addreg[1:0] = 2'b01;
+ 2'b11: addreg[1:0] = 2'b10;
+ default: addreg[1:0] = 2'bxx;
+ endcase
+ end
+end
+endtask
+
+// IO checks
+/*
+specify
+// specify the setup and hold checks
+
+// notifier will wipe memory as result is indeterminent
+
+$setuphold(posedge clk &&& loadcyc, a, `tas, `tah, notifier);
+
+// noti1 should make ip = 'bx;
+
+$setuphold(posedge clk, bws, `tas, `tah, noti1_0);
+
+$setuphold(posedge clk, we_b, `tas, `tah, noti1_1);
+$setuphold(posedge clk, ce1b, `tas, `tah, noti1_2);
+$setuphold(posedge clk, ce2, `tas, `tah, noti1_3);
+$setuphold(posedge clk, ce3b, `tas, `tah, noti1_4);
+
+// noti2 should make d = 36'hxxxxxxxxx;
+
+$setuphold(posedge clk &&& writecyc, d, `tas, `tah, noti2);
+//$setuphold(posedge clk &&& WriteTimingCheck , d, `tas, `tah, noti2);
+
+// add extra tests here.
+
+$setuphold(posedge clk, cenb, `tas, `tah, noti1_5);
+$setuphold(posedge clk, adv_lb, `tas, `tah, noti1_6);
+
+endspecify
+*/
+endmodule
+
+
Index: trunk/impl/virtex4-ml403ep/sim/flash_stub.v
===================================================================
--- trunk/impl/virtex4-ml403ep/sim/flash_stub.v (nonexistent)
+++ trunk/impl/virtex4-ml403ep/sim/flash_stub.v (revision 39)
@@ -0,0 +1,26 @@
+`timescale 1ns/10ps
+
+module flash_stub (
+ input [20:0] flash_addr_,
+ output [31:0] flash_data_,
+ input flash_oe_n_,
+ input flash_we_n_,
+ input flash_ce2_
+ );
+
+ // Registers and nets
+ reg [31:0] rom[2**21-1:0];
+ reg [31:0] dat_o;
+
+ // Continous assignments
+ assign flash_data_ = flash_ce2_ ? dat_o : 31'hzzzzzzzz;
+
+ // Behaviour
+ initial $readmemh("data.ml403", rom, 21'h0);
+ initial $readmemh("hd.ml403", rom, 21'h100000);
+
+ always @(*) dat_o <= #110
+ (!flash_oe_n_ & flash_we_n_ & flash_ce2_) ?
+ rom[flash_addr_] : 32'hzzzzzzzz;
+
+endmodule
Index: trunk/impl/virtex4-ml403ep/syn/clock.v
===================================================================
--- trunk/impl/virtex4-ml403ep/syn/clock.v (nonexistent)
+++ trunk/impl/virtex4-ml403ep/syn/clock.v (revision 39)
@@ -0,0 +1,85 @@
+module clock (
+ input sys_clk_in_,
+ output clk,
+ output clk_100M,
+ output vdu_clk,
+ output rst
+ );
+
+ // Register declarations
+ reg [6:0] count;
+
+ // Net declarations
+ wire ref_clk;
+ wire ref_clk0;
+ wire lock;
+ wire vdu_lock;
+ wire fpga_lock;
+ wire vdu_clk0;
+ wire fpga_fb;
+ wire fpga_fb0;
+ wire fpga_clk0;
+
+ // Module instantiations
+ IBUFG ref_buf (
+ .O (ref_clk),
+ .I (sys_clk_in_)
+ );
+
+ // DCM for the VGA - 25 Mhz
+ DCM_ADV vdu_dcm (
+ .CLKIN (ref_clk),
+ .CLKFB (clk_100M),
+ .CLK0 (ref_clk0),
+ .CLKDV (vdu_clk0),
+ .RST (1'b0),
+ .LOCKED (vdu_lock)
+ );
+ defparam vdu_dcm.CLKIN_PERIOD = 10.000;
+ defparam vdu_dcm.CLKDV_DIVIDE = 4;
+ defparam vdu_dcm.DCM_AUTOCALIBRATION = "FALSE";
+
+ BUFG b_clk_100M (
+ .O (clk_100M),
+ .I (ref_clk0)
+ );
+
+ BUFG b_vdu_clk (
+ .O (vdu_clk),
+ .I (vdu_clk0)
+ );
+
+ // fpga DCM
+ DCM_ADV fpga_dcm (
+ .CLKIN (ref_clk),
+ .CLKFB (fpga_fb),
+ .CLK0 (fpga_fb0),
+ .CLKDV (fpga_clk0),
+ .RST (1'b0),
+ .LOCKED (fpga_lock)
+ );
+ defparam fpga_dcm.CLKIN_PERIOD = 10.000;
+ defparam fpga_dcm.CLKDV_DIVIDE = 16;
+ defparam fpga_dcm.DCM_AUTOCALIBRATION = "FALSE";
+
+ BUFG b_fpga_fb (
+ .O (fpga_fb),
+ .I (fpga_fb0)
+ );
+
+ BUFG b_fpga_clk (
+ .O (clk),
+ .I (fpga_clk0)
+ );
+
+ // Continuous assignments
+ assign rst = (count!=7'h7f);
+ assign lock = vdu_lock & fpga_lock;
+
+ // Behavioral description
+ // count
+ always @(posedge clk)
+ if (!lock) count <= 7'b0;
+ else count <= (count==7'h7f) ? count : (count + 7'h1);
+
+endmodule
Index: trunk/impl/virtex4-ml403ep/syn/icon.xco
===================================================================
--- trunk/impl/virtex4-ml403ep/syn/icon.xco (nonexistent)
+++ trunk/impl/virtex4-ml403ep/syn/icon.xco (revision 39)
@@ -0,0 +1,47 @@
+##############################################################
+#
+# Xilinx Core Generator version K.39
+# Date: Tue Nov 11 20:50:43 2008
+#
+##############################################################
+#
+# This file contains the customisation parameters for a
+# Xilinx CORE Generator IP GUI. It is strongly recommended
+# that you do not manually alter this file as it may cause
+# unexpected and unsupported behavior.
+#
+##############################################################
+#
+# BEGIN Project Options
+SET addpads = False
+SET asysymbol = True
+SET busformat = BusFormatAngleBracketNotRipped
+SET createndf = False
+SET designentry = VHDL
+SET device = xc4vfx12
+SET devicefamily = virtex4
+SET flowvendor = Foundation_iSE
+SET formalverification = False
+SET foundationsym = False
+SET implementationfiletype = Ngc
+SET package = ff668
+SET removerpms = False
+SET simulationfiles = Structural
+SET speedgrade = -10
+SET verilogsim = True
+SET vhdlsim = True
+# END Project Options
+# BEGIN Select
+SELECT ICON_(ChipScope_Pro_-_Integrated_Controller) family Xilinx,_Inc. 1.03.a
+# END Select
+# BEGIN Parameters
+CSET component_name=icon
+CSET enable_jtag_bufg=true
+CSET number_control_ports=1
+CSET use_ext_bscan=false
+CSET use_unused_bscan=false
+CSET user_scan_chain=USER1
+# END Parameters
+GENERATE
+# CRC: 7feea034
+
Index: trunk/impl/virtex4-ml403ep/syn/kotku.v
===================================================================
--- trunk/impl/virtex4-ml403ep/syn/kotku.v (nonexistent)
+++ trunk/impl/virtex4-ml403ep/syn/kotku.v (revision 39)
@@ -0,0 +1,307 @@
+`timescale 1ns/10ps
+`include "defines.v"
+
+module kotku_ml403 (
+`ifdef DEBUG
+ output rs_,
+ output rw_,
+ output e_,
+ output [7:4] db_,
+ input but_,
+`endif
+
+ output tft_lcd_clk_,
+ output [ 1:0] tft_lcd_r_,
+ output [ 1:0] tft_lcd_g_,
+ output [ 1:0] tft_lcd_b_,
+ output tft_lcd_hsync_,
+ output tft_lcd_vsync_,
+
+ input sys_clk_in_,
+
+ output sram_clk_,
+ output [20:0] sram_flash_addr_,
+ inout [31:0] sram_flash_data_,
+ output sram_flash_oe_n_,
+ output sram_flash_we_n_,
+ output [ 3:0] sram_bw_,
+ output sram_cen_,
+ output sram_adv_ld_n_,
+ output flash_ce2_
+ );
+
+ // Net declarations
+ wire clk;
+ wire rst_lck;
+ wire [15:0] dat_i;
+ wire [15:0] dat_o;
+ wire [19:1] adr;
+ wire we;
+ wire tga;
+ wire stb;
+ wire ack;
+ wire [15:0] io_dat_i;
+ wire [ 1:0] sel;
+ wire cyc;
+ wire [15:0] vdu_dat_o;
+ wire vdu_ack_o;
+ wire vdu_mem_arena;
+ wire vdu_io_arena;
+ wire vdu_arena;
+ wire [15:0] flash_dat_o;
+ wire flash_stb;
+ wire flash_ack;
+ wire flash_mem_arena;
+ wire flash_io_arena;
+ wire flash_arena;
+ wire [15:0] zbt_dat_o;
+ wire zbt_stb;
+ wire zbt_ack;
+ wire [20:0] flash_addr_;
+ wire [20:0] sram_addr_;
+ wire flash_we_n_;
+ wire sram_we_n_;
+
+`ifdef DEBUG
+ wire [35:0] control0;
+ wire [ 5:0] funct;
+ wire [ 2:0] state, next_state;
+ wire [15:0] x, y;
+ wire [15:0] imm;
+ wire clk_100M;
+ wire [63:0] f1, f2;
+ wire [15:0] m1, m2;
+ wire [19:0] pc;
+ wire [15:0] cs, ip;
+ wire [15:0] aluo;
+ wire [ 2:0] cnt;
+ wire op;
+ wire [15:0] r1, r2;
+ reg rst;
+`else
+ wire rst;
+`endif
+
+ // Register declarations
+ reg [15:0] io_reg;
+ reg [ 1:0] vdu_stb_sync;
+ reg [ 1:0] vdu_ack_sync;
+
+ // Module instantiations
+ clock c0 (
+`ifdef DEBUG
+ .clk_100M (clk_100M),
+`endif
+ .sys_clk_in_ (sys_clk_in_),
+ .clk (clk),
+ .vdu_clk (tft_lcd_clk_),
+ .rst (rst_lck)
+ );
+
+ vdu vdu0 (
+ // Wishbone signals
+ .wb_clk_i (tft_lcd_clk_), // 25 Mhz VDU clock
+ .wb_rst_i (rst),
+ .wb_dat_i (dat_o),
+ .wb_dat_o (vdu_dat_o),
+ .wb_adr_i (adr[11:1]),
+ .wb_we_i (we),
+ .wb_tga_i (tga),
+ .wb_sel_i (sel),
+ .wb_stb_i (vdu_stb_sync[1]),
+ .wb_cyc_i (vdu_stb_sync[1]),
+ .wb_ack_o (vdu_ack_o),
+
+ // VGA pad signals
+ .vga_red_o (tft_lcd_r_),
+ .vga_green_o (tft_lcd_g_),
+ .vga_blue_o (tft_lcd_b_),
+ .horiz_sync (tft_lcd_hsync_),
+ .vert_sync (tft_lcd_vsync_)
+ );
+
+ flash_cntrl fc0 (
+ // Wishbone slave interface
+ .wb_clk_i (clk),
+ .wb_rst_i (rst),
+ .wb_dat_i (dat_o),
+ .wb_dat_o (flash_dat_o),
+ .wb_adr_i (adr[17:1]),
+ .wb_we_i (we),
+ .wb_tga_i (tga),
+ .wb_stb_i (flash_stb),
+ .wb_cyc_i (flash_stb),
+ .wb_ack_o (flash_ack),
+
+ // Pad signals
+ .flash_addr_ (flash_addr_),
+ .flash_data_ (sram_flash_data_[15:0]),
+ .flash_we_n_ (flash_we_n_),
+ .flash_ce2_ (flash_ce2_)
+ );
+
+ zbt_cntrl zbt0 (
+`ifdef DEBUG
+ .cnt (cnt),
+ .op (op),
+`endif
+ .wb_clk_i (clk),
+ .wb_rst_i (rst),
+ .wb_dat_i (dat_o),
+ .wb_dat_o (zbt_dat_o),
+ .wb_adr_i (adr),
+ .wb_we_i (we),
+ .wb_sel_i (sel),
+ .wb_stb_i (zbt_stb),
+ .wb_cyc_i (zbt_stb),
+ .wb_ack_o (zbt_ack),
+
+ // Pad signals
+ .sram_clk_ (sram_clk_),
+ .sram_addr_ (sram_addr_),
+ .sram_data_ (sram_flash_data_),
+ .sram_we_n_ (sram_we_n_),
+ .sram_bw_ (sram_bw_),
+ .sram_cen_ (sram_cen_),
+ .sram_adv_ld_n_ (sram_adv_ld_n_)
+ );
+
+ cpu zet_proc (
+`ifdef DEBUG
+ .cs (cs),
+ .ip (ip),
+ .state (state),
+ .next_state (next_state),
+ .iralu (funct),
+ .x (x),
+ .y (y),
+ .imm (imm),
+ .aluo (aluo),
+ .r1 (r1),
+ .r2 (r2),
+`endif
+
+ // Wishbone master interface
+ .wb_clk_i (clk),
+ .wb_rst_i (rst),
+ .wb_dat_i (dat_i),
+ .wb_dat_o (dat_o),
+ .wb_adr_o (adr),
+ .wb_we_o (we),
+ .wb_tga_o (tga),
+ .wb_sel_o (sel),
+ .wb_stb_o (stb),
+ .wb_cyc_o (cyc),
+ .wb_ack_i (ack)
+ );
+
+`ifdef DEBUG
+ // Module instantiations
+ icon icon0 (
+ .CONTROL0 (control0)
+ );
+
+ ila ila0 (
+ .CONTROL (control0),
+ .CLK (clk_100M),
+ .TRIG0 (adr),
+ .TRIG1 ({dat_o,dat_i}),
+ .TRIG2 (pc),
+ .TRIG3 ({clk,we,tga,cyc,stb,ack}),
+ .TRIG4 (funct),
+ .TRIG5 ({state,next_state}),
+ .TRIG6 (io_reg),
+ .TRIG7 (imm),
+ .TRIG8 ({x,y}),
+ .TRIG9 (aluo),
+ .TRIG10 (sram_flash_addr_),
+ .TRIG11 (sram_flash_data_),
+ .TRIG12 ({sram_flash_oe_n_, sram_flash_we_n_, sram_bw_,
+ sram_cen_, sram_adv_ld_n_, flash_ce2_}),
+ .TRIG13 (cnt),
+ .TRIG14 ({vdu_mem_arena,flash_mem_arena,flash_stb,zbt_stb,op}),
+ .TRIG15 ({r1,r2})
+ );
+
+ lcd_display lcd0 (
+ .f1 (f1), // 1st row
+ .f2 (f2), // 2nd row
+ .m1 (m1), // 1st row mask
+ .m2 (m2), // 2nd row mask
+
+ .clk (clk_100M), // 100 Mhz clock
+ .rst (rst_lck),
+
+ // Pad signals
+ .lcd_rs_ (rs_),
+ .lcd_rw_ (rw_),
+ .lcd_e_ (e_),
+ .lcd_dat_ (db_)
+ );
+
+ // Continuous assignments
+ assign f1 = { 3'b0, rst, 4'h0, io_reg, 4'h0, dat_o, 7'h0, tga, 7'h0, ack, 4'h0 };
+ assign f2 = { adr, 7'h0, we, 3'h0, stb, 3'h0, cyc, 8'h0, pc };
+ assign m1 = 16'b1011110111101010;
+ assign m2 = 16'b1111101110011111;
+
+ assign pc = (cs << 4) + ip;
+`endif
+
+ assign io_dat_i = flash_io_arena ? flash_dat_o : 16'h0;
+ assign dat_i = tga ? io_dat_i
+ : (vdu_mem_arena ? vdu_dat_o
+ : (flash_mem_arena ? flash_dat_o : zbt_dat_o));
+
+ assign flash_mem_arena = (adr[19:16]==4'hc || adr[19:16]==4'hf);
+ assign flash_io_arena = (adr[15:9]==7'b1110_000);
+ assign flash_arena = (!tga & flash_mem_arena)
+ | (tga & flash_io_arena);
+ assign vdu_mem_arena = (adr[19:12]==8'hb8);
+ assign vdu_io_arena = (adr[15:8]==8'hb8);
+ assign vdu_arena = (!tga & vdu_mem_arena)
+ | (tga & vdu_io_arena);
+ assign flash_stb = flash_arena & stb & cyc;
+ assign zbt_stb = !vdu_mem_arena & !flash_mem_arena
+ & !tga & stb & cyc;
+
+ assign ack = tga ? (flash_io_arena ? flash_ack
+ : (vdu_io_arena ? vdu_ack_sync[1] : (stb & cyc)))
+ : (vdu_mem_arena ? vdu_ack_sync[1]
+ : (flash_mem_arena ? flash_ack : zbt_ack));
+
+ assign sram_flash_oe_n_ = 1'b0;
+ assign sram_flash_addr_ = flash_arena ? flash_addr_
+ : sram_addr_;
+ assign sram_flash_we_n_ = flash_arena ? flash_we_n_
+ : sram_we_n_;
+
+ // Behaviour
+ // vdu_stb_sync[0]
+ always @(posedge tft_lcd_clk_)
+ vdu_stb_sync[0] <= stb & cyc & vdu_arena;
+
+ // vdu_stb_sync[1]
+ always @(posedge clk)
+ vdu_stb_sync[1] <= vdu_stb_sync[0];
+
+ // vdu_ack_sync[0]
+ always @(posedge clk) vdu_ack_sync[0] <= vdu_ack_o;
+
+ // vdu_ack_sync[1]
+ always @(posedge clk) vdu_ack_sync[1] <= vdu_ack_sync[0];
+
+ // io_reg
+ always @(posedge clk)
+ io_reg <= rst ? 16'h0
+ : ((tga && stb && cyc && we && adr[15:8]==8'hf1) ?
+ dat_o : io_reg );
+
+`ifdef DEBUG
+ // rst
+ always @(posedge clk)
+ rst <= rst_lck ? 1'b1 : (but_ ? 1'b0 : rst );
+`else
+ assign rst = rst_lck;
+`endif
+endmodule
Index: trunk/impl/virtex4-ml403ep/syn/kotku.prj
===================================================================
--- trunk/impl/virtex4-ml403ep/syn/kotku.prj (nonexistent)
+++ trunk/impl/virtex4-ml403ep/syn/kotku.prj (revision 39)
@@ -0,0 +1,19 @@
+verilog work "../../../../rtl-model/util/div_uu.v"
+verilog work "../../../../rtl-model/util/primitives.v"
+verilog work "../../../../rtl-model/util/div_su.v"
+verilog work "../../../../rtl-model/rotate.v"
+verilog work "mult.v"
+verilog work "../../../../rtl-model/regfile.v"
+verilog work "../../../../rtl-model/jmp_cond.v"
+verilog work "../../../../rtl-model/alu.v"
+verilog work "../../../../soc/vga/rtl/ram2k_b16_attr.v"
+verilog work "../../../../soc/vga/rtl/ram2k_b16.v"
+verilog work "../../../../soc/vga/rtl/char_rom_b16.v"
+verilog work "../../../../rtl-model/fetch.v"
+verilog work "../../../../rtl-model/exec.v"
+verilog work "../../../../soc/vga/rtl/vdu.v"
+verilog work "../../../../rtl-model/cpu.v"
+verilog work "../../mem/zbt_cntrl.v"
+verilog work "../../mem/flash_cntrl.v"
+verilog work "../clock.v"
+verilog work "../kotku.v"
Index: trunk/impl/virtex4-ml403ep/syn/mult.xco
===================================================================
--- trunk/impl/virtex4-ml403ep/syn/mult.xco (nonexistent)
+++ trunk/impl/virtex4-ml403ep/syn/mult.xco (revision 39)
@@ -0,0 +1,62 @@
+##############################################################
+#
+# Xilinx Core Generator version K.39
+# Date: Wed Nov 12 21:43:31 2008
+#
+##############################################################
+#
+# This file contains the customisation parameters for a
+# Xilinx CORE Generator IP GUI. It is strongly recommended
+# that you do not manually alter this file as it may cause
+# unexpected and unsupported behavior.
+#
+##############################################################
+#
+# BEGIN Project Options
+SET addpads = False
+SET asysymbol = True
+SET busformat = BusFormatAngleBracketNotRipped
+SET createndf = False
+SET designentry = VHDL
+SET device = xc4vfx12
+SET devicefamily = virtex4
+SET flowvendor = Foundation_iSE
+SET formalverification = False
+SET foundationsym = False
+SET implementationfiletype = Ngc
+SET package = ff668
+SET removerpms = False
+SET simulationfiles = Behavioral
+SET speedgrade = -12
+SET verilogsim = True
+SET vhdlsim = True
+# END Project Options
+# BEGIN Select
+SELECT Multiplier family Xilinx,_Inc. 10.1
+# END Select
+# BEGIN Parameters
+CSET ccmimp=Distributed_Memory
+CSET clockenable=false
+CSET component_name=mult
+CSET constvalue=129
+CSET internaluser=0
+CSET multiplier_construction=Use_Mults
+CSET multtype=Parallel_Multiplier
+CSET optgoal=Speed
+CSET outputwidthhigh=33
+CSET outputwidthlow=0
+CSET pipestages=1
+CSET portatype=Signed
+CSET portawidth=17
+CSET portbtype=Signed
+CSET portbwidth=17
+CSET roundpoint=0
+CSET sclrcepriority=SCLR_Overrides_CE
+CSET syncclear=false
+CSET use_custom_output_width=false
+CSET userounding=false
+CSET zerodetect=false
+# END Parameters
+GENERATE
+# CRC: 39b5f86a
+
Index: trunk/impl/virtex4-ml403ep/syn/kotku.xst
===================================================================
--- trunk/impl/virtex4-ml403ep/syn/kotku.xst (nonexistent)
+++ trunk/impl/virtex4-ml403ep/syn/kotku.xst (revision 39)
@@ -0,0 +1,57 @@
+run
+-ifn ../kotku.prj
+-ifmt mixed
+-ofn kotku_ml403
+-ofmt NGC
+-p xc4vfx12-10-ff668
+-top kotku_ml403
+-opt_mode Speed
+-opt_level 1
+-power NO
+-iuc NO
+-keep_hierarchy NO
+-netlist_hierarchy as_optimized
+-rtlview Yes
+-glob_opt AllClockNets
+-read_cores YES
+-write_timing_constraints NO
+-cross_clock_analysis NO
+-hierarchy_separator /
+-bus_delimiter <>
+-case maintain
+-slice_utilization_ratio 100
+-bram_utilization_ratio 100
+-dsp_utilization_ratio 100
+-verilog2001 YES
+-fsm_extract YES -fsm_encoding Auto
+-safe_implementation No
+-fsm_style lut
+-ram_extract Yes
+-ram_style Auto
+-rom_extract Yes
+-mux_style Auto
+-decoder_extract YES
+-priority_extract YES
+-shreg_extract YES
+-shift_extract YES
+-xor_collapse YES
+-rom_style Auto
+-auto_bram_packing NO
+-mux_extract YES
+-resource_sharing YES
+-async_to_sync NO
+-use_dsp48 auto
+-iobuf YES
+-max_fanout 500
+-bufg 32
+-bufr 16
+-register_duplication YES
+-register_balancing No
+-slice_packing YES
+-optimize_primitives NO
+-use_clock_enable Auto
+-use_sync_set Auto
+-use_sync_reset Auto
+-iob auto
+-equivalent_register_removal YES
+-slice_utilization_ratio_maxmargin 5
Index: trunk/impl/virtex4-ml403ep/syn/ml403.ucf
===================================================================
--- trunk/impl/virtex4-ml403ep/syn/ml403.ucf (nonexistent)
+++ trunk/impl/virtex4-ml403ep/syn/ml403.ucf (revision 39)
@@ -0,0 +1,124 @@
+#NET sys_clk_in_ TNM_NET = "sys_clk_in_";
+#TIMESPEC "TSSYSCLK" = PERIOD "sys_clk_in_" 9.9 ns HIGH 50 %;
+
+NET sys_clk_in_ LOC = AE14;
+NET sys_clk_in_ IOSTANDARD = LVCMOS33;
+
+#NET trx LOC = W1;
+NET sram_clk_ LOC = AF7 ;
+
+#NET sram_flash_addr_[24] LOC = T21;
+#NET sram_flash_addr_[23] LOC = U20;
+#NET sram_flash_addr_[22] LOC = T19;
+NET sram_flash_addr_[20] LOC = AC5;
+NET sram_flash_addr_[19] LOC = AB5;
+NET sram_flash_addr_[18] LOC = AC4;
+NET sram_flash_addr_[17] LOC = AB4;
+NET sram_flash_addr_[16] LOC = AB3;
+NET sram_flash_addr_[15] LOC = AA4;
+NET sram_flash_addr_[14] LOC = AA3;
+NET sram_flash_addr_[13] LOC = W5;
+NET sram_flash_addr_[12] LOC = W6;
+NET sram_flash_addr_[11] LOC = W3;
+NET sram_flash_addr_[10] LOC = AF3;
+NET sram_flash_addr_[9] LOC = AE3;
+NET sram_flash_addr_[8] LOC = AD2;
+NET sram_flash_addr_[7] LOC = AD1;
+NET sram_flash_addr_[6] LOC = AC2;
+NET sram_flash_addr_[5] LOC = AC1;
+NET sram_flash_addr_[4] LOC = AB2;
+NET sram_flash_addr_[3] LOC = AB1;
+NET sram_flash_addr_[2] LOC = AA1;
+NET sram_flash_addr_[1] LOC = Y2;
+NET sram_flash_addr_[0] LOC = Y1;
+#NET sram_flash_addr_[0] LOC = T20;
+
+NET sram_flash_data_[31] LOC = F14;
+NET sram_flash_data_[30] LOC = F13;
+NET sram_flash_data_[29] LOC = F12;
+NET sram_flash_data_[28] LOC = F11;
+NET sram_flash_data_[27] LOC = F16;
+NET sram_flash_data_[26] LOC = F15;
+NET sram_flash_data_[25] LOC = D14;
+NET sram_flash_data_[24] LOC = D13;
+NET sram_flash_data_[23] LOC = D15;
+NET sram_flash_data_[22] LOC = E14;
+NET sram_flash_data_[21] LOC = C11;
+NET sram_flash_data_[20] LOC = D11;
+NET sram_flash_data_[19] LOC = D16;
+NET sram_flash_data_[18] LOC = C16;
+NET sram_flash_data_[17] LOC = E13;
+NET sram_flash_data_[16] LOC = D12;
+NET sram_flash_data_[15] LOC = AA14;
+NET sram_flash_data_[14] LOC = AB14;
+NET sram_flash_data_[13] LOC = AC12;
+NET sram_flash_data_[12] LOC = AC11;
+NET sram_flash_data_[11] LOC = AA16;
+NET sram_flash_data_[10] LOC = AA15;
+NET sram_flash_data_[9] LOC = AB13;
+NET sram_flash_data_[8] LOC = AA13;
+NET sram_flash_data_[7] LOC = AC14;
+NET sram_flash_data_[6] LOC = AD14;
+NET sram_flash_data_[5] LOC = AA12;
+NET sram_flash_data_[4] LOC = AA11;
+NET sram_flash_data_[3] LOC = AC16;
+NET sram_flash_data_[2] LOC = AC15;
+NET sram_flash_data_[1] LOC = AC13;
+NET sram_flash_data_[0] LOC = AD13;
+
+NET sram_flash_oe_n_ LOC = AC6;
+NET sram_flash_we_n_ LOC = AB6;
+
+NET sram_bw_[3] LOC = Y3; #Y4;
+NET sram_bw_[2] LOC = Y4; #Y3;
+NET sram_bw_[1] LOC = Y5; #Y6;
+NET sram_bw_[0] LOC = Y6; #Y5;
+
+NET sram_cen_ LOC = V7;
+NET sram_adv_ld_n_ LOC = W4;
+NET flash_ce2_ LOC = W7;
+
+#NET flash_byte_n LOC = N22;
+#NET flash_audio_reset_n LOC = AD10;
+
+NET tft_lcd_clk_ LOC = AF8;
+NET tft_lcd_r_[0] LOC = E5 | SLEW = FAST | DRIVE = 8; # VGA_R6
+NET tft_lcd_r_[1] LOC = E6 | SLEW = FAST | DRIVE = 8; # VGA_R7
+NET tft_lcd_g_[0] LOC = H8 | SLEW = FAST | DRIVE = 8; # VGA_G6
+NET tft_lcd_g_[1] LOC = C1 | SLEW = FAST | DRIVE = 8; # VGA_G7
+NET tft_lcd_b_[0] LOC = G8 | SLEW = FAST | DRIVE = 8; # VGA_B6
+NET tft_lcd_b_[1] LOC = F8 | SLEW = FAST | DRIVE = 8; # VGA_B7
+NET tft_lcd_hsync_ LOC = C10;
+NET tft_lcd_vsync_ LOC = A8;
+
+NET tft_lcd_clk_ SLEW = FAST;
+NET tft_lcd_clk_ DRIVE = 8;
+
+NET tft_lcd_hsync_ SLEW = FAST;
+NET tft_lcd_hsync_ DRIVE = 8;
+
+NET tft_lcd_vsync_ SLEW = FAST;
+NET tft_lcd_vsync_ DRIVE = 8;
+
+#NET e_ LOC = AE13 | IOSTANDARD = LVCMOS33 | TIG; # LCD_E
+#NET rs_ LOC = AC17 | IOSTANDARD = LVCMOS33 | TIG; # LCD_RS
+#NET rw_ LOC = AB17 | IOSTANDARD = LVCMOS33 | TIG; # LCD_RW
+
+#NET db_[7] LOC = AF12 | IOSTANDARD = LVCMOS33 | TIG; # LCD_DB7
+#NET db_[6] LOC = AE12 | IOSTANDARD = LVCMOS33 | TIG; # LCD_DB6
+#NET db_[5] LOC = AC10 | IOSTANDARD = LVCMOS33 | TIG; # LCD_DB5
+#NET db_[4] LOC = AB10 | IOSTANDARD = LVCMOS33 | TIG; # LCD_DB4
+
+#NET but_ LOC = B6; # C Button
+
+#NET leds_[0] LOC = G5; #GPLED0
+#NET leds_[1] LOC = G6; #GPLED1
+#NET leds_[2] LOC = A11; #GPLED2
+#NET leds_[3] LOC = A12; #GPLED3
+
+# North-East-South-West-Center LEDs
+#NET leds_[4] LOC = C6; # C LED
+#NET leds_[5] LOC = F9; # W LED
+#NET leds_[6] LOC = A5; # S LED
+#NET leds_[7] LOC = E10; # E LED
+#NET leds_[8] LOC = E2; # N LED
\ No newline at end of file
Index: trunk/impl/virtex4-ml403ep/syn/Makefile
===================================================================
--- trunk/impl/virtex4-ml403ep/syn/Makefile (nonexistent)
+++ trunk/impl/virtex4-ml403ep/syn/Makefile (revision 39)
@@ -0,0 +1,32 @@
+all: Zet.ace
+
+Zet.ace: tmp/kotku_ml403.bit
+ (cd tmp/ && ../../ace/ml40x_bit2ace kotku_ml403.bit ../Zet.ace ../../ace/)
+
+tmp/mult.v: mult.xco
+ mkdir -p tmp
+ (cd tmp/ && coregen -b ../mult.xco)
+
+tmp/kotku_ml403.ngc: tmp/mult.v kotku.prj kotku.xst
+ (cd tmp/ && xst -ifn ../kotku.xst)
+
+tmp/kotku_ml403.ngd: tmp/kotku_ml403.ngc ml403.ucf tmp/mult.ngc
+ (cd tmp/ && ngdbuild -uc ../ml403.ucf kotku_ml403.ngc)
+
+tmp/kotku_ml403.ncd: tmp/kotku_ml403.ngd
+ (cd tmp/ && map kotku_ml403.ngd)
+
+tmp/kotku_ml403-par.ncd: tmp/kotku_ml403.ncd
+ (cd tmp/ && par -w kotku_ml403.ncd kotku_ml403-par.ncd)
+
+tmp/kotku_ml403.bit: tmp/kotku_ml403-par.ncd
+ (cd tmp/ && bitgen -w kotku_ml403-par.ncd kotku_ml403.bit)
+
+kotku.bit: tmp/kotku_ml403.bit
+ cp tmp/kotku_ml403.bit ./kotku.bit
+
+clean:
+ rm -fR tmp/
+
+dist-clean:
+ rm -fR Zet.ace kotku.bit tmp/
Index: trunk/impl/virtex4-ml403ep/syn/ila.xco
===================================================================
--- trunk/impl/virtex4-ml403ep/syn/ila.xco (nonexistent)
+++ trunk/impl/virtex4-ml403ep/syn/ila.xco (revision 39)
@@ -0,0 +1,131 @@
+##############################################################
+#
+# Xilinx Core Generator version K.39
+# Date: Fri Nov 7 05:42:19 2008
+#
+##############################################################
+#
+# This file contains the customisation parameters for a
+# Xilinx CORE Generator IP GUI. It is strongly recommended
+# that you do not manually alter this file as it may cause
+# unexpected and unsupported behavior.
+#
+##############################################################
+#
+# BEGIN Project Options
+SET addpads = False
+SET asysymbol = True
+SET busformat = BusFormatAngleBracketNotRipped
+SET createndf = False
+SET designentry = VHDL
+SET device = xc4vfx12
+SET devicefamily = virtex4
+SET flowvendor = Foundation_iSE
+SET formalverification = False
+SET foundationsym = False
+SET implementationfiletype = Ngc
+SET package = ff668
+SET removerpms = False
+SET simulationfiles = Structural
+SET speedgrade = -10
+SET verilogsim = True
+SET vhdlsim = True
+# END Project Options
+# BEGIN Select
+SELECT ILA_(ChipScope_Pro_-_Integrated_Logic_Analyzer) family Xilinx,_Inc. 1.02.a
+# END Select
+# BEGIN Parameters
+CSET component_name=ila
+CSET counter_width_1=Disabled
+CSET counter_width_10=Disabled
+CSET counter_width_11=16
+CSET counter_width_12=Disabled
+CSET counter_width_13=Disabled
+CSET counter_width_14=Disabled
+CSET counter_width_15=Disabled
+CSET counter_width_16=Disabled
+CSET counter_width_2=Disabled
+CSET counter_width_3=32
+CSET counter_width_4=Disabled
+CSET counter_width_5=Disabled
+CSET counter_width_6=Disabled
+CSET counter_width_7=Disabled
+CSET counter_width_8=Disabled
+CSET counter_width_9=Disabled
+CSET data_port_width=0
+CSET data_same_as_trigger=true
+CSET enable_storage_qualification=true
+CSET enable_trigger_output_port=false
+CSET exclude_from_data_storage_1=false
+CSET exclude_from_data_storage_10=false
+CSET exclude_from_data_storage_11=false
+CSET exclude_from_data_storage_12=false
+CSET exclude_from_data_storage_13=false
+CSET exclude_from_data_storage_14=false
+CSET exclude_from_data_storage_15=false
+CSET exclude_from_data_storage_16=false
+CSET exclude_from_data_storage_2=false
+CSET exclude_from_data_storage_3=false
+CSET exclude_from_data_storage_4=false
+CSET exclude_from_data_storage_5=false
+CSET exclude_from_data_storage_6=false
+CSET exclude_from_data_storage_7=false
+CSET exclude_from_data_storage_8=false
+CSET exclude_from_data_storage_9=false
+CSET match_type_1=basic
+CSET match_type_10=basic
+CSET match_type_11=basic
+CSET match_type_12=basic
+CSET match_type_13=basic
+CSET match_type_14=basic
+CSET match_type_15=basic
+CSET match_type_16=basic
+CSET match_type_2=basic
+CSET match_type_3=basic
+CSET match_type_4=basic
+CSET match_type_5=basic
+CSET match_type_6=basic
+CSET match_type_7=basic
+CSET match_type_8=basic
+CSET match_type_9=basic
+CSET match_units_1=1
+CSET match_units_10=1
+CSET match_units_11=1
+CSET match_units_12=1
+CSET match_units_13=1
+CSET match_units_14=1
+CSET match_units_15=1
+CSET match_units_16=1
+CSET match_units_2=1
+CSET match_units_3=1
+CSET match_units_4=1
+CSET match_units_5=1
+CSET match_units_6=1
+CSET match_units_7=1
+CSET match_units_8=1
+CSET match_units_9=1
+CSET max_sequence_levels=16
+CSET number_of_trigger_ports=16
+CSET sample_data_depth=1024
+CSET sample_on=Rising
+CSET trigger_port_width_1=20
+CSET trigger_port_width_10=16
+CSET trigger_port_width_11=21
+CSET trigger_port_width_12=16
+CSET trigger_port_width_13=9
+CSET trigger_port_width_14=3
+CSET trigger_port_width_15=5
+CSET trigger_port_width_16=32
+CSET trigger_port_width_2=32
+CSET trigger_port_width_3=20
+CSET trigger_port_width_4=6
+CSET trigger_port_width_5=6
+CSET trigger_port_width_6=6
+CSET trigger_port_width_7=16
+CSET trigger_port_width_8=16
+CSET trigger_port_width_9=32
+CSET use_rpms=true
+# END Parameters
+GENERATE
+# CRC: 1d7360fb
+
Index: trunk/impl/virtex4-ml403ep/mem/flash_cntrl.v
===================================================================
--- trunk/impl/virtex4-ml403ep/mem/flash_cntrl.v (nonexistent)
+++ trunk/impl/virtex4-ml403ep/mem/flash_cntrl.v (revision 39)
@@ -0,0 +1,63 @@
+/*
+ * Copyright (c) 2008 Zeus Gomez Marmolejo
+ *
+ * This file is part of the Zet processor. This processor is free
+ * hardware; you can redistribute it and/or modify it under the terms of
+ * the GNU General Public License as published by the Free Software
+ * Foundation; either version 3, or (at your option) any later version.
+ *
+ * Zet is distrubuted in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ * License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Zet; see the file COPYING. If not, see
+ * =0x41) && (ah<=0x49)) || (ah==0x4e) ) {
+ SET_AH(0x01); // ???
+ set_diskette_ret_status(1);
+ SET_CF();
+ return;
+ // }
+ }
+}
+
+ void
+set_diskette_ret_status(value)
+ Bit8u value;
+{
+ write_byte(0x0040, 0x0041, value);
+}
+
+ void
+set_diskette_current_cyl(drive, cyl)
+ Bit8u drive;
+ Bit8u cyl;
+{
+/* TEMP HACK: FOR MSDOS */
+ if (drive > 1)
+ drive = 1;
+ /* BX_PANIC("set_diskette_current_cyl(): drive > 1\n"); */
+ write_byte(0x0040, 0x0094+drive, cyl);
+}
+
void
int19_function(seq_nr)
Bit16u seq_nr;
@@ -916,10 +1148,15 @@
// else : boot failure
// Get the boot sequence
+/*
+ * Zet: we don't have a CMOS device
+ *
bootdev = inb_cmos(0x3d);
bootdev |= ((inb_cmos(0x38) & 0xf0) << 4);
bootdev >>= 4 * seq_nr;
bootdev &= 0xf;
+*/
+ bootdev = 0x1;
/* Read user selected device */
bootfirst = read_word(IPL_SEG, IPL_BOOTFIRST_OFFSET);
@@ -945,11 +1182,53 @@
print_boot_device(&e);
switch(e.type) {
- case IPL_TYPE_BEV: /* Expansion ROM with a Bootstrap Entry Vector (a far pointer) */
- bootseg = e.vector >> 16;
- bootip = e.vector & 0xffff;
- break;
+ case IPL_TYPE_FLOPPY: /* FDD */
+ case IPL_TYPE_HARDDISK: /* HDD */
+ bootdrv = (e.type == IPL_TYPE_HARDDISK) ? 0x80 : 0x00;
+ bootseg = 0x07c0;
+ status = 0;
+
+ASM_START
+ push bp
+ mov bp, sp
+ push ax
+ push bx
+ push cx
+ push dx
+
+ mov dl, _int19_function.bootdrv + 2[bp]
+ mov ax, _int19_function.bootseg + 2[bp]
+ mov es, ax ;; segment
+ xor bx, bx ;; offset
+ mov ah, #0x02 ;; function 2, read diskette sector
+ mov al, #0x01 ;; read 1 sector
+ mov ch, #0x00 ;; track 0
+ mov cl, #0x01 ;; sector 1
+ mov dh, #0x00 ;; head 0
+ int #0x13 ;; read sector
+ jnc int19_load_done
+ mov ax, #0x0001
+ mov _int19_function.status + 2[bp], ax
+
+int19_load_done:
+ pop dx
+ pop cx
+ pop bx
+ pop ax
+ pop bp
+ASM_END
+
+ if (status != 0) {
+ print_boot_failure(e.type, 1);
+ return;
+ }
+
+ /* Canonicalize bootseg:bootip */
+ bootip = (bootseg & 0x0fff) << 4;
+ bootseg &= 0xf000;
+ break;
+
default: return;
}
@@ -980,6 +1259,71 @@
}
ASM_START
+;----------------------
+;- INT13h (relocated) -
+;----------------------
+;
+; int13_relocated is a little bit messed up since I played with it
+; I have to rewrite it:
+; - call a function that detect which function to call
+; - make all called C function get the same parameters list
+;
+int13_relocated:
+ push ax
+ push cx
+ push dx
+ push bx
+
+int13_legacy:
+
+ push dx ;; push eltorito value of dx instead of sp
+
+ push bp
+ push si
+ push di
+
+ push es
+ push ds
+ push ss
+ pop ds
+
+ ;; now the 16-bit registers can be restored with:
+ ;; pop ds; pop es; popa; iret
+ ;; arguments passed to functions should be
+ ;; DS, ES, DI, SI, BP, ELDX, BX, DX, CX, AX, IP, CS, FLAGS
+
+ test dl, #0x80
+ jnz int13_notfloppy
+
+ mov ax, #int13_out
+ push ax
+ jmp _int13_diskette_function
+
+int13_notfloppy:
+
+int13_disk:
+ ;; int13_harddisk modifies high word of EAX
+; shr eax, #16
+; push ax
+ call _int13_harddisk
+; pop ax
+; shl eax, #16
+
+int13_out:
+ pop ds
+ pop es
+ ; popa ; we do this instead:
+ pop di
+ pop si
+ pop bp
+ add sp, #2
+ pop bx
+ pop dx
+ pop cx
+ pop ax
+
+ iret
+
;----------
;- INT18h -
;----------
@@ -1037,6 +1381,13 @@
;; Boot failed: invoke the boot recovery function
int #0x18
+;----------
+;- INT1Ch -
+;----------
+int1c_handler: ;; User Timer Tick
+ iret
+
+
;--------------------
;- POST: EBDA segment
;--------------------
@@ -1260,9 +1611,21 @@
;; Bootstrap Loader vector
SET_INT_VECTOR(0x19, #0xF000, #int19_handler)
+ ;; User Timer Tick vector
+ SET_INT_VECTOR(0x1c, #0xF000, #int1c_handler)
+
+ ;; Memory Size Check vector
+ SET_INT_VECTOR(0x12, #0xF000, #int12_handler)
+
+ ;; Equipment Configuration Check vector
+ SET_INT_VECTOR(0x11, #0xF000, #int11_handler)
+
;; EBDA setup
call ebda_post
+ ;; Keyboard
+ SET_INT_VECTOR(0x16, #0xF000, #int16_handler)
+
;; Video setup
SET_INT_VECTOR(0x10, #0xF000, #int10_handler)
@@ -1273,6 +1636,9 @@
call _print_bios_banner
+ ;; Floppy setup
+ SET_INT_VECTOR(0x13, #0xF000, #int13_handler)
+
call _init_boot_vectors
mov cx, #0xc800 ;; init option roms
@@ -1282,6 +1648,16 @@
sti ;; enable interrupts
int #0x19
+;-------------------------------------------
+;- INT 13h Fixed Disk Services Entry Point -
+;-------------------------------------------
+.org 0xe3fe ; INT 13h Fixed Disk Services Entry Point
+int13_handler:
+ //JMPL(int13_relocated)
+ jmp int13_relocated
+
+.org 0xe401 ; Fixed Disk Parameter Table
+
;----------
;- INT19h -
;----------
@@ -1290,6 +1666,27 @@
jmp int19_relocated
+;----------------------------------------
+;- INT 16h Keyboard Service Entry Point -
+;----------------------------------------
+.org 0xe82e
+int16_handler:
+ cmp ah, #0x01
+ je int16_01
+ cmp ah, #0x02
+ je int16_02
+ iret
+int16_02:
+ mov al, #0x0
+ iret
+int16_01:
+ push bp
+ mov bp, sp
+ //SEG SS
+ or BYTE [bp + 0x06], #0x40
+ pop bp
+ iret
+
.org 0xf045 ; INT 10 Functions 0-Fh Entry Point
;; HALT(__LINE__)
iret
@@ -1304,6 +1701,31 @@
.org 0xf0a4 ; MDA/CGA Video Parameter Table (INT 1Dh)
+;----------
+;- INT12h -
+;----------
+.org 0xf841 ; INT 12h Memory Size Service Entry Point
+; ??? different for Pentium (machine check)?
+int12_handler:
+ push ds
+ mov ax, #0x0040
+ mov ds, ax
+ mov ax, 0x0013
+ pop ds
+ iret
+
+;----------
+;- INT11h -
+;----------
+.org 0xf84d ; INT 11h Equipment List Service Entry Point
+int11_handler:
+ push ds
+ mov ax, #0x0040
+ mov ds, ax
+ mov ax, 0x0010
+ pop ds
+ iret
+
;------------------------------------------------
;- IRET Instruction for Dummy Interrupt Handler -
;------------------------------------------------
@@ -1312,6 +1734,7 @@
iret
.org 0xfff0 ; Power-up Entry Point
+; hlt
jmp 0xf000:post
.org 0xfff5 ; ASCII Date ROM was built - 8 characters in MM/DD/YY
/trunk/soc/bios/vgabios.c
12,6 → 12,9
|
static Bit16u get_SS(); |
|
// Output |
static void printf(); |
|
static Bit8u find_vga_entry(); |
|
static void memsetb(); |
24,6 → 27,7
static void biosfn_get_cursor_pos(); |
static void biosfn_scroll(); |
static void biosfn_write_teletype(); |
static void biosfn_load_text_8_16_pat(); |
static void biosfn_write_string(); |
extern Bit8u video_save_pointer_table[]; |
|
60,7 → 64,7
|
|
vgabios_entry_point: |
|
|
jmp vgabios_init_func |
|
vgabios_name: |
110,8 → 114,8
.byte 0x0a,0x0d |
.byte 0x0a,0x0d |
.byte 0x00 |
|
|
|
;; ======================================================== |
;; |
;; Init Entry point |
119,6 → 123,9
;; ======================================================== |
vgabios_init_func: |
|
;; init vga card |
call init_vga_card |
|
;; init basic bios vars |
call init_bios_area |
|
144,6 → 151,11
ASM_START |
vgabios_int10_handler: |
pushf |
int10_test_1103: |
cmp ax, #0x1103 |
jne int10_normal |
call biosfn_set_text_block_specifier |
jmp int10_end |
|
int10_normal: |
push es |
186,12 → 198,47
ASM_END |
|
#include "vgatables.h" |
#include "vgafonts.h" |
|
// -------------------------------------------------------- |
/* |
* Boot time bios area inits |
* Boot time harware inits |
*/ |
ASM_START |
init_vga_card: |
;; switch to color mode and enable CPU access 480 lines |
mov dx, #0x3C2 |
mov al, #0xC3 |
outb dx,al |
|
;; more than 64k 3C4/04 |
mov dx, #0x3C4 |
mov al, #0x04 |
outb dx,al |
mov dx, #0x3C5 |
mov al, #0x02 |
outb dx,al |
|
#if defined(USE_BX_INFO) || defined(DEBUG) |
mov bx, #msg_vga_init |
push bx |
call _printf |
#endif |
; inc sp |
; inc sp |
ret |
|
#if defined(USE_BX_INFO) || defined(DEBUG) |
msg_vga_init: |
.ascii "VGABios $Id: vgabios.c,v 1.3 2008-11-14 03:31:19 zeus Exp $" |
.byte 0x0d,0x0a,0x00 |
#endif |
ASM_END |
|
// -------------------------------------------------------------------------------------------- |
/* |
* Boot time bios area inits |
*/ |
ASM_START |
init_bios_area: |
push ds |
mov ax, # BIOSMEM_SEG |
212,7 → 259,7
mov al, #0x10 |
mov [bx], al |
|
;; Clear the screen |
;; Clear the screen |
mov bx, # BIOSMEM_VIDEO_CTL |
mov al, #0x60 |
mov [bx], al |
259,14 → 306,12
|
ASM_END |
|
// -------------------------------------------------------- |
// -------------------------------------------------------------------------------------------- |
/* |
* Boot time Splash screen |
*/ |
static void display_splash_screen() |
{ |
write_byte (0xb800, 0x0, 'H'); |
// write_byte (0xb800, 0x2, 'o'); |
} |
|
// -------------------------------------------------------------------------------------------- |
307,7 → 352,7
not cx |
xor al,al |
cld |
repne |
repne |
scasb |
not cx |
dec cx |
365,6 → 410,15
// We do output only on the current page ! |
biosfn_write_teletype(GET_AL(),0xff,GET_BL(),NO_ATTR); |
break; |
case 0x11: |
switch(GET_AL()) |
{ |
case 0x04: |
case 0x14: |
biosfn_load_text_8_16_pat(GET_AL(),GET_BL()); |
break; |
} |
break; |
case 0x13: |
biosfn_write_string(GET_AL(),GET_BH(),GET_BL(),CX,GET_DH(),GET_DL(),ES,BP); |
break; |
372,12 → 426,12
} |
|
// ============================================================================================ |
// |
// |
// BIOS functions |
// |
// |
// ============================================================================================ |
|
static void biosfn_set_video_mode(mode) Bit8u mode; |
static void biosfn_set_video_mode(mode) Bit8u mode; |
{// mode: Bit 7 is 1 if no clear screen |
|
// Should we clear the screen ? |
400,7 → 454,7
twidth=video_param_table[vpti].twidth; |
theightm1=video_param_table[vpti].theightm1; |
cheight=video_param_table[vpti].cheight; |
|
|
// Read the bios vga control |
video_ctl=read_byte(BIOSMEM_SEG,BIOSMEM_VIDEO_CTL); |
|
410,9 → 464,113
// Read the bios mode set control |
modeset_ctl=read_byte(BIOSMEM_SEG,BIOSMEM_MODESET_CTL); |
|
// Set CRTC address VGA or MDA |
// Then we know the number of lines |
// FIXME |
|
// if palette loading (bit 3 of modeset ctl = 0) |
if((modeset_ctl&0x08)==0) |
{// Set the PEL mask |
outb(VGAREG_PEL_MASK,vga_modes[line].pelmask); |
|
// Set the whole dac always, from 0 |
outb(VGAREG_DAC_WRITE_ADDRESS,0x00); |
|
// From which palette |
switch(vga_modes[line].dacmodel) |
{case 0: |
palette=&palette0; |
break; |
case 1: |
palette=&palette1; |
break; |
case 2: |
palette=&palette2; |
break; |
case 3: |
palette=&palette3; |
break; |
} |
// Always 256*3 values |
for(i=0;i<0x0100;i++) |
{if(i<=dac_regs[vga_modes[line].dacmodel]) |
{outb(VGAREG_DAC_DATA,palette[(i*3)+0]); |
outb(VGAREG_DAC_DATA,palette[(i*3)+1]); |
outb(VGAREG_DAC_DATA,palette[(i*3)+2]); |
} |
else |
{outb(VGAREG_DAC_DATA,0); |
outb(VGAREG_DAC_DATA,0); |
outb(VGAREG_DAC_DATA,0); |
} |
} |
} |
|
// Reset Attribute Ctl flip-flop |
inb(VGAREG_ACTL_RESET); |
|
// Set Attribute Ctl |
for(i=0;i<=0x13;i++) |
{outb(VGAREG_ACTL_ADDRESS,i); |
outb(VGAREG_ACTL_WRITE_DATA,video_param_table[vpti].actl_regs[i]); |
} |
outb(VGAREG_ACTL_ADDRESS,0x14); |
outb(VGAREG_ACTL_WRITE_DATA,0x00); |
|
// Set Sequencer Ctl |
outb(VGAREG_SEQU_ADDRESS,0); |
outb(VGAREG_SEQU_DATA,0x03); |
for(i=1;i<=4;i++) |
{outb(VGAREG_SEQU_ADDRESS,i); |
outb(VGAREG_SEQU_DATA,video_param_table[vpti].sequ_regs[i - 1]); |
} |
|
// Set Grafx Ctl |
for(i=0;i<=8;i++) |
{outb(VGAREG_GRDC_ADDRESS,i); |
outb(VGAREG_GRDC_DATA,video_param_table[vpti].grdc_regs[i]); |
} |
|
// Set CRTC address VGA or MDA |
crtc_addr=vga_modes[line].memmodel==MTEXT?VGAREG_MDA_CRTC_ADDRESS:VGAREG_VGA_CRTC_ADDRESS; |
|
// Disable CRTC write protection |
outw(crtc_addr,0x0011); |
// Set CRTC regs |
for(i=0;i<=0x18;i++) |
{outb(crtc_addr,i); |
outb(crtc_addr+1,video_param_table[vpti].crtc_regs[i]); |
} |
|
// Set the misc register |
outb(VGAREG_WRITE_MISC_OUTPUT,video_param_table[vpti].miscreg); |
|
// Enable video |
outb(VGAREG_ACTL_ADDRESS,0x20); |
inb(VGAREG_ACTL_RESET); |
|
if(noclearmem==0x00) |
{ |
if(vga_modes[line].class==TEXT) |
{ |
memsetw(vga_modes[line].sstart,0,0x0720,0x4000); // 32k |
} |
else |
{ |
if(mode<0x0d) |
{ |
memsetw(vga_modes[line].sstart,0,0x0000,0x4000); // 32k |
} |
else |
{ |
outb( VGAREG_SEQU_ADDRESS, 0x02 ); |
mmask = inb( VGAREG_SEQU_DATA ); |
outb( VGAREG_SEQU_DATA, 0x0f ); // all planes |
memsetw(vga_modes[line].sstart,0,0x0000,0x8000); // 64k |
outb( VGAREG_SEQU_DATA, mmask ); |
} |
} |
} |
|
// Set the BIOS mem |
write_byte(BIOSMEM_SEG,BIOSMEM_CURRENT_MODE,mode); |
write_word(BIOSMEM_SEG,BIOSMEM_NB_COLS,twidth); |
432,11 → 590,24
// FIXME |
write_byte(BIOSMEM_SEG,BIOSMEM_CURRENT_MSR,0x00); // Unavailable on vanilla vga, but... |
write_byte(BIOSMEM_SEG,BIOSMEM_CURRENT_PAL,0x00); // Unavailable on vanilla vga, but... |
|
|
// Write the fonts in memory |
if(vga_modes[line].class==TEXT) |
{ |
ASM_START |
;; copy and activate 8x16 font |
mov ax, #0x1104 |
mov bl, #0x00 |
int #0x10 |
mov ax, #0x1103 |
mov bl, #0x00 |
int #0x10 |
ASM_END |
} |
} |
|
// -------------------------------------------------------------------------------------------- |
static void biosfn_set_cursor_pos (page, cursor) |
static void biosfn_set_cursor_pos (page, cursor) |
Bit8u page;Bit16u cursor; |
{ |
Bit8u xcurs,ycurs,current; |
457,10 → 628,10
nbrows=read_byte(BIOSMEM_SEG,BIOSMEM_NB_ROWS)+1; |
|
xcurs=cursor&0x00ff;ycurs=(cursor&0xff00)>>8; |
|
|
// Calculate the address knowing nbcols nbrows and page num |
address=SCREEN_IO_START(nbcols,nbrows,page)+xcurs+ycurs*nbcols; |
|
|
// CRTC regs 0x0e and 0x0f |
crtc_addr=read_word(BIOSMEM_SEG,BIOSMEM_CRTC_ADDRESS); |
outb(crtc_addr,0x0e); |
467,11 → 638,12
outb(crtc_addr+1,(address&0xff00)>>8); |
outb(crtc_addr,0x0f); |
outb(crtc_addr+1,address&0x00ff); |
outw(0xb800,cursor); |
} |
} |
|
// -------------------------------------------------------------------------------------------- |
static void biosfn_get_cursor_pos (page,shape, pos) |
static void biosfn_get_cursor_pos (page,shape, pos) |
Bit8u page;Bit16u *shape;Bit16u *pos; |
{ |
Bit16u ss=get_SS(); |
555,7 → 727,7
} |
|
// -------------------------------------------------------------------------------------------- |
static void biosfn_write_teletype (car, page, attr, flag) |
static void biosfn_write_teletype (car, page, attr, flag) |
Bit8u car;Bit8u page;Bit8u attr;Bit8u flag; |
{// flag = WITH_ATTR / NO_ATTR |
|
611,10 → 783,10
|
if(vga_modes[line].class==TEXT) |
{ |
// Compute the address |
// Compute the address |
address=SCREEN_MEM_START(nbcols,nbrows,page)+(xcurs+ycurs*nbcols)*2; |
|
// Write the char |
// Write the char |
write_byte(vga_modes[line].sstart,address,car); |
|
if(flag==WITH_ATTR) |
638,7 → 810,7
} |
ycurs-=1; |
} |
|
|
// Set the cursor for the page |
cursor=ycurs; cursor<<=8; cursor+=xcurs; |
biosfn_set_cursor_pos(page,cursor); |
645,7 → 817,134
} |
|
// -------------------------------------------------------------------------------------------- |
static void biosfn_write_string (flag,page,attr,count,row,col,seg,offset) |
static void get_font_access() |
{ |
ASM_START |
mov dx, # VGAREG_SEQU_ADDRESS |
mov ax, #0x0100 |
out dx, ax |
mov ax, #0x0402 |
out dx, ax |
mov ax, #0x0704 |
out dx, ax |
mov ax, #0x0300 |
out dx, ax |
mov dx, # VGAREG_GRDC_ADDRESS |
mov ax, #0x0204 |
out dx, ax |
mov ax, #0x0005 |
out dx, ax |
mov ax, #0x0406 |
out dx, ax |
ASM_END |
} |
|
static void release_font_access() |
{ |
ASM_START |
mov dx, # VGAREG_SEQU_ADDRESS |
mov ax, #0x0100 |
out dx, ax |
mov ax, #0x0302 |
out dx, ax |
mov ax, #0x0304 |
out dx, ax |
mov ax, #0x0300 |
out dx, ax |
mov dx, # VGAREG_READ_MISC_OUTPUT |
in al, dx |
and al, #0x01 |
push cx |
mov cl,*2 |
shl al,cl |
pop cx |
or al, #0x0a |
mov ah, al |
mov al, #0x06 |
mov dx, # VGAREG_GRDC_ADDRESS |
out dx, ax |
mov ax, #0x0004 |
out dx, ax |
mov ax, #0x1005 |
out dx, ax |
ASM_END |
} |
|
ASM_START |
idiv_u: |
xor dx,dx |
div bx |
ret |
ASM_END |
|
static void set_scan_lines(lines) Bit8u lines; |
{ |
Bit16u crtc_addr,cols,page,vde; |
Bit8u crtc_r9,ovl,rows; |
|
crtc_addr = read_word(BIOSMEM_SEG,BIOSMEM_CRTC_ADDRESS); |
outb(crtc_addr, 0x09); |
crtc_r9 = inb(crtc_addr+1); |
crtc_r9 = (crtc_r9 & 0xe0) | (lines - 1); |
outb(crtc_addr+1, crtc_r9); |
/* |
if(lines==8) |
{ |
biosfn_set_cursor_shape(0x06,0x07); |
} |
else |
{ |
biosfn_set_cursor_shape(lines-4,lines-3); |
} |
*/ |
write_word(BIOSMEM_SEG,BIOSMEM_CHAR_HEIGHT, lines); |
outb(crtc_addr, 0x12); |
vde = inb(crtc_addr+1); |
outb(crtc_addr, 0x07); |
ovl = inb(crtc_addr+1); |
vde += (((ovl & 0x02) << 7) + ((ovl & 0x40) << 3) + 1); |
rows = vde / lines; |
write_byte(BIOSMEM_SEG,BIOSMEM_NB_ROWS, rows-1); |
cols = read_word(BIOSMEM_SEG,BIOSMEM_NB_COLS); |
write_word(BIOSMEM_SEG,BIOSMEM_PAGE_SIZE, rows * cols * 2); |
} |
|
// -------------------------------------------------------------------------------------------- |
ASM_START |
biosfn_set_text_block_specifier: |
push ax |
push dx |
mov dx, # VGAREG_SEQU_ADDRESS |
mov ah, bl |
mov al, #0x03 |
out dx, ax |
pop dx |
pop ax |
ret |
ASM_END |
|
// -------------------------------------------------------------------------------------------- |
static void biosfn_load_text_8_16_pat (AL,BL) Bit8u AL;Bit8u BL; |
{ |
Bit16u blockaddr,dest,i,src; |
|
get_font_access(); |
blockaddr = ((BL & 0x03) << 14) + ((BL & 0x04) << 11); |
for(i=0;i<0x100;i++) |
{ |
src = i * 16; |
dest = blockaddr + i * 32; |
memcpyb(0xA000, dest, 0xC000, vgafont16+src, 16); |
} |
release_font_access(); |
if(AL>=0x10) |
{ |
set_scan_lines(16); |
} |
} |
|
// -------------------------------------------------------------------------------------------- |
static void biosfn_write_string (flag,page,attr,count,row,col,seg,offset) |
Bit8u flag;Bit8u page;Bit8u attr;Bit16u count;Bit8u row;Bit8u col;Bit16u seg;Bit16u offset; |
{ |
Bit16u newcurs,oldcurs,dummy; |
662,7 → 961,7
|
newcurs=row; newcurs<<=8; newcurs+=col; |
biosfn_set_cursor_pos(page,newcurs); |
|
|
while(count--!=0) |
{ |
car=read_byte(seg,offset++); |
671,8 → 970,8
|
biosfn_write_teletype(car,page,attr,WITH_ATTR); |
} |
|
// Set back curs pos |
|
// Set back curs pos |
if((flag&0x01)==0) |
biosfn_set_cursor_pos(page,oldcurs); |
} |
682,9 → 981,9
// Video Utils |
// |
// ============================================================================================ |
|
|
// -------------------------------------------------------------------------------------------- |
static Bit8u find_vga_entry(mode) |
static Bit8u find_vga_entry(mode) |
Bit8u mode; |
{ |
Bit8u i,line=0xFF; |
735,6 → 1034,52
} |
|
// -------------------------------------------------------------------------------------------- |
static void memcpyb(dseg,doffset,sseg,soffset,count) |
Bit16u dseg; |
Bit16u doffset; |
Bit16u sseg; |
Bit16u soffset; |
Bit16u count; |
{ |
ASM_START |
push bp |
mov bp, sp |
|
push ax |
push cx |
push es |
push di |
push ds |
push si |
|
mov cx, 12[bp] ; count |
cmp cx, #0x0000 |
je memcpyb_end |
mov ax, 4[bp] ; dsegment |
mov es, ax |
mov ax, 6[bp] ; doffset |
mov di, ax |
mov ax, 8[bp] ; ssegment |
mov ds, ax |
mov ax, 10[bp] ; soffset |
mov si, ax |
cld |
rep |
movsb |
|
memcpyb_end: |
pop si |
pop ds |
pop di |
pop es |
pop cx |
pop ax |
|
pop bp |
ASM_END |
} |
|
// -------------------------------------------------------------------------------------------- |
static void memcpyw(dseg,doffset,sseg,soffset,count) |
Bit16u dseg; |
Bit16u doffset; |
968,9 → 1313,61
ASM_END |
} |
|
void printf(s) |
Bit8u *s; |
{ |
Bit8u c, format_char; |
Boolean in_format; |
unsigned format_width, i; |
Bit16u *arg_ptr; |
Bit16u arg_seg, arg, digit, nibble, shift_count; |
|
arg_ptr = &s; |
arg_seg = get_SS(); |
|
in_format = 0; |
format_width = 0; |
|
while (c = read_byte(0xc000, s)) { |
if ( c == '%' ) { |
in_format = 1; |
format_width = 0; |
} |
else if (in_format) { |
if ( (c>='0') && (c<='9') ) { |
format_width = (format_width * 10) + (c - '0'); |
} |
else if (c == 'x') { |
arg_ptr++; // increment to next arg |
arg = read_word(arg_seg, arg_ptr); |
if (format_width == 0) |
format_width = 4; |
i = 0; |
digit = format_width - 1; |
for (i=0; i<format_width; i++) { |
nibble = (arg >> (4 * digit)) & 0x000f; |
if (nibble <= 9) |
outb(0x0500, nibble + '0'); |
else |
outb(0x0500, (nibble - 10) + 'A'); |
digit--; |
} |
in_format = 0; |
} |
//else if (c == 'd') { |
// in_format = 0; |
// } |
} |
else { |
outb(0x0500, c); |
} |
s ++; |
} |
} |
|
// -------------------------------------------------------------------------------------------- |
|
ASM_START |
ASM_START |
;; DATA_SEG_DEFS_HERE |
ASM_END |
|
/trunk/soc/bios/Makefile
37,19 → 37,31
VGABIOS_DATE = "-DVGABIOS_DATE=\"$(RELDATE)\"" |
|
|
all: run |
all: bios.rom |
|
bios.bin: vgabios.rom ff.rom zet-bios.rom |
cat vgabios.rom ff.rom zet-bios.rom > $@ |
ff.out: ../../bin/ff |
../../bin/ff 8192 >$@ |
|
run: bios.bin |
prf |
%.ml403: %.rom |
hexdump -v -e '4/1 "%02X"' -e '"\n"' $< > ../../impl/virtex4-ml403ep/sim/$@ |
|
%.rom: %.out |
out2rom-ml403 < $< > $@ |
../../bin/out2rom-ml403 ff.out $< >$@ |
|
#vgabios.rom: vgabios.out |
# out2rom-ml403 ff.out $< >$@ |
|
#hd.rom: hd.out |
# out2rom-ml403 ff.out $< >$@ |
|
bios.out: vgabios.out ff.out zet-bios.out |
cat vgabios.out ff.out zet-bios.out > $@ |
|
run: flash.rom |
prf |
|
clean: |
rm -f *.o *.a *.s _rombios*_.c rombios*.txt rombios*.sym |
rm -f *.o *.a *.s _rombios*_.c rombios*.txt rombios*.sym *.out *.rom |
rm -f usage biossums vgasums |
rm -f *.ld86 \ |
temp.awk.* vgabios*.orig _vgabios_* vgabios*.bin vgabios*.txt $(RELEASE).bin *.bak |
79,12 → 91,6
mv vgabios.bin $@ |
./vgasums $@ |
|
%.rom: %.out |
out2rom-ml403 < $< > $@ |
|
%.bin: %.rom |
cat count.rom $< > $@ |
|
%.rtlrom: %.out |
hexdump -v -e '1/1 "%02X"' -e '"\n"' $< > ../../sim/$@ |
|
/trunk/soc/bios/vgafonts.h
0,0 → 1,784
/* |
* These fonts come from ftp://ftp.simtel.net/pub/simtelnet/msdos/screen/fntcol16.zip |
* The package is (c) by Joseph Gil |
* The individual fonts are public domain |
*/ |
static Bit8u vgafont8[256*8]= |
{ |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x7e, 0x81, 0xa5, 0x81, 0xbd, 0x99, 0x81, 0x7e, |
0x7e, 0xff, 0xdb, 0xff, 0xc3, 0xe7, 0xff, 0x7e, |
0x6c, 0xfe, 0xfe, 0xfe, 0x7c, 0x38, 0x10, 0x00, |
0x10, 0x38, 0x7c, 0xfe, 0x7c, 0x38, 0x10, 0x00, |
0x38, 0x7c, 0x38, 0xfe, 0xfe, 0x7c, 0x38, 0x7c, |
0x10, 0x10, 0x38, 0x7c, 0xfe, 0x7c, 0x38, 0x7c, |
0x00, 0x00, 0x18, 0x3c, 0x3c, 0x18, 0x00, 0x00, |
0xff, 0xff, 0xe7, 0xc3, 0xc3, 0xe7, 0xff, 0xff, |
0x00, 0x3c, 0x66, 0x42, 0x42, 0x66, 0x3c, 0x00, |
0xff, 0xc3, 0x99, 0xbd, 0xbd, 0x99, 0xc3, 0xff, |
0x0f, 0x07, 0x0f, 0x7d, 0xcc, 0xcc, 0xcc, 0x78, |
0x3c, 0x66, 0x66, 0x66, 0x3c, 0x18, 0x7e, 0x18, |
0x3f, 0x33, 0x3f, 0x30, 0x30, 0x70, 0xf0, 0xe0, |
0x7f, 0x63, 0x7f, 0x63, 0x63, 0x67, 0xe6, 0xc0, |
0x99, 0x5a, 0x3c, 0xe7, 0xe7, 0x3c, 0x5a, 0x99, |
0x80, 0xe0, 0xf8, 0xfe, 0xf8, 0xe0, 0x80, 0x00, |
0x02, 0x0e, 0x3e, 0xfe, 0x3e, 0x0e, 0x02, 0x00, |
0x18, 0x3c, 0x7e, 0x18, 0x18, 0x7e, 0x3c, 0x18, |
0x66, 0x66, 0x66, 0x66, 0x66, 0x00, 0x66, 0x00, |
0x7f, 0xdb, 0xdb, 0x7b, 0x1b, 0x1b, 0x1b, 0x00, |
0x3e, 0x63, 0x38, 0x6c, 0x6c, 0x38, 0xcc, 0x78, |
0x00, 0x00, 0x00, 0x00, 0x7e, 0x7e, 0x7e, 0x00, |
0x18, 0x3c, 0x7e, 0x18, 0x7e, 0x3c, 0x18, 0xff, |
0x18, 0x3c, 0x7e, 0x18, 0x18, 0x18, 0x18, 0x00, |
0x18, 0x18, 0x18, 0x18, 0x7e, 0x3c, 0x18, 0x00, |
0x00, 0x18, 0x0c, 0xfe, 0x0c, 0x18, 0x00, 0x00, |
0x00, 0x30, 0x60, 0xfe, 0x60, 0x30, 0x00, 0x00, |
0x00, 0x00, 0xc0, 0xc0, 0xc0, 0xfe, 0x00, 0x00, |
0x00, 0x24, 0x66, 0xff, 0x66, 0x24, 0x00, 0x00, |
0x00, 0x18, 0x3c, 0x7e, 0xff, 0xff, 0x00, 0x00, |
0x00, 0xff, 0xff, 0x7e, 0x3c, 0x18, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x30, 0x78, 0x78, 0x30, 0x30, 0x00, 0x30, 0x00, |
0x6c, 0x6c, 0x6c, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x6c, 0x6c, 0xfe, 0x6c, 0xfe, 0x6c, 0x6c, 0x00, |
0x30, 0x7c, 0xc0, 0x78, 0x0c, 0xf8, 0x30, 0x00, |
0x00, 0xc6, 0xcc, 0x18, 0x30, 0x66, 0xc6, 0x00, |
0x38, 0x6c, 0x38, 0x76, 0xdc, 0xcc, 0x76, 0x00, |
0x60, 0x60, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x18, 0x30, 0x60, 0x60, 0x60, 0x30, 0x18, 0x00, |
0x60, 0x30, 0x18, 0x18, 0x18, 0x30, 0x60, 0x00, |
0x00, 0x66, 0x3c, 0xff, 0x3c, 0x66, 0x00, 0x00, |
0x00, 0x30, 0x30, 0xfc, 0x30, 0x30, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x30, 0x60, |
0x00, 0x00, 0x00, 0xfc, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x30, 0x00, |
0x06, 0x0c, 0x18, 0x30, 0x60, 0xc0, 0x80, 0x00, |
0x7c, 0xc6, 0xce, 0xde, 0xf6, 0xe6, 0x7c, 0x00, |
0x30, 0x70, 0x30, 0x30, 0x30, 0x30, 0xfc, 0x00, |
0x78, 0xcc, 0x0c, 0x38, 0x60, 0xcc, 0xfc, 0x00, |
0x78, 0xcc, 0x0c, 0x38, 0x0c, 0xcc, 0x78, 0x00, |
0x1c, 0x3c, 0x6c, 0xcc, 0xfe, 0x0c, 0x1e, 0x00, |
0xfc, 0xc0, 0xf8, 0x0c, 0x0c, 0xcc, 0x78, 0x00, |
0x38, 0x60, 0xc0, 0xf8, 0xcc, 0xcc, 0x78, 0x00, |
0xfc, 0xcc, 0x0c, 0x18, 0x30, 0x30, 0x30, 0x00, |
0x78, 0xcc, 0xcc, 0x78, 0xcc, 0xcc, 0x78, 0x00, |
0x78, 0xcc, 0xcc, 0x7c, 0x0c, 0x18, 0x70, 0x00, |
0x00, 0x30, 0x30, 0x00, 0x00, 0x30, 0x30, 0x00, |
0x00, 0x30, 0x30, 0x00, 0x00, 0x30, 0x30, 0x60, |
0x18, 0x30, 0x60, 0xc0, 0x60, 0x30, 0x18, 0x00, |
0x00, 0x00, 0xfc, 0x00, 0x00, 0xfc, 0x00, 0x00, |
0x60, 0x30, 0x18, 0x0c, 0x18, 0x30, 0x60, 0x00, |
0x78, 0xcc, 0x0c, 0x18, 0x30, 0x00, 0x30, 0x00, |
0x7c, 0xc6, 0xde, 0xde, 0xde, 0xc0, 0x78, 0x00, |
0x30, 0x78, 0xcc, 0xcc, 0xfc, 0xcc, 0xcc, 0x00, |
0xfc, 0x66, 0x66, 0x7c, 0x66, 0x66, 0xfc, 0x00, |
0x3c, 0x66, 0xc0, 0xc0, 0xc0, 0x66, 0x3c, 0x00, |
0xf8, 0x6c, 0x66, 0x66, 0x66, 0x6c, 0xf8, 0x00, |
0xfe, 0x62, 0x68, 0x78, 0x68, 0x62, 0xfe, 0x00, |
0xfe, 0x62, 0x68, 0x78, 0x68, 0x60, 0xf0, 0x00, |
0x3c, 0x66, 0xc0, 0xc0, 0xce, 0x66, 0x3e, 0x00, |
0xcc, 0xcc, 0xcc, 0xfc, 0xcc, 0xcc, 0xcc, 0x00, |
0x78, 0x30, 0x30, 0x30, 0x30, 0x30, 0x78, 0x00, |
0x1e, 0x0c, 0x0c, 0x0c, 0xcc, 0xcc, 0x78, 0x00, |
0xe6, 0x66, 0x6c, 0x78, 0x6c, 0x66, 0xe6, 0x00, |
0xf0, 0x60, 0x60, 0x60, 0x62, 0x66, 0xfe, 0x00, |
0xc6, 0xee, 0xfe, 0xfe, 0xd6, 0xc6, 0xc6, 0x00, |
0xc6, 0xe6, 0xf6, 0xde, 0xce, 0xc6, 0xc6, 0x00, |
0x38, 0x6c, 0xc6, 0xc6, 0xc6, 0x6c, 0x38, 0x00, |
0xfc, 0x66, 0x66, 0x7c, 0x60, 0x60, 0xf0, 0x00, |
0x78, 0xcc, 0xcc, 0xcc, 0xdc, 0x78, 0x1c, 0x00, |
0xfc, 0x66, 0x66, 0x7c, 0x6c, 0x66, 0xe6, 0x00, |
0x78, 0xcc, 0xe0, 0x70, 0x1c, 0xcc, 0x78, 0x00, |
0xfc, 0xb4, 0x30, 0x30, 0x30, 0x30, 0x78, 0x00, |
0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xfc, 0x00, |
0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0x78, 0x30, 0x00, |
0xc6, 0xc6, 0xc6, 0xd6, 0xfe, 0xee, 0xc6, 0x00, |
0xc6, 0xc6, 0x6c, 0x38, 0x38, 0x6c, 0xc6, 0x00, |
0xcc, 0xcc, 0xcc, 0x78, 0x30, 0x30, 0x78, 0x00, |
0xfe, 0xc6, 0x8c, 0x18, 0x32, 0x66, 0xfe, 0x00, |
0x78, 0x60, 0x60, 0x60, 0x60, 0x60, 0x78, 0x00, |
0xc0, 0x60, 0x30, 0x18, 0x0c, 0x06, 0x02, 0x00, |
0x78, 0x18, 0x18, 0x18, 0x18, 0x18, 0x78, 0x00, |
0x10, 0x38, 0x6c, 0xc6, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, |
0x30, 0x30, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x78, 0x0c, 0x7c, 0xcc, 0x76, 0x00, |
0xe0, 0x60, 0x60, 0x7c, 0x66, 0x66, 0xdc, 0x00, |
0x00, 0x00, 0x78, 0xcc, 0xc0, 0xcc, 0x78, 0x00, |
0x1c, 0x0c, 0x0c, 0x7c, 0xcc, 0xcc, 0x76, 0x00, |
0x00, 0x00, 0x78, 0xcc, 0xfc, 0xc0, 0x78, 0x00, |
0x38, 0x6c, 0x60, 0xf0, 0x60, 0x60, 0xf0, 0x00, |
0x00, 0x00, 0x76, 0xcc, 0xcc, 0x7c, 0x0c, 0xf8, |
0xe0, 0x60, 0x6c, 0x76, 0x66, 0x66, 0xe6, 0x00, |
0x30, 0x00, 0x70, 0x30, 0x30, 0x30, 0x78, 0x00, |
0x0c, 0x00, 0x0c, 0x0c, 0x0c, 0xcc, 0xcc, 0x78, |
0xe0, 0x60, 0x66, 0x6c, 0x78, 0x6c, 0xe6, 0x00, |
0x70, 0x30, 0x30, 0x30, 0x30, 0x30, 0x78, 0x00, |
0x00, 0x00, 0xcc, 0xfe, 0xfe, 0xd6, 0xc6, 0x00, |
0x00, 0x00, 0xf8, 0xcc, 0xcc, 0xcc, 0xcc, 0x00, |
0x00, 0x00, 0x78, 0xcc, 0xcc, 0xcc, 0x78, 0x00, |
0x00, 0x00, 0xdc, 0x66, 0x66, 0x7c, 0x60, 0xf0, |
0x00, 0x00, 0x76, 0xcc, 0xcc, 0x7c, 0x0c, 0x1e, |
0x00, 0x00, 0xdc, 0x76, 0x66, 0x60, 0xf0, 0x00, |
0x00, 0x00, 0x7c, 0xc0, 0x78, 0x0c, 0xf8, 0x00, |
0x10, 0x30, 0x7c, 0x30, 0x30, 0x34, 0x18, 0x00, |
0x00, 0x00, 0xcc, 0xcc, 0xcc, 0xcc, 0x76, 0x00, |
0x00, 0x00, 0xcc, 0xcc, 0xcc, 0x78, 0x30, 0x00, |
0x00, 0x00, 0xc6, 0xd6, 0xfe, 0xfe, 0x6c, 0x00, |
0x00, 0x00, 0xc6, 0x6c, 0x38, 0x6c, 0xc6, 0x00, |
0x00, 0x00, 0xcc, 0xcc, 0xcc, 0x7c, 0x0c, 0xf8, |
0x00, 0x00, 0xfc, 0x98, 0x30, 0x64, 0xfc, 0x00, |
0x1c, 0x30, 0x30, 0xe0, 0x30, 0x30, 0x1c, 0x00, |
0x18, 0x18, 0x18, 0x00, 0x18, 0x18, 0x18, 0x00, |
0xe0, 0x30, 0x30, 0x1c, 0x30, 0x30, 0xe0, 0x00, |
0x76, 0xdc, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x10, 0x38, 0x6c, 0xc6, 0xc6, 0xfe, 0x00, |
0x78, 0xcc, 0xc0, 0xcc, 0x78, 0x18, 0x0c, 0x78, |
0x00, 0xcc, 0x00, 0xcc, 0xcc, 0xcc, 0x7e, 0x00, |
0x1c, 0x00, 0x78, 0xcc, 0xfc, 0xc0, 0x78, 0x00, |
0x7e, 0xc3, 0x3c, 0x06, 0x3e, 0x66, 0x3f, 0x00, |
0xcc, 0x00, 0x78, 0x0c, 0x7c, 0xcc, 0x7e, 0x00, |
0xe0, 0x00, 0x78, 0x0c, 0x7c, 0xcc, 0x7e, 0x00, |
0x30, 0x30, 0x78, 0x0c, 0x7c, 0xcc, 0x7e, 0x00, |
0x00, 0x00, 0x78, 0xc0, 0xc0, 0x78, 0x0c, 0x38, |
0x7e, 0xc3, 0x3c, 0x66, 0x7e, 0x60, 0x3c, 0x00, |
0xcc, 0x00, 0x78, 0xcc, 0xfc, 0xc0, 0x78, 0x00, |
0xe0, 0x00, 0x78, 0xcc, 0xfc, 0xc0, 0x78, 0x00, |
0xcc, 0x00, 0x70, 0x30, 0x30, 0x30, 0x78, 0x00, |
0x7c, 0xc6, 0x38, 0x18, 0x18, 0x18, 0x3c, 0x00, |
0xe0, 0x00, 0x70, 0x30, 0x30, 0x30, 0x78, 0x00, |
0xc6, 0x38, 0x6c, 0xc6, 0xfe, 0xc6, 0xc6, 0x00, |
0x30, 0x30, 0x00, 0x78, 0xcc, 0xfc, 0xcc, 0x00, |
0x1c, 0x00, 0xfc, 0x60, 0x78, 0x60, 0xfc, 0x00, |
0x00, 0x00, 0x7f, 0x0c, 0x7f, 0xcc, 0x7f, 0x00, |
0x3e, 0x6c, 0xcc, 0xfe, 0xcc, 0xcc, 0xce, 0x00, |
0x78, 0xcc, 0x00, 0x78, 0xcc, 0xcc, 0x78, 0x00, |
0x00, 0xcc, 0x00, 0x78, 0xcc, 0xcc, 0x78, 0x00, |
0x00, 0xe0, 0x00, 0x78, 0xcc, 0xcc, 0x78, 0x00, |
0x78, 0xcc, 0x00, 0xcc, 0xcc, 0xcc, 0x7e, 0x00, |
0x00, 0xe0, 0x00, 0xcc, 0xcc, 0xcc, 0x7e, 0x00, |
0x00, 0xcc, 0x00, 0xcc, 0xcc, 0x7c, 0x0c, 0xf8, |
0xc3, 0x18, 0x3c, 0x66, 0x66, 0x3c, 0x18, 0x00, |
0xcc, 0x00, 0xcc, 0xcc, 0xcc, 0xcc, 0x78, 0x00, |
0x18, 0x18, 0x7e, 0xc0, 0xc0, 0x7e, 0x18, 0x18, |
0x38, 0x6c, 0x64, 0xf0, 0x60, 0xe6, 0xfc, 0x00, |
0xcc, 0xcc, 0x78, 0xfc, 0x30, 0xfc, 0x30, 0x30, |
0xf8, 0xcc, 0xcc, 0xfa, 0xc6, 0xcf, 0xc6, 0xc7, |
0x0e, 0x1b, 0x18, 0x3c, 0x18, 0x18, 0xd8, 0x70, |
0x1c, 0x00, 0x78, 0x0c, 0x7c, 0xcc, 0x7e, 0x00, |
0x38, 0x00, 0x70, 0x30, 0x30, 0x30, 0x78, 0x00, |
0x00, 0x1c, 0x00, 0x78, 0xcc, 0xcc, 0x78, 0x00, |
0x00, 0x1c, 0x00, 0xcc, 0xcc, 0xcc, 0x7e, 0x00, |
0x00, 0xf8, 0x00, 0xf8, 0xcc, 0xcc, 0xcc, 0x00, |
0xfc, 0x00, 0xcc, 0xec, 0xfc, 0xdc, 0xcc, 0x00, |
0x3c, 0x6c, 0x6c, 0x3e, 0x00, 0x7e, 0x00, 0x00, |
0x38, 0x6c, 0x6c, 0x38, 0x00, 0x7c, 0x00, 0x00, |
0x30, 0x00, 0x30, 0x60, 0xc0, 0xcc, 0x78, 0x00, |
0x00, 0x00, 0x00, 0xfc, 0xc0, 0xc0, 0x00, 0x00, |
0x00, 0x00, 0x00, 0xfc, 0x0c, 0x0c, 0x00, 0x00, |
0xc3, 0xc6, 0xcc, 0xde, 0x33, 0x66, 0xcc, 0x0f, |
0xc3, 0xc6, 0xcc, 0xdb, 0x37, 0x6f, 0xcf, 0x03, |
0x18, 0x18, 0x00, 0x18, 0x18, 0x18, 0x18, 0x00, |
0x00, 0x33, 0x66, 0xcc, 0x66, 0x33, 0x00, 0x00, |
0x00, 0xcc, 0x66, 0x33, 0x66, 0xcc, 0x00, 0x00, |
0x22, 0x88, 0x22, 0x88, 0x22, 0x88, 0x22, 0x88, |
0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, |
0xdb, 0x77, 0xdb, 0xee, 0xdb, 0x77, 0xdb, 0xee, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x18, 0x18, 0xf8, 0x18, 0x18, 0x18, |
0x18, 0x18, 0xf8, 0x18, 0xf8, 0x18, 0x18, 0x18, |
0x36, 0x36, 0x36, 0x36, 0xf6, 0x36, 0x36, 0x36, |
0x00, 0x00, 0x00, 0x00, 0xfe, 0x36, 0x36, 0x36, |
0x00, 0x00, 0xf8, 0x18, 0xf8, 0x18, 0x18, 0x18, |
0x36, 0x36, 0xf6, 0x06, 0xf6, 0x36, 0x36, 0x36, |
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x00, 0x00, 0xfe, 0x06, 0xf6, 0x36, 0x36, 0x36, |
0x36, 0x36, 0xf6, 0x06, 0xfe, 0x00, 0x00, 0x00, |
0x36, 0x36, 0x36, 0x36, 0xfe, 0x00, 0x00, 0x00, |
0x18, 0x18, 0xf8, 0x18, 0xf8, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0xf8, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x18, 0x18, 0x1f, 0x00, 0x00, 0x00, |
0x18, 0x18, 0x18, 0x18, 0xff, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0xff, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x18, 0x18, 0x1f, 0x18, 0x18, 0x18, |
0x00, 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00, |
0x18, 0x18, 0x18, 0x18, 0xff, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x1f, 0x18, 0x1f, 0x18, 0x18, 0x18, |
0x36, 0x36, 0x36, 0x36, 0x37, 0x36, 0x36, 0x36, |
0x36, 0x36, 0x37, 0x30, 0x3f, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3f, 0x30, 0x37, 0x36, 0x36, 0x36, |
0x36, 0x36, 0xf7, 0x00, 0xff, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xff, 0x00, 0xf7, 0x36, 0x36, 0x36, |
0x36, 0x36, 0x37, 0x30, 0x37, 0x36, 0x36, 0x36, |
0x00, 0x00, 0xff, 0x00, 0xff, 0x00, 0x00, 0x00, |
0x36, 0x36, 0xf7, 0x00, 0xf7, 0x36, 0x36, 0x36, |
0x18, 0x18, 0xff, 0x00, 0xff, 0x00, 0x00, 0x00, |
0x36, 0x36, 0x36, 0x36, 0xff, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xff, 0x00, 0xff, 0x18, 0x18, 0x18, |
0x00, 0x00, 0x00, 0x00, 0xff, 0x36, 0x36, 0x36, |
0x36, 0x36, 0x36, 0x36, 0x3f, 0x00, 0x00, 0x00, |
0x18, 0x18, 0x1f, 0x18, 0x1f, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x1f, 0x18, 0x1f, 0x18, 0x18, 0x18, |
0x00, 0x00, 0x00, 0x00, 0x3f, 0x36, 0x36, 0x36, |
0x36, 0x36, 0x36, 0x36, 0xff, 0x36, 0x36, 0x36, |
0x18, 0x18, 0xff, 0x18, 0xff, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x18, 0x18, 0xf8, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x1f, 0x18, 0x18, 0x18, |
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, |
0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, |
0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, |
0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x76, 0xdc, 0xc8, 0xdc, 0x76, 0x00, |
0x00, 0x78, 0xcc, 0xf8, 0xcc, 0xf8, 0xc0, 0xc0, |
0x00, 0xfc, 0xcc, 0xc0, 0xc0, 0xc0, 0xc0, 0x00, |
0x00, 0xfe, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x00, |
0xfc, 0xcc, 0x60, 0x30, 0x60, 0xcc, 0xfc, 0x00, |
0x00, 0x00, 0x7e, 0xd8, 0xd8, 0xd8, 0x70, 0x00, |
0x00, 0x66, 0x66, 0x66, 0x66, 0x7c, 0x60, 0xc0, |
0x00, 0x76, 0xdc, 0x18, 0x18, 0x18, 0x18, 0x00, |
0xfc, 0x30, 0x78, 0xcc, 0xcc, 0x78, 0x30, 0xfc, |
0x38, 0x6c, 0xc6, 0xfe, 0xc6, 0x6c, 0x38, 0x00, |
0x38, 0x6c, 0xc6, 0xc6, 0x6c, 0x6c, 0xee, 0x00, |
0x1c, 0x30, 0x18, 0x7c, 0xcc, 0xcc, 0x78, 0x00, |
0x00, 0x00, 0x7e, 0xdb, 0xdb, 0x7e, 0x00, 0x00, |
0x06, 0x0c, 0x7e, 0xdb, 0xdb, 0x7e, 0x60, 0xc0, |
0x38, 0x60, 0xc0, 0xf8, 0xc0, 0x60, 0x38, 0x00, |
0x78, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0x00, |
0x00, 0xfc, 0x00, 0xfc, 0x00, 0xfc, 0x00, 0x00, |
0x30, 0x30, 0xfc, 0x30, 0x30, 0x00, 0xfc, 0x00, |
0x60, 0x30, 0x18, 0x30, 0x60, 0x00, 0xfc, 0x00, |
0x18, 0x30, 0x60, 0x30, 0x18, 0x00, 0xfc, 0x00, |
0x0e, 0x1b, 0x1b, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x18, 0x18, 0x18, 0xd8, 0xd8, 0x70, |
0x30, 0x30, 0x00, 0xfc, 0x00, 0x30, 0x30, 0x00, |
0x00, 0x76, 0xdc, 0x00, 0x76, 0xdc, 0x00, 0x00, |
0x38, 0x6c, 0x6c, 0x38, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, |
0x0f, 0x0c, 0x0c, 0x0c, 0xec, 0x6c, 0x3c, 0x1c, |
0x78, 0x6c, 0x6c, 0x6c, 0x6c, 0x00, 0x00, 0x00, |
0x70, 0x18, 0x30, 0x60, 0x78, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3c, 0x3c, 0x3c, 0x3c, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 |
}; |
static Bit8u vgafont14[256*14]= |
{ |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7e, 0x81, 0xa5, 0x81, 0x81, 0xbd, 0x99, 0x81, 0x7e, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7e, 0xff, 0xdb, 0xff, 0xff, 0xc3, 0xe7, 0xff, 0x7e, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x6c, 0xfe, 0xfe, 0xfe, 0xfe, 0x7c, 0x38, 0x10, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x10, 0x38, 0x7c, 0xfe, 0x7c, 0x38, 0x10, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x3c, 0x3c, 0xe7, 0xe7, 0xe7, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x3c, 0x7e, 0xff, 0xff, 0x7e, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x3c, 0x3c, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, |
0xff, 0xff, 0xff, 0xff, 0xff, 0xe7, 0xc3, 0xc3, 0xe7, 0xff, 0xff, 0xff, 0xff, 0xff, |
0x00, 0x00, 0x00, 0x00, 0x3c, 0x66, 0x42, 0x42, 0x66, 0x3c, 0x00, 0x00, 0x00, 0x00, |
0xff, 0xff, 0xff, 0xff, 0xc3, 0x99, 0xbd, 0xbd, 0x99, 0xc3, 0xff, 0xff, 0xff, 0xff, |
0x00, 0x00, 0x1e, 0x0e, 0x1a, 0x32, 0x78, 0xcc, 0xcc, 0xcc, 0x78, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3c, 0x66, 0x66, 0x66, 0x3c, 0x18, 0x7e, 0x18, 0x18, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3f, 0x33, 0x3f, 0x30, 0x30, 0x30, 0x70, 0xf0, 0xe0, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7f, 0x63, 0x7f, 0x63, 0x63, 0x63, 0x67, 0xe7, 0xe6, 0xc0, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x18, 0xdb, 0x3c, 0xe7, 0x3c, 0xdb, 0x18, 0x18, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x80, 0xc0, 0xe0, 0xf8, 0xfe, 0xf8, 0xe0, 0xc0, 0x80, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x02, 0x06, 0x0e, 0x3e, 0xfe, 0x3e, 0x0e, 0x06, 0x02, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x3c, 0x7e, 0x18, 0x18, 0x18, 0x7e, 0x3c, 0x18, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x00, 0x66, 0x66, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7f, 0xdb, 0xdb, 0xdb, 0x7b, 0x1b, 0x1b, 0x1b, 0x1b, 0x00, 0x00, 0x00, |
0x00, 0x7c, 0xc6, 0x60, 0x38, 0x6c, 0xc6, 0xc6, 0x6c, 0x38, 0x0c, 0xc6, 0x7c, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xfe, 0xfe, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x3c, 0x7e, 0x18, 0x18, 0x18, 0x7e, 0x3c, 0x18, 0x7e, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x3c, 0x7e, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x7e, 0x3c, 0x18, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x18, 0x0c, 0xfe, 0x0c, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x30, 0x60, 0xfe, 0x60, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xc0, 0xc0, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x28, 0x6c, 0xfe, 0x6c, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x10, 0x38, 0x38, 0x7c, 0x7c, 0xfe, 0xfe, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0xfe, 0xfe, 0x7c, 0x7c, 0x38, 0x38, 0x10, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x3c, 0x3c, 0x3c, 0x18, 0x18, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, |
0x00, 0x66, 0x66, 0x66, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x6c, 0x6c, 0xfe, 0x6c, 0x6c, 0x6c, 0xfe, 0x6c, 0x6c, 0x00, 0x00, 0x00, |
0x18, 0x18, 0x7c, 0xc6, 0xc2, 0xc0, 0x7c, 0x06, 0x86, 0xc6, 0x7c, 0x18, 0x18, 0x00, |
0x00, 0x00, 0x00, 0x00, 0xc2, 0xc6, 0x0c, 0x18, 0x30, 0x66, 0xc6, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x38, 0x6c, 0x6c, 0x38, 0x76, 0xdc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, |
0x00, 0x30, 0x30, 0x30, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x0c, 0x18, 0x30, 0x30, 0x30, 0x30, 0x30, 0x18, 0x0c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x30, 0x18, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x18, 0x30, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x66, 0x3c, 0xff, 0x3c, 0x66, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x7e, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x30, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x02, 0x06, 0x0c, 0x18, 0x30, 0x60, 0xc0, 0x80, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7c, 0xc6, 0xce, 0xde, 0xf6, 0xe6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x38, 0x78, 0x18, 0x18, 0x18, 0x18, 0x18, 0x7e, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7c, 0xc6, 0x06, 0x0c, 0x18, 0x30, 0x60, 0xc6, 0xfe, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7c, 0xc6, 0x06, 0x06, 0x3c, 0x06, 0x06, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x0c, 0x1c, 0x3c, 0x6c, 0xcc, 0xfe, 0x0c, 0x0c, 0x1e, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xfe, 0xc0, 0xc0, 0xc0, 0xfc, 0x06, 0x06, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x38, 0x60, 0xc0, 0xc0, 0xfc, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xfe, 0xc6, 0x06, 0x0c, 0x18, 0x30, 0x30, 0x30, 0x30, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0x7c, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0x7e, 0x06, 0x06, 0x0c, 0x78, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x18, 0x18, 0x30, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x06, 0x0c, 0x18, 0x30, 0x60, 0x30, 0x18, 0x0c, 0x06, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x00, 0x00, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x60, 0x30, 0x18, 0x0c, 0x06, 0x0c, 0x18, 0x30, 0x60, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7c, 0xc6, 0xc6, 0x0c, 0x18, 0x18, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7c, 0xc6, 0xc6, 0xde, 0xde, 0xde, 0xdc, 0xc0, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x10, 0x38, 0x6c, 0xc6, 0xc6, 0xfe, 0xc6, 0xc6, 0xc6, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xfc, 0x66, 0x66, 0x66, 0x7c, 0x66, 0x66, 0x66, 0xfc, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3c, 0x66, 0xc2, 0xc0, 0xc0, 0xc0, 0xc2, 0x66, 0x3c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xf8, 0x6c, 0x66, 0x66, 0x66, 0x66, 0x66, 0x6c, 0xf8, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xfe, 0x66, 0x62, 0x68, 0x78, 0x68, 0x62, 0x66, 0xfe, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xfe, 0x66, 0x62, 0x68, 0x78, 0x68, 0x60, 0x60, 0xf0, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3c, 0x66, 0xc2, 0xc0, 0xc0, 0xde, 0xc6, 0x66, 0x3a, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc6, 0xc6, 0xc6, 0xc6, 0xfe, 0xc6, 0xc6, 0xc6, 0xc6, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3c, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x1e, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0xcc, 0xcc, 0x78, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xe6, 0x66, 0x6c, 0x6c, 0x78, 0x6c, 0x6c, 0x66, 0xe6, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xf0, 0x60, 0x60, 0x60, 0x60, 0x60, 0x62, 0x66, 0xfe, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc6, 0xee, 0xfe, 0xfe, 0xd6, 0xc6, 0xc6, 0xc6, 0xc6, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc6, 0xe6, 0xf6, 0xfe, 0xde, 0xce, 0xc6, 0xc6, 0xc6, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x38, 0x6c, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x6c, 0x38, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xfc, 0x66, 0x66, 0x66, 0x7c, 0x60, 0x60, 0x60, 0xf0, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0xd6, 0xde, 0x7c, 0x0c, 0x0e, 0x00, 0x00, |
0x00, 0x00, 0xfc, 0x66, 0x66, 0x66, 0x7c, 0x6c, 0x66, 0x66, 0xe6, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7c, 0xc6, 0xc6, 0x60, 0x38, 0x0c, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7e, 0x7e, 0x5a, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x6c, 0x38, 0x10, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc6, 0xc6, 0xc6, 0xc6, 0xd6, 0xd6, 0xfe, 0x7c, 0x6c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc6, 0xc6, 0x6c, 0x38, 0x38, 0x38, 0x6c, 0xc6, 0xc6, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x3c, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xfe, 0xc6, 0x8c, 0x18, 0x30, 0x60, 0xc2, 0xc6, 0xfe, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3c, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x3c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x80, 0xc0, 0xe0, 0x70, 0x38, 0x1c, 0x0e, 0x06, 0x02, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x3c, 0x00, 0x00, 0x00, |
0x10, 0x38, 0x6c, 0xc6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, |
0x30, 0x30, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x0c, 0x7c, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xe0, 0x60, 0x60, 0x78, 0x6c, 0x66, 0x66, 0x66, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, 0xc6, 0xc0, 0xc0, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x1c, 0x0c, 0x0c, 0x3c, 0x6c, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, 0xc6, 0xfe, 0xc0, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x38, 0x6c, 0x64, 0x60, 0xf0, 0x60, 0x60, 0x60, 0xf0, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x76, 0xcc, 0xcc, 0xcc, 0x7c, 0x0c, 0xcc, 0x78, 0x00, |
0x00, 0x00, 0xe0, 0x60, 0x60, 0x6c, 0x76, 0x66, 0x66, 0x66, 0xe6, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x18, 0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x06, 0x06, 0x00, 0x0e, 0x06, 0x06, 0x06, 0x06, 0x66, 0x66, 0x3c, 0x00, |
0x00, 0x00, 0xe0, 0x60, 0x60, 0x66, 0x6c, 0x78, 0x6c, 0x66, 0xe6, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xec, 0xfe, 0xd6, 0xd6, 0xd6, 0xc6, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xdc, 0x66, 0x66, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xdc, 0x66, 0x66, 0x66, 0x7c, 0x60, 0x60, 0xf0, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x76, 0xcc, 0xcc, 0xcc, 0x7c, 0x0c, 0x0c, 0x1e, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xdc, 0x76, 0x66, 0x60, 0x60, 0xf0, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, 0xc6, 0x70, 0x1c, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x10, 0x30, 0x30, 0xfc, 0x30, 0x30, 0x30, 0x36, 0x1c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x3c, 0x18, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xc6, 0xc6, 0xd6, 0xd6, 0xfe, 0x6c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xc6, 0x6c, 0x38, 0x38, 0x6c, 0xc6, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xc6, 0xc6, 0xc6, 0xc6, 0x7e, 0x06, 0x0c, 0xf8, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xcc, 0x18, 0x30, 0x66, 0xfe, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x0e, 0x18, 0x18, 0x18, 0x70, 0x18, 0x18, 0x18, 0x0e, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0x00, 0x18, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x70, 0x18, 0x18, 0x18, 0x0e, 0x18, 0x18, 0x18, 0x70, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x76, 0xdc, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x6c, 0xc6, 0xc6, 0xfe, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3c, 0x66, 0xc2, 0xc0, 0xc0, 0xc2, 0x66, 0x3c, 0x0c, 0x06, 0x7c, 0x00, |
0x00, 0x00, 0xcc, 0xcc, 0x00, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, |
0x00, 0x0c, 0x18, 0x30, 0x00, 0x7c, 0xc6, 0xfe, 0xc0, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x10, 0x38, 0x6c, 0x00, 0x78, 0x0c, 0x7c, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xcc, 0xcc, 0x00, 0x78, 0x0c, 0x7c, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, |
0x00, 0x60, 0x30, 0x18, 0x00, 0x78, 0x0c, 0x7c, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, |
0x00, 0x38, 0x6c, 0x38, 0x00, 0x78, 0x0c, 0x7c, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x3c, 0x66, 0x60, 0x66, 0x3c, 0x0c, 0x06, 0x3c, 0x00, 0x00, |
0x00, 0x10, 0x38, 0x6c, 0x00, 0x7c, 0xc6, 0xfe, 0xc0, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xcc, 0xcc, 0x00, 0x7c, 0xc6, 0xfe, 0xc0, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x60, 0x30, 0x18, 0x00, 0x7c, 0xc6, 0xfe, 0xc0, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x66, 0x66, 0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, |
0x00, 0x18, 0x3c, 0x66, 0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, |
0x00, 0x60, 0x30, 0x18, 0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, |
0x00, 0xc6, 0xc6, 0x10, 0x38, 0x6c, 0xc6, 0xc6, 0xfe, 0xc6, 0xc6, 0x00, 0x00, 0x00, |
0x38, 0x6c, 0x38, 0x00, 0x38, 0x6c, 0xc6, 0xc6, 0xfe, 0xc6, 0xc6, 0x00, 0x00, 0x00, |
0x18, 0x30, 0x60, 0x00, 0xfe, 0x66, 0x60, 0x7c, 0x60, 0x66, 0xfe, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0xcc, 0x76, 0x36, 0x7e, 0xd8, 0xd8, 0x6e, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3e, 0x6c, 0xcc, 0xcc, 0xfe, 0xcc, 0xcc, 0xcc, 0xce, 0x00, 0x00, 0x00, |
0x00, 0x10, 0x38, 0x6c, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc6, 0xc6, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x60, 0x30, 0x18, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x30, 0x78, 0xcc, 0x00, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, |
0x00, 0x60, 0x30, 0x18, 0x00, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc6, 0xc6, 0x00, 0xc6, 0xc6, 0xc6, 0xc6, 0x7e, 0x06, 0x0c, 0x78, 0x00, |
0x00, 0xc6, 0xc6, 0x38, 0x6c, 0xc6, 0xc6, 0xc6, 0xc6, 0x6c, 0x38, 0x00, 0x00, 0x00, |
0x00, 0xc6, 0xc6, 0x00, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x18, 0x18, 0x3c, 0x66, 0x60, 0x60, 0x66, 0x3c, 0x18, 0x18, 0x00, 0x00, 0x00, |
0x00, 0x38, 0x6c, 0x64, 0x60, 0xf0, 0x60, 0x60, 0x60, 0xe6, 0xfc, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x66, 0x66, 0x3c, 0x18, 0x7e, 0x18, 0x7e, 0x18, 0x18, 0x00, 0x00, 0x00, |
0x00, 0xf8, 0xcc, 0xcc, 0xf8, 0xc4, 0xcc, 0xde, 0xcc, 0xcc, 0xc6, 0x00, 0x00, 0x00, |
0x00, 0x0e, 0x1b, 0x18, 0x18, 0x18, 0x7e, 0x18, 0x18, 0x18, 0x18, 0xd8, 0x70, 0x00, |
0x00, 0x18, 0x30, 0x60, 0x00, 0x78, 0x0c, 0x7c, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, |
0x00, 0x0c, 0x18, 0x30, 0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, |
0x00, 0x18, 0x30, 0x60, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x18, 0x30, 0x60, 0x00, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x76, 0xdc, 0x00, 0xdc, 0x66, 0x66, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00, |
0x76, 0xdc, 0x00, 0xc6, 0xe6, 0xf6, 0xfe, 0xde, 0xce, 0xc6, 0xc6, 0x00, 0x00, 0x00, |
0x00, 0x3c, 0x6c, 0x6c, 0x3e, 0x00, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x38, 0x6c, 0x6c, 0x38, 0x00, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x30, 0x30, 0x00, 0x30, 0x30, 0x60, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xc0, 0xc0, 0xc0, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x06, 0x06, 0x06, 0x00, 0x00, 0x00, 0x00, |
0x00, 0xc0, 0xc0, 0xc6, 0xcc, 0xd8, 0x30, 0x60, 0xdc, 0x86, 0x0c, 0x18, 0x3e, 0x00, |
0x00, 0xc0, 0xc0, 0xc6, 0xcc, 0xd8, 0x30, 0x66, 0xce, 0x9e, 0x3e, 0x06, 0x06, 0x00, |
0x00, 0x00, 0x18, 0x18, 0x00, 0x18, 0x18, 0x3c, 0x3c, 0x3c, 0x18, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x36, 0x6c, 0xd8, 0x6c, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0xd8, 0x6c, 0x36, 0x6c, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x11, 0x44, 0x11, 0x44, 0x11, 0x44, 0x11, 0x44, 0x11, 0x44, 0x11, 0x44, 0x11, 0x44, |
0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, |
0xdd, 0x77, 0xdd, 0x77, 0xdd, 0x77, 0xdd, 0x77, 0xdd, 0x77, 0xdd, 0x77, 0xdd, 0x77, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xf8, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x18, 0x18, 0x18, 0xf8, 0x18, 0xf8, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xf6, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x18, 0xf8, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x36, 0x36, 0x36, 0x36, 0x36, 0xf6, 0x06, 0xf6, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x06, 0xf6, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x36, 0x36, 0x36, 0x36, 0x36, 0xf6, 0x06, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x18, 0x18, 0x18, 0x18, 0x18, 0xf8, 0x18, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x1f, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xff, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x1f, 0x18, 0x1f, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x37, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x36, 0x36, 0x36, 0x36, 0x36, 0x37, 0x30, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x30, 0x37, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x36, 0x36, 0x36, 0x36, 0x36, 0xf7, 0x00, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, 0xf7, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x36, 0x36, 0x36, 0x36, 0x36, 0x37, 0x30, 0x37, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x36, 0x36, 0x36, 0x36, 0x36, 0xf7, 0x00, 0xf7, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x18, 0x18, 0x18, 0x18, 0x18, 0xff, 0x00, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, 0xff, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x1f, 0x18, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x18, 0x1f, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xff, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x18, 0x18, 0x18, 0x18, 0x18, 0xff, 0x18, 0xff, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, |
0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, |
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x76, 0xdc, 0xd8, 0xd8, 0xdc, 0x76, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x7c, 0xc6, 0xfc, 0xc6, 0xc6, 0xfc, 0xc0, 0xc0, 0x40, 0x00, |
0x00, 0x00, 0xfe, 0xc6, 0xc6, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0xfe, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xfe, 0xc6, 0x60, 0x30, 0x18, 0x30, 0x60, 0xc6, 0xfe, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0xd8, 0xd8, 0xd8, 0xd8, 0x70, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x7c, 0x60, 0x60, 0xc0, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x76, 0xdc, 0x18, 0x18, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7e, 0x18, 0x3c, 0x66, 0x66, 0x66, 0x3c, 0x18, 0x7e, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x38, 0x6c, 0xc6, 0xc6, 0xfe, 0xc6, 0xc6, 0x6c, 0x38, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x38, 0x6c, 0xc6, 0xc6, 0xc6, 0x6c, 0x6c, 0x6c, 0xee, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x1e, 0x30, 0x18, 0x0c, 0x3e, 0x66, 0x66, 0x66, 0x3c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0xdb, 0xdb, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x03, 0x06, 0x7e, 0xdb, 0xdb, 0xf3, 0x7e, 0x60, 0xc0, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x1c, 0x30, 0x60, 0x60, 0x7c, 0x60, 0x60, 0x30, 0x1c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0xfe, 0x00, 0x00, 0xfe, 0x00, 0x00, 0xfe, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x18, 0x18, 0x7e, 0x18, 0x18, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x30, 0x18, 0x0c, 0x06, 0x0c, 0x18, 0x30, 0x00, 0x7e, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x0c, 0x18, 0x30, 0x60, 0x30, 0x18, 0x0c, 0x00, 0x7e, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x0e, 0x1b, 0x1b, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xd8, 0xd8, 0x70, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x7e, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x76, 0xdc, 0x00, 0x76, 0xdc, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x38, 0x6c, 0x6c, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x0f, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0xec, 0x6c, 0x3c, 0x1c, 0x00, 0x00, 0x00, |
0x00, 0xd8, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x70, 0xd8, 0x30, 0x60, 0xc8, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 |
}; |
static Bit8u vgafont16[256*16]= |
{ |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7e, 0x81, 0xa5, 0x81, 0x81, 0xbd, 0x99, 0x81, 0x81, 0x7e, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7e, 0xff, 0xdb, 0xff, 0xff, 0xc3, 0xe7, 0xff, 0xff, 0x7e, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x6c, 0xfe, 0xfe, 0xfe, 0xfe, 0x7c, 0x38, 0x10, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x7c, 0xfe, 0x7c, 0x38, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x18, 0x3c, 0x3c, 0xe7, 0xe7, 0xe7, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x18, 0x3c, 0x7e, 0xff, 0xff, 0x7e, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x3c, 0x3c, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xe7, 0xc3, 0xc3, 0xe7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x66, 0x42, 0x42, 0x66, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, |
0xff, 0xff, 0xff, 0xff, 0xff, 0xc3, 0x99, 0xbd, 0xbd, 0x99, 0xc3, 0xff, 0xff, 0xff, 0xff, 0xff, |
0x00, 0x00, 0x1e, 0x0e, 0x1a, 0x32, 0x78, 0xcc, 0xcc, 0xcc, 0xcc, 0x78, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3c, 0x66, 0x66, 0x66, 0x66, 0x3c, 0x18, 0x7e, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3f, 0x33, 0x3f, 0x30, 0x30, 0x30, 0x30, 0x70, 0xf0, 0xe0, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7f, 0x63, 0x7f, 0x63, 0x63, 0x63, 0x63, 0x67, 0xe7, 0xe6, 0xc0, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x18, 0x18, 0xdb, 0x3c, 0xe7, 0x3c, 0xdb, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x80, 0xc0, 0xe0, 0xf0, 0xf8, 0xfe, 0xf8, 0xf0, 0xe0, 0xc0, 0x80, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0xfe, 0x3e, 0x1e, 0x0e, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x3c, 0x7e, 0x18, 0x18, 0x18, 0x7e, 0x3c, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x00, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7f, 0xdb, 0xdb, 0xdb, 0x7b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x7c, 0xc6, 0x60, 0x38, 0x6c, 0xc6, 0xc6, 0x6c, 0x38, 0x0c, 0xc6, 0x7c, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xfe, 0xfe, 0xfe, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x3c, 0x7e, 0x18, 0x18, 0x18, 0x7e, 0x3c, 0x18, 0x7e, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x3c, 0x7e, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x7e, 0x3c, 0x18, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x0c, 0xfe, 0x0c, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x60, 0xfe, 0x60, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xc0, 0xc0, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x66, 0xff, 0x66, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x38, 0x7c, 0x7c, 0xfe, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0xfe, 0xfe, 0x7c, 0x7c, 0x38, 0x38, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x3c, 0x3c, 0x3c, 0x18, 0x18, 0x18, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x66, 0x66, 0x66, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x6c, 0x6c, 0xfe, 0x6c, 0x6c, 0x6c, 0xfe, 0x6c, 0x6c, 0x00, 0x00, 0x00, 0x00, |
0x18, 0x18, 0x7c, 0xc6, 0xc2, 0xc0, 0x7c, 0x06, 0x06, 0x86, 0xc6, 0x7c, 0x18, 0x18, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0xc2, 0xc6, 0x0c, 0x18, 0x30, 0x60, 0xc6, 0x86, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x38, 0x6c, 0x6c, 0x38, 0x76, 0xdc, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x30, 0x30, 0x30, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x0c, 0x18, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x18, 0x0c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x30, 0x18, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x18, 0x30, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x3c, 0xff, 0x3c, 0x66, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x7e, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x30, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x02, 0x06, 0x0c, 0x18, 0x30, 0x60, 0xc0, 0x80, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3c, 0x66, 0xc3, 0xc3, 0xdb, 0xdb, 0xc3, 0xc3, 0x66, 0x3c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x38, 0x78, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x7e, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7c, 0xc6, 0x06, 0x0c, 0x18, 0x30, 0x60, 0xc0, 0xc6, 0xfe, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7c, 0xc6, 0x06, 0x06, 0x3c, 0x06, 0x06, 0x06, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x0c, 0x1c, 0x3c, 0x6c, 0xcc, 0xfe, 0x0c, 0x0c, 0x0c, 0x1e, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xfe, 0xc0, 0xc0, 0xc0, 0xfc, 0x06, 0x06, 0x06, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x38, 0x60, 0xc0, 0xc0, 0xfc, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xfe, 0xc6, 0x06, 0x06, 0x0c, 0x18, 0x30, 0x30, 0x30, 0x30, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0x7e, 0x06, 0x06, 0x06, 0x0c, 0x78, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x18, 0x18, 0x30, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x06, 0x0c, 0x18, 0x30, 0x60, 0x30, 0x18, 0x0c, 0x06, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x00, 0x00, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x60, 0x30, 0x18, 0x0c, 0x06, 0x0c, 0x18, 0x30, 0x60, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7c, 0xc6, 0xc6, 0x0c, 0x18, 0x18, 0x18, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x7c, 0xc6, 0xc6, 0xde, 0xde, 0xde, 0xdc, 0xc0, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x10, 0x38, 0x6c, 0xc6, 0xc6, 0xfe, 0xc6, 0xc6, 0xc6, 0xc6, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xfc, 0x66, 0x66, 0x66, 0x7c, 0x66, 0x66, 0x66, 0x66, 0xfc, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3c, 0x66, 0xc2, 0xc0, 0xc0, 0xc0, 0xc0, 0xc2, 0x66, 0x3c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xf8, 0x6c, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x6c, 0xf8, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xfe, 0x66, 0x62, 0x68, 0x78, 0x68, 0x60, 0x62, 0x66, 0xfe, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xfe, 0x66, 0x62, 0x68, 0x78, 0x68, 0x60, 0x60, 0x60, 0xf0, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3c, 0x66, 0xc2, 0xc0, 0xc0, 0xde, 0xc6, 0xc6, 0x66, 0x3a, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc6, 0xc6, 0xc6, 0xc6, 0xfe, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3c, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x1e, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0xcc, 0xcc, 0xcc, 0x78, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xe6, 0x66, 0x66, 0x6c, 0x78, 0x78, 0x6c, 0x66, 0x66, 0xe6, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xf0, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x62, 0x66, 0xfe, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc3, 0xe7, 0xff, 0xff, 0xdb, 0xc3, 0xc3, 0xc3, 0xc3, 0xc3, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc6, 0xe6, 0xf6, 0xfe, 0xde, 0xce, 0xc6, 0xc6, 0xc6, 0xc6, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xfc, 0x66, 0x66, 0x66, 0x7c, 0x60, 0x60, 0x60, 0x60, 0xf0, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xd6, 0xde, 0x7c, 0x0c, 0x0e, 0x00, 0x00, |
0x00, 0x00, 0xfc, 0x66, 0x66, 0x66, 0x7c, 0x6c, 0x66, 0x66, 0x66, 0xe6, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x7c, 0xc6, 0xc6, 0x60, 0x38, 0x0c, 0x06, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xff, 0xdb, 0x99, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc3, 0xc3, 0xc3, 0xc3, 0xc3, 0xc3, 0xc3, 0x66, 0x3c, 0x18, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc3, 0xc3, 0xc3, 0xc3, 0xc3, 0xdb, 0xdb, 0xff, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc3, 0xc3, 0x66, 0x3c, 0x18, 0x18, 0x3c, 0x66, 0xc3, 0xc3, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc3, 0xc3, 0xc3, 0x66, 0x3c, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xff, 0xc3, 0x86, 0x0c, 0x18, 0x30, 0x60, 0xc1, 0xc3, 0xff, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3c, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x3c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x80, 0xc0, 0xe0, 0x70, 0x38, 0x1c, 0x0e, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x3c, 0x00, 0x00, 0x00, 0x00, |
0x10, 0x38, 0x6c, 0xc6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, |
0x30, 0x30, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x0c, 0x7c, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xe0, 0x60, 0x60, 0x78, 0x6c, 0x66, 0x66, 0x66, 0x66, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, 0xc6, 0xc0, 0xc0, 0xc0, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x1c, 0x0c, 0x0c, 0x3c, 0x6c, 0xcc, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, 0xc6, 0xfe, 0xc0, 0xc0, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x38, 0x6c, 0x64, 0x60, 0xf0, 0x60, 0x60, 0x60, 0x60, 0xf0, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x76, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0x7c, 0x0c, 0xcc, 0x78, 0x00, |
0x00, 0x00, 0xe0, 0x60, 0x60, 0x6c, 0x76, 0x66, 0x66, 0x66, 0x66, 0xe6, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x18, 0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x06, 0x06, 0x00, 0x0e, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x66, 0x66, 0x3c, 0x00, |
0x00, 0x00, 0xe0, 0x60, 0x60, 0x66, 0x6c, 0x78, 0x78, 0x6c, 0x66, 0xe6, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xe6, 0xff, 0xdb, 0xdb, 0xdb, 0xdb, 0xdb, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xdc, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xdc, 0x66, 0x66, 0x66, 0x66, 0x66, 0x7c, 0x60, 0x60, 0xf0, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x76, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0x7c, 0x0c, 0x0c, 0x1e, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xdc, 0x76, 0x66, 0x60, 0x60, 0x60, 0xf0, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x7c, 0xc6, 0x60, 0x38, 0x0c, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x10, 0x30, 0x30, 0xfc, 0x30, 0x30, 0x30, 0x30, 0x36, 0x1c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xc3, 0xc3, 0xc3, 0xc3, 0x66, 0x3c, 0x18, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xc3, 0xc3, 0xc3, 0xdb, 0xdb, 0xff, 0x66, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xc3, 0x66, 0x3c, 0x18, 0x3c, 0x66, 0xc3, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x7e, 0x06, 0x0c, 0xf8, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xcc, 0x18, 0x30, 0x60, 0xc6, 0xfe, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x0e, 0x18, 0x18, 0x18, 0x70, 0x18, 0x18, 0x18, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0x00, 0x18, 0x18, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x70, 0x18, 0x18, 0x18, 0x0e, 0x18, 0x18, 0x18, 0x18, 0x70, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x76, 0xdc, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x6c, 0xc6, 0xc6, 0xc6, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3c, 0x66, 0xc2, 0xc0, 0xc0, 0xc0, 0xc2, 0x66, 0x3c, 0x0c, 0x06, 0x7c, 0x00, 0x00, |
0x00, 0x00, 0xcc, 0x00, 0x00, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x0c, 0x18, 0x30, 0x00, 0x7c, 0xc6, 0xfe, 0xc0, 0xc0, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x10, 0x38, 0x6c, 0x00, 0x78, 0x0c, 0x7c, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xcc, 0x00, 0x00, 0x78, 0x0c, 0x7c, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x60, 0x30, 0x18, 0x00, 0x78, 0x0c, 0x7c, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x38, 0x6c, 0x38, 0x00, 0x78, 0x0c, 0x7c, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x3c, 0x66, 0x60, 0x60, 0x66, 0x3c, 0x0c, 0x06, 0x3c, 0x00, 0x00, 0x00, |
0x00, 0x10, 0x38, 0x6c, 0x00, 0x7c, 0xc6, 0xfe, 0xc0, 0xc0, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc6, 0x00, 0x00, 0x7c, 0xc6, 0xfe, 0xc0, 0xc0, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x60, 0x30, 0x18, 0x00, 0x7c, 0xc6, 0xfe, 0xc0, 0xc0, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x66, 0x00, 0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x18, 0x3c, 0x66, 0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x60, 0x30, 0x18, 0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0xc6, 0x00, 0x10, 0x38, 0x6c, 0xc6, 0xc6, 0xfe, 0xc6, 0xc6, 0xc6, 0x00, 0x00, 0x00, 0x00, |
0x38, 0x6c, 0x38, 0x00, 0x38, 0x6c, 0xc6, 0xc6, 0xfe, 0xc6, 0xc6, 0xc6, 0x00, 0x00, 0x00, 0x00, |
0x18, 0x30, 0x60, 0x00, 0xfe, 0x66, 0x60, 0x7c, 0x60, 0x60, 0x66, 0xfe, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x6e, 0x3b, 0x1b, 0x7e, 0xd8, 0xdc, 0x77, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x3e, 0x6c, 0xcc, 0xcc, 0xfe, 0xcc, 0xcc, 0xcc, 0xcc, 0xce, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x10, 0x38, 0x6c, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc6, 0x00, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x60, 0x30, 0x18, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x30, 0x78, 0xcc, 0x00, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x60, 0x30, 0x18, 0x00, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc6, 0x00, 0x00, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x7e, 0x06, 0x0c, 0x78, 0x00, |
0x00, 0xc6, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0xc6, 0x00, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x18, 0x18, 0x7e, 0xc3, 0xc0, 0xc0, 0xc0, 0xc3, 0x7e, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x38, 0x6c, 0x64, 0x60, 0xf0, 0x60, 0x60, 0x60, 0x60, 0xe6, 0xfc, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xc3, 0x66, 0x3c, 0x18, 0xff, 0x18, 0xff, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, |
0x00, 0xfc, 0x66, 0x66, 0x7c, 0x62, 0x66, 0x6f, 0x66, 0x66, 0x66, 0xf3, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x0e, 0x1b, 0x18, 0x18, 0x18, 0x7e, 0x18, 0x18, 0x18, 0x18, 0x18, 0xd8, 0x70, 0x00, 0x00, |
0x00, 0x18, 0x30, 0x60, 0x00, 0x78, 0x0c, 0x7c, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x0c, 0x18, 0x30, 0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x18, 0x30, 0x60, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x18, 0x30, 0x60, 0x00, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x76, 0xdc, 0x00, 0xdc, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00, |
0x76, 0xdc, 0x00, 0xc6, 0xe6, 0xf6, 0xfe, 0xde, 0xce, 0xc6, 0xc6, 0xc6, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x3c, 0x6c, 0x6c, 0x3e, 0x00, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x38, 0x6c, 0x6c, 0x38, 0x00, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x30, 0x30, 0x00, 0x30, 0x30, 0x60, 0xc0, 0xc6, 0xc6, 0x7c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xc0, 0xc0, 0xc0, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x06, 0x06, 0x06, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0xc0, 0xc0, 0xc2, 0xc6, 0xcc, 0x18, 0x30, 0x60, 0xce, 0x9b, 0x06, 0x0c, 0x1f, 0x00, 0x00, |
0x00, 0xc0, 0xc0, 0xc2, 0xc6, 0xcc, 0x18, 0x30, 0x66, 0xce, 0x96, 0x3e, 0x06, 0x06, 0x00, 0x00, |
0x00, 0x00, 0x18, 0x18, 0x00, 0x18, 0x18, 0x18, 0x3c, 0x3c, 0x3c, 0x18, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x6c, 0xd8, 0x6c, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xd8, 0x6c, 0x36, 0x6c, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x11, 0x44, 0x11, 0x44, 0x11, 0x44, 0x11, 0x44, 0x11, 0x44, 0x11, 0x44, 0x11, 0x44, 0x11, 0x44, |
0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, |
0xdd, 0x77, 0xdd, 0x77, 0xdd, 0x77, 0xdd, 0x77, 0xdd, 0x77, 0xdd, 0x77, 0xdd, 0x77, 0xdd, 0x77, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xf8, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x18, 0x18, 0x18, 0xf8, 0x18, 0xf8, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xf6, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x18, 0xf8, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x36, 0x36, 0x36, 0x36, 0x36, 0xf6, 0x06, 0xf6, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x06, 0xf6, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x36, 0x36, 0x36, 0x36, 0x36, 0xf6, 0x06, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x18, 0x18, 0x18, 0x18, 0x18, 0xf8, 0x18, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x1f, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xff, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x1f, 0x18, 0x1f, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x37, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x36, 0x36, 0x36, 0x36, 0x36, 0x37, 0x30, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x30, 0x37, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x36, 0x36, 0x36, 0x36, 0x36, 0xf7, 0x00, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, 0xf7, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x36, 0x36, 0x36, 0x36, 0x36, 0x37, 0x30, 0x37, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x36, 0x36, 0x36, 0x36, 0x36, 0xf7, 0x00, 0xf7, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x18, 0x18, 0x18, 0x18, 0x18, 0xff, 0x00, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, 0xff, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x1f, 0x18, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x18, 0x1f, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xff, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, |
0x18, 0x18, 0x18, 0x18, 0x18, 0xff, 0x18, 0xff, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, |
0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, |
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x76, 0xdc, 0xd8, 0xd8, 0xd8, 0xdc, 0x76, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x78, 0xcc, 0xcc, 0xcc, 0xd8, 0xcc, 0xc6, 0xc6, 0xc6, 0xcc, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0xfe, 0xc6, 0xc6, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0xfe, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0xfe, 0xc6, 0x60, 0x30, 0x18, 0x30, 0x60, 0xc6, 0xfe, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0xd8, 0xd8, 0xd8, 0xd8, 0xd8, 0x70, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x66, 0x7c, 0x60, 0x60, 0xc0, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x76, 0xdc, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x7e, 0x18, 0x3c, 0x66, 0x66, 0x66, 0x3c, 0x18, 0x7e, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x38, 0x6c, 0xc6, 0xc6, 0xfe, 0xc6, 0xc6, 0x6c, 0x38, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x38, 0x6c, 0xc6, 0xc6, 0xc6, 0x6c, 0x6c, 0x6c, 0x6c, 0xee, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x1e, 0x30, 0x18, 0x0c, 0x3e, 0x66, 0x66, 0x66, 0x66, 0x3c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0xdb, 0xdb, 0xdb, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x03, 0x06, 0x7e, 0xdb, 0xdb, 0xf3, 0x7e, 0x60, 0xc0, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x1c, 0x30, 0x60, 0x60, 0x7c, 0x60, 0x60, 0x60, 0x30, 0x1c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0xfe, 0x00, 0x00, 0xfe, 0x00, 0x00, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x7e, 0x18, 0x18, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x30, 0x18, 0x0c, 0x06, 0x0c, 0x18, 0x30, 0x00, 0x7e, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x0c, 0x18, 0x30, 0x60, 0x30, 0x18, 0x0c, 0x00, 0x7e, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x0e, 0x1b, 0x1b, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, |
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xd8, 0xd8, 0xd8, 0x70, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x7e, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x76, 0xdc, 0x00, 0x76, 0xdc, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x38, 0x6c, 0x6c, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x0f, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0xec, 0x6c, 0x6c, 0x3c, 0x1c, 0x00, 0x00, 0x00, 0x00, |
0x00, 0xd8, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x70, 0xd8, 0x30, 0x60, 0xc8, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, |
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 |
}; |
static Bit8u vgafont14alt[1]={0x00}; |
static Bit8u vgafont16alt[1]={0x00}; |
/trunk/soc/vga/char_rom_b16.v
File deleted
/trunk/soc/vga/ram2k_b16_attr.v
File deleted
\ No newline at end of file
/trunk/soc/vga/vdu.v
File deleted
/trunk/soc/vga/ram2k_b16.v
File deleted
\ No newline at end of file
/trunk/soc/vga/test/test_vdu.v
0,0 → 1,56
`timescale 1ns / 1ps |
////////////////////////////////////////////////////////////////////////////////// |
// Company: |
// Engineer: |
// |
// Create Date: 02:05:46 08/01/2008 |
// Design Name: |
// Module Name: test_vdu |
// Project Name: |
// Target Devices: |
// Tool versions: |
// Description: |
// |
// Dependencies: |
// |
// Revision: |
// Revision 0.01 - File Created |
// Additional Comments: |
// |
////////////////////////////////////////////////////////////////////////////////// |
module test_vdu ( |
input sys_clk_in, |
output tft_lcd_clk, |
output [1:0] tft_lcd_r, |
output [1:0] tft_lcd_g, |
output [1:0] tft_lcd_b, |
output tft_lcd_hsync, |
output tft_lcd_vsync, |
|
output led |
); |
|
// Net declarations |
wire lock, rst; |
|
// Module instantiations |
clock clk0 ( |
.CLKIN_IN (sys_clk_in), |
.CLKDV_OUT (tft_lcd_clk), |
.LOCKED_OUT (lock) |
); |
|
vdu vdu0 ( |
.wb_rst_i (rst), |
.wb_clk_i (tft_lcd_clk), // 25MHz VDU clock |
.vga_red_o (tft_lcd_r), |
.vga_green_o (tft_lcd_g), |
.vga_blue_o (tft_lcd_b), |
.horiz_sync (tft_lcd_hsync), |
.vert_sync (tft_lcd_vsync) |
); |
|
// Continuous assignments |
assign rst = !lock; |
assign led = 1'b1; |
endmodule |
/trunk/soc/vga/test/clock.xaw
0,0 → 1,3
XILINX-XDB 0.1 STUB 0.1 ASCII |
XILINX-XDM V1.4e |
$83x4>513&bdah!uetq,~`r(adzg#{g}tdz7)hj38:o{#{jz_ugpp*ekgja%tly>;13853=68':;<95>0/30?46702;=+eH?F1085]7<<>1J^NFXI[34?DTPRVEE@TQLARAB@LH@WJF@=55NRVX\KKJ^WJF@ECQJXUGQJDJ6=2KY[WQ@NM[\GIMNFV\J@XK>b:CQS_YHFESTHNCPSVKWGMOIOVIGG<>4ASUY[JHKQVNO^RM?119BVR\XGGFRSIJ]_B325>GU_SUDBAWPDEP\GIM6>2KY[WQ@NM[\@ATXMMMNABJJ179BVR\XGGFRSIJ]_GNJTCJHX880M_YU_NLO]ZBCZVCEEY?8;@PT^ZIIDPUOH_Q]ERGWP\VB9<1J^ZTPOONZ[CDXMQ^N^COC139BVR\XGGFRSD@\T^LVI41<I[]QSB@CY^PFGJHAANU[EC]>5:CQS_YHFEST^H]JT^NLCLE6:2KY[WQ@NM[\V@RFZNO_=55NRVX\KKJ^W_KGEIQKFR]NKACf3HYXCNQXIUJe?DQ]WJF@NXH[YQG253=F_SUH@FLZFU[SA4YIGLNBX<=4AVX\GIMXG\^[YYQ[YQG`?DQ]WOFD[YW_E99BS_YWI[^o7LYU_R[MPMRHGE>0NBZG4:@VBB2<KEA;46MCK1]AQCc<KEA;SO[IG^KMWQ><KEA;SB[[6:AOO4>7>2IGG?9?5:AOO7^?3JF@>U?7049@HN?7=2IGGIX6;BNH@SYE]Ol0OAEKV^@VBBYNFZ^h7NBDDW]GMSOCM01H@FJY_NWW1>EKCOH37NBDFC]JJ0=DDBLS46MCKGZ2<5e<KEAMTRJFVHFFa>EKCORTAXB[IQNZ1>EKC@D:=6MCKHL\@LPNLLUIUR<m;BNHMKYNJ\LL==5LLJKM[LDRNNUBB^Zi;BNHMKYNJ\LLSB[[8:AOOLHXAGi0OAEFN^RFVLICm2IGGD@PSSA\P\VB9;1H@FAZT^RKEVCX[ACMXn5LLJ]EA@BEIJA27NABMHVWAA1<K[OJXHJ:;ECG@W2<LJF@;6JLM^CGRf=CKDUJH[QFNRV27>BDEVK^XBMNLH@QEQOHF8>0HNCPPDPEKWKFFJOTABJJ3:FFJa=CMZAN[ROKJTQW57=CNZUM^H_ZEOAZ[HICM;1OE>5KLM31?AJKWOXN]XKACX]NKAC53ME?7I\KY078@PR^WJSH@HQLOSPFGQOHF:1O[H94D^TBHPC?3LR_I_@NL`9EEFRHZPUAJ85IAMQF=>@EWZE^^NKl;GGF@GGDCVH^J45IIO]VJLRT02LDYYQ\TSc8BJSSW\DBX^o4FNWW[SGK]L;0E85FBTDD<>OI\LXEMA?>;KKWP@TXAGZ^XRZVPD48HJELMMk0@BMDEE]LQQ5<DF]27@OW_RRFAA5<EAP<7@QYAMWF3>HB\^EYG95AOOG2?J2<GMNY46A_PNQJP@d<XAKXIR]GIGV:?UOI@HYIY^o4PHLJWBHCMM20\D@XIEVK<>VUAD^R\H??;QPLTZVNF@YJOYGYE49SWFJL>2ZXHB@J4:RPAK><XZCEOIKL3:PPPg=TANOSXH\AAM48WLH@DLi0_YO]TTR\SDOSj2YRBNF]OOMVW44<[PY_I@Q\YOAKVJHH]Z90XB^;;UPVA==R[LUIYKI6;TQF[GSAOZ?0ZDKX1c9[ERYQM[YBCC?k;YKOMK^*PMH+<#?/SUWA$5(6(HYHED=4XRV5?]beW@n:<6Vkm^ObnjtQm{ybcc??;Yfn[Hoig{\n~~g`n49X4?6Z>2Q;6<;R5:Y3>3[33hx|v>5kcl`8r`ttafd+=#>;;wjgh46<pj>}ju?=-02eb30?uIJ{?n5O@y39B?4=9rY?876l:9g956410h;1onua8682?k>?2=1/4;474:P06<?k32n6<==69c2>4g43m2h6=4>:0yP01<?k32n6<==69c2>fe<~]296=4>:08:V2321i14h4>334;e4<dk2h<i7>50;69=~"f21n0(?>58g9'64<>82.9>76:;%:0>0=e<10;6<650;2x 24=<>1/n7<j;%a93d=#m38>7)?9:6c8 41=;2.:?78l;%d960=#990956*>1;06?!752?n0(<:52:&21?1d3-;36864$0;91==#9h0>46*;2;:8 67=12.8;7=4$2:9=>"4i3?37)=i:59'05<2>2.?=78n;%6:>2`<,=k1:;5+4b84`>"3l3<>7);?:778 05=?o1/984<;%74>2=#=00==6*:b;44?!3c2?=0(8k50:&56?3d3-<3645+6d81?!1e2<20(5>5809'`?0<,8l18k5+1c817>o413:1(:?5889'36<0n21b?>4?:%52>=?<,>91;k54i5794?"0932i7)9?:6d8 3`=?o10e9k50;&45?>f3-=;6:h4$7d93c=<a<>1<7*81;::?!172>l07d:m:18'34<?12.<<79i;:k72?6=,>;1445+7184b>=n?10;6)9>:9;8 26=?o10e:850;&45?>>3-=;6:h4;h54>5<#?80356*80;5e?>o0<3:1(:?5889'35<0n21d>84?:%52>=?<,>91;k5+1e810>"6m3?j76a=d;29 27=0010c?750;&45?>>32e9m7>5$639<<=<g;o1<7*81;::?!142>l0(<j52598k7d=83.<=766;:m1g?6=,>;14454o2794?"0932276a<6;29 27=0010c8<50;&45?>>32e>=7>5$639<d=#>o0<j65`6283>!162130(:=57g98k23=83.<=766;:a7f<72;0;6=u+73854>o2n3:1(:?5889'36<0n21d:o4?:%52>=?<,>91;k54}c04>5<5290;w)9=:368m0`=83.<=766;%50>2`<3f<i6=4+708;=>"0;3=m76sm3183>7<729q/;?4=4:k6b?6=,>;1445+7284b>=h>k0;6)9>:9;8 25=?o10q~=m:18182?2:301>m56c9'5f<4l2wx?94?:3y>0=<4;279;78m;%3`>7><uz8=6=4={<6;>73<5;=19k5rs3d94?4|5=21>h523186b>{t>=0;6<u249857>"013<i7p}<e;295~;4k3?m7)96:4d8yv55290:w0=?:7`8 2?=>k1v>j50;2x 2?=>k1v?650;2x 2?=>k1vqc<n:182xh5j3:1=vsa2b83>4}zf;n1<7?t}o0f>5<6std9j7>51zm75<728qvb>?50;3xyk55290:wpsr}AB@6e=m::3o>=8}ABA5{GHYqvLM |
/trunk/soc/vga/test/ml403.ucf
0,0 → 1,74
# Bus clock nets |
#NET "sys_clk_in" TNM_NET = "sys_clk_in"; |
#NET "tft_clk" TNM_NET = "tft_clk"; |
NET sys_clk_in TNM_NET = "sys_clk_in"; |
TIMESPEC "TSSYSCLK" = PERIOD "sys_clk_in" 9.9 ns HIGH 50 %; |
|
NET sys_clk_in LOC = AE14; |
NET sys_clk_in IOSTANDARD = LVCMOS33; |
|
NET led LOC = G5; |
|
#------------------------------------------------------------------------------ |
# IO Pad Location Constraints / Properties for TFT VGA LCD Controller |
#------------------------------------------------------------------------------ |
|
#NET tft_lcd_b<0> LOC = L26; # VGA_B2 |
#NET tft_lcd_b<0> IOSTANDARD = LVCMOS33; |
#NET tft_lcd_b<1> LOC = C5; # VGA_B3 |
#NET tft_lcd_b<2> LOC = C7; # VGA_B4 |
#NET tft_lcd_b<3> LOC = B7; # VGA_B5 |
#NET tft_lcd_b<4> LOC = G8; # VGA_B6 |
#NET tft_lcd_b<5> LOC = F8; # VGA_B7 |
#NET tft_lcd_b<*> SLEW = FAST; |
#NET tft_lcd_b<*> DRIVE = 8; |
NET tft_lcd_b[0] LOC = G8; # VGA_B6 |
NET tft_lcd_b[1] LOC = F8; # VGA_B7 |
#NET tft_lcd_b SLEW = FAST; |
#NET tft_lcd_b DRIVE = 8; |
|
|
NET tft_lcd_clk LOC = AF8; |
#NET tft_lcd_clk IOSTANDARD = LVDCI_33; |
#NET tft_lcd_clk SLEW = FAST; |
#NET tft_lcd_clk DRIVE = 8; |
|
#NET tft_lcd_g<0> LOC = M20; # VGA_G2 |
#NET tft_lcd_g<0> IOSTANDARD = LVCMOS33; |
#NET tft_lcd_g<1> LOC = E4; # VGA_G3 |
#NET tft_lcd_g<2> LOC = D3; # VGA_G4 |
#NET tft_lcd_g<3> LOC = H7; # VGA_G5 |
#NET tft_lcd_g<4> LOC = H8; # VGA_G6 |
#NET tft_lcd_g<5> LOC = C1; # VGA_G7 |
#NET tft_lcd_g<*> SLEW = FAST; |
#NET tft_lcd_g<*> DRIVE = 8; |
NET tft_lcd_g[0] LOC = H8; # VGA_G6 |
NET tft_lcd_g[1] LOC = C1; # VGA_G7 |
#NET tft_lcd_g SLEW = FAST; |
#NET tft_lcd_g DRIVE = 8; |
|
NET tft_lcd_hsync LOC = C10; |
#NET tft_lcd_hsync SLEW = FAST; |
#NET tft_lcd_hsync DRIVE = 8; |
|
#NET tft_lcd_r<0> LOC = N25; #VGA_R2 |
#NET tft_lcd_r<0> IOSTANDARD = LVCMOS33; |
#NET tft_lcd_r<1> LOC = C2; #VGA_R3 |
#NET tft_lcd_r<2> LOC = G7; #VGA_R4 |
#NET tft_lcd_r<3> LOC = F7; #VGA_R5 |
#NET tft_lcd_r<4> LOC = E5; #VGA_R6 |
#NET tft_lcd_r<5> LOC = E6; #VGA_R7 |
#NET tft_lcd_r<*> SLEW = FAST; |
#NET tft_lcd_r<*> DRIVE = 8; |
NET tft_lcd_r[0] LOC = E5; #VGA_R6 |
NET tft_lcd_r[1] LOC = E6; #VGA_R7 |
#NET tft_lcd_r SLEW = FAST; |
#NET tft_lcd_r DRIVE = 8; |
|
NET tft_lcd_vsync LOC = A8; |
#NET tft_lcd_vsync SLEW = FAST; |
#NET tft_lcd_vsync DRIVE = 8; |
|
#TIMESPEC "TSPLB_TFT" = FROM "sys_clk" TO "tft_clk" TIG; |
#TIMESPEC "TSTFT_PLB" = FROM "tft_clk" TO "sys_clk" TIG; |
|
/trunk/soc/vga/rtl/ram2k_b16_attr.v
0,0 → 1,92
`timescale 1ns/10ps |
|
module ram_2k_attr (clk, rst, cs, we, addr, rdata, wdata); |
// IO Ports |
input clk; |
input rst; |
input cs; |
input we; |
input [10:0] addr; |
output [7:0] rdata; |
input [7:0] wdata; |
|
// Net declarations |
wire dp; |
|
// Module instantiations |
RAMB16_S9 ram (.DO(rdata), |
.DOP (dp), |
.ADDR (addr), |
.CLK (clk), |
.DI (wdata), |
.DIP (dp), |
.EN (cs), |
.SSR (rst), |
.WE (we)); |
|
defparam ram.INIT_00 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_01 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_02 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_03 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_04 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_05 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_06 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_07 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_08 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_09 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_0A = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_0B = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_0C = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_0D = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_0E = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_0F = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_10 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_11 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_12 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_13 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_14 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_15 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_16 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_17 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_18 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_19 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_1A = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_1B = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_1C = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_1D = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_1E = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_1F = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_20 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_21 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_22 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_23 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_24 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_25 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_26 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_27 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_28 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_29 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_2A = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_2B = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_2C = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_2D = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_2E = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_2F = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_30 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_31 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_32 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_33 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_34 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_35 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_36 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_37 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_38 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_39 = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_3A = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_3B = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_3C = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_3D = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_3E = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
defparam ram.INIT_3F = 256'h0707070707070707070707070707070707070707070707070707070707070707; |
|
endmodule |
/trunk/soc/vga/rtl/vdu.v
0,0 → 1,356
// Video Display terminal |
// John Kent |
// 3th September 2004 |
// Assumes a pixel clock input of 50 MHz |
// Generates a 12.5MHz CPU Clock output |
// |
// Display Format is: |
// 80 characters across by 25 characters down. |
// 8 horizonal pixels / character |
// 16 vertical scan lines / character (2 scan lines/row) |
`timescale 1ns/10ps |
|
module vdu ( |
// Wishbone signals |
input wb_clk_i, // 25 Mhz VDU clock |
input wb_rst_i, |
input [15:0] wb_dat_i, |
output reg [15:0] wb_dat_o, |
input [11:1] wb_adr_i, |
input wb_we_i, |
input wb_tga_i, |
input [ 1:0] wb_sel_i, |
input wb_stb_i, |
input wb_cyc_i, |
output reg wb_ack_o, |
|
// VGA pad signals |
output reg [ 1:0] vga_red_o, |
output reg [ 1:0] vga_green_o, |
output reg [ 1:0] vga_blue_o, |
output reg horiz_sync, |
output reg vert_sync |
); |
|
// Net, registers and parameters |
|
// Synchronization constants |
parameter HOR_DISP_END = 10'd640; // Last horizontal pixel displayed |
parameter HOR_SYNC_BEG = 10'd679; // Start of horizontal synch pulse |
parameter HOR_SYNC_END = 10'd775; // End of Horizontal Synch pulse |
parameter HOR_SCAN_END = 10'd799; // Last pixel in scan line |
parameter HOR_DISP_CHR = 80; // Number of characters displayed per row |
|
parameter VER_DISP_END = 9'd399; // last row displayed |
parameter VER_SYNC_BEG = 9'd413; // start of vertical synch pulse |
parameter VER_SYNC_END = 9'd414; // end of vertical synch pulse |
parameter VER_SCAN_END = 9'd450; // Last scan row in the frame |
parameter VER_DISP_CHR = 6'd25; // Number of character rows displayed |
|
reg cursor_on_v; |
reg cursor_on_h; |
reg video_on_v; |
reg video_on_h; |
reg [9:0] h_count; |
reg [8:0] v_count; // 0 to VER_SCAN_END |
reg [22:0] blink_count; |
|
// Character generator ROM |
wire char_cs; |
wire char_we; |
wire [11:0] char_addr; |
wire [7:0] char_data_in; |
wire [7:0] char_data_out; |
|
// Control registers |
reg [6:0] reg_hcursor; // 80 columns |
reg [4:0] reg_vcursor; // 25 rows |
|
wire wr_pos; |
|
// Video shift register |
reg [7:0] vga_shift; |
reg [2:0] vga_fg_colour; |
reg [2:0] vga_bg_colour; |
reg cursor_on; |
wire cursor_on1; |
reg video_on; |
wire video_on1; |
|
// vga character ram access bus |
reg [6:0] col_addr; // 0 to 79 |
reg [4:0] row_addr; // 0 to 49 (25 * 2 -1) |
reg [6:0] col1_addr; // 0 to 79 |
reg [4:0] row1_addr; // 0 to 49 (25 * 2 - 1) |
reg [6:0] hor_addr; // 0 to 79 |
reg [6:0] ver_addr; // 0 to 124 |
reg vga0_we; |
reg vga0_rw, vga1_rw, vga2_rw, vga3_rw, vga4_rw; |
reg vga1_we; |
reg vga2_we; |
reg buff_we; |
reg [7:0] buff_data_in; |
reg attr_we; |
reg [7:0] attr_data_in; |
reg [10:0] buff_addr; |
reg [10:0] attr0_addr; |
reg attr0_we; |
reg [10:0] buff0_addr; |
reg buff0_we; |
reg [10:0] attr_addr; |
reg intense; |
wire vga_cs; |
wire [7:0] vga_data_out; |
wire [7:0] attr_data_out; |
wire [10:0] vga_addr; // 2K byte character buffer |
wire [15:0] out_data; |
wire fg_or_bg; |
wire stb; |
wire brown_bg; |
wire brown_fg; |
|
// Module instantiation |
char_rom vdu_char_rom ( |
.clk (wb_clk_i), |
.rst (wb_rst_i), |
.cs (char_cs), |
.we (char_we), |
.addr (char_addr), |
.wdata (char_data_in), |
.rdata (char_data_out) |
); |
|
ram_2k char_buff_ram ( |
.clk (wb_clk_i), |
.rst (wb_rst_i), |
.cs (vga_cs), |
.we (buff_we), |
.addr (buff_addr), |
.wdata (buff_data_in), |
.rdata (vga_data_out) |
); |
|
ram_2k_attr attr_buff_ram ( |
.clk (wb_clk_i), |
.rst (wb_rst_i), |
.cs (vga_cs), |
.we (attr_we), |
.addr (attr_addr), |
.wdata (attr_data_in), |
.rdata (attr_data_out) |
); |
|
// Assignments |
assign video_on1 = video_on_h && video_on_v; |
assign cursor_on1 = cursor_on_h && cursor_on_v; |
assign char_cs = 1'b1; |
assign char_we = 1'b0; |
assign char_data_in = 8'b0; |
assign char_addr = { vga_data_out, v_count[3:0] }; |
assign vga_addr = { 4'b0, hor_addr} + { ver_addr, 4'b0 }; |
assign out_data = {attr_data_out, vga_data_out}; |
|
assign vga_cs = 1'b1; |
assign stb = wb_stb_i && wb_cyc_i; |
|
assign fg_or_bg = vga_shift[7] ^ cursor_on; |
assign brown_fg = (vga_fg_colour==3'd6) && !intense; |
assign brown_bg = (vga_bg_colour==3'd6); |
|
assign wr_pos = wb_tga_i & wb_stb_i & wb_cyc_i & wb_we_i; |
|
// Behaviour |
|
// CPU write interface |
always @(posedge wb_clk_i) |
if (wb_rst_i) |
begin |
attr0_addr <= 11'b0; |
attr0_we <= 1'b0; |
attr_data_in <= 8'h0; |
buff0_addr <= 11'b0; |
buff0_we <= 1'b0; |
buff_data_in <= 8'h0; |
end |
else |
begin |
if (stb && !wb_tga_i) |
begin |
attr0_addr <= wb_adr_i; |
attr0_we <= wb_we_i & wb_sel_i[1]; |
attr_data_in <= wb_dat_i[15:8]; |
buff0_addr <= wb_adr_i; |
buff0_we <= wb_we_i & wb_sel_i[0]; |
buff_data_in <= wb_dat_i[7:0]; |
end |
end |
|
// CPU read interface |
always @(posedge wb_clk_i) |
if (wb_rst_i) |
begin |
wb_dat_o <= 16'h0; |
wb_ack_o <= 16'h0; |
end |
else |
begin |
wb_dat_o <= vga4_rw ? out_data : wb_dat_o; |
wb_ack_o <= vga4_rw ? 1'b1 : (wb_ack_o && stb); |
end |
|
// Cursor pos register |
always @(posedge wb_clk_i) |
{reg_vcursor, reg_hcursor} <= wb_rst_i ? 12'h0 |
: (wr_pos ? {wb_dat_i[12:8], wb_dat_i[6:0]} |
: {reg_vcursor, reg_hcursor}); |
|
// Sync generation & timing process |
// Generate horizontal and vertical timing signals for video signal |
always @(posedge wb_clk_i) |
if (wb_rst_i) |
begin |
h_count <= 10'b0; |
horiz_sync <= 1'b1; |
v_count <= 9'b0; |
vert_sync <= 1'b1; |
video_on_h <= 1'b1; |
video_on_v <= 1'b1; |
cursor_on_h <= 1'b0; |
cursor_on_v <= 1'b0; |
blink_count <= 22'b0; |
end |
else |
begin |
h_count <= (h_count==HOR_SCAN_END) ? 10'b0 : h_count + 10'b1; |
horiz_sync <= (h_count==HOR_SYNC_BEG) ? 1'b0 |
: ((h_count==HOR_SYNC_END) ? 1'b1 : horiz_sync); |
v_count <= (v_count==VER_SCAN_END && h_count==HOR_SCAN_END) ? 9'b0 |
: ((h_count==HOR_SYNC_END) ? v_count + 9'b1 : v_count); |
vert_sync <= (v_count==VER_SYNC_BEG) ? 1'b0 |
: ((v_count==VER_SYNC_END) ? 1'b1 : vert_sync); |
video_on_h <= (h_count==HOR_SCAN_END) ? 1'b1 |
: ((h_count==HOR_DISP_END) ? 1'b0 : video_on_h); |
video_on_v <= (v_count==VER_SYNC_BEG) ? 1'b1 |
: ((v_count==VER_DISP_END) ? 1'b0 : video_on_v); |
cursor_on_h <= (h_count[9:3] == reg_hcursor[6:0]); |
cursor_on_v <= (v_count[8:2] == { reg_vcursor[4:0], 2'b11 }) |
&& (v_count[1] ^ v_count[0]); |
blink_count <= blink_count + 22'd1; |
end |
|
// Video memory access |
always @(posedge wb_clk_i) |
if (wb_rst_i) |
begin |
vga0_we <= 1'b0; |
vga0_rw <= 1'b1; |
row_addr <= 5'b0; |
col_addr <= 7'b0; |
|
vga1_we <= 1'b0; |
vga1_rw <= 1'b1; |
row1_addr <= 5'b0; |
col1_addr <= 7'b0; |
|
vga2_we <= 1'b0; |
vga2_rw <= 1'b0; |
vga3_rw <= 1'b0; |
vga4_rw <= 1'b0; |
ver_addr <= 7'b0; |
hor_addr <= 7'b0; |
|
buff_addr <= 10'b0; |
attr_addr <= 10'b0; |
buff_we <= 1'b0; |
attr_we <= 1'b0; |
end |
else |
begin |
// on h_count = 0 initiate character write |
// all other cycles are reads |
case (h_count[2:0]) |
3'b000: // pipeline character write |
begin |
vga0_we <= wb_we_i; |
vga0_rw <= stb; |
end |
default: // other 6 cycles free |
begin |
vga0_we <= 1'b0; |
vga0_rw <= 1'b0; |
col_addr <= h_count[9:3]; |
row_addr <= v_count[8:4]; |
end |
endcase |
|
// on vdu_clk + 1 round off row address |
// row1_addr = (row_addr % 80) |
vga1_we <= vga0_we; |
vga1_rw <= vga0_rw; |
row1_addr <= (row_addr < VER_DISP_CHR) ? row_addr |
: row_addr - VER_DISP_CHR; |
col1_addr <= col_addr; |
|
// on vdu_clk + 2 calculate vertical address |
// ver_addr = (row_addr % 80) x 5 |
vga2_we <= vga1_we; |
vga2_rw <= vga1_rw; |
ver_addr <= { 2'b00, row1_addr } + { row1_addr, 2'b00 }; // x5 |
hor_addr <= col1_addr; |
|
// on vdu_clk + 3 calculate memory address |
// vga_addr = (row_addr % 80) * 80 + hor_addr |
buff_addr <= vga2_rw ? buff0_addr : vga_addr; |
attr_addr <= vga2_rw ? attr0_addr : vga_addr; |
buff_we <= vga2_rw ? (buff0_we & vga2_we) : 1'b0; |
attr_we <= vga2_rw ? (attr0_we & vga2_we) : 1'b0; |
vga3_rw <= vga2_rw; |
vga4_rw <= vga3_rw; |
end |
|
// Video shift register |
always @(posedge wb_clk_i) |
if (wb_rst_i) |
begin |
video_on <= 1'b0; |
cursor_on <= 1'b0; |
vga_bg_colour <= 3'b000; |
vga_fg_colour <= 3'b111; |
vga_shift <= 8'b00000000; |
vga_red_o <= 1'b0; |
vga_green_o <= 1'b0; |
vga_blue_o <= 1'b0; |
end |
else |
begin |
if (h_count[2:0] == 3'b000) |
begin |
video_on <= video_on1; |
cursor_on <= (cursor_on1 | attr_data_out[7]) & blink_count[22]; |
vga_fg_colour <= attr_data_out[2:0]; |
vga_bg_colour <= attr_data_out[6:4]; |
intense <= attr_data_out[3]; |
vga_shift <= char_data_out; |
end |
else vga_shift <= { vga_shift[6:0], 1'b0 }; |
|
// |
// Colour mask is |
// 7 6 5 4 3 2 1 0 |
// X BR BG BB X FR FG FB |
// |
vga_blue_o <= video_on ? (fg_or_bg ? { vga_fg_colour[0], intense } |
: { vga_bg_colour[0], 1'b0 }) |
: 2'b0; |
|
// Green color exception with color brown |
// http://en.wikipedia.org/wiki/Color_Graphics_Adapter#With_an_RGBI_monitor |
vga_green_o <= video_on ? |
(fg_or_bg ? (brown_fg ? 2'b01 : { vga_fg_colour[1], intense }) |
: (brown_bg ? 2'b01 : { vga_bg_colour[1], 1'b0 })) |
: 2'b0; |
vga_red_o <= video_on ? (fg_or_bg ? { vga_fg_colour[2], intense } |
: { vga_bg_colour[2], 1'b0 }) |
: 2'b0; |
end |
endmodule |
/trunk/soc/vga/rtl/char_rom_b16.v
0,0 → 1,181
//////////////////////////////////////////////////////////////// |
// |
// Character generator ROM |
// |
// 7 pixels x 11 rows x 128 characters. |
// |
// Last Updated |
// 18th Oct 2004 |
// J. E. Kent. |
//////////////////////////////////////////////////////////////// |
|
`timescale 1ns/10ps |
|
module char_rom (clk, rst, cs, we, addr, rdata, wdata); |
// IO Ports |
input clk; |
input rst; |
input cs; |
input we; |
input [11:0] addr; |
output [7:0] rdata; |
input [7:0] wdata; |
|
// Net declarations |
wire dp0, dp1; |
wire [7:0] rdata1, rdata0; |
|
// Module instantiations |
RAMB16_S9 rom0 (.DO(rdata0), |
.DOP (dp0), |
.ADDR (addr[10:0]), |
.CLK (clk), |
.DI (wdata), |
.DIP (dp0), |
.EN (cs), |
.SSR (rst), |
.WE (we)); |
|
RAMB16_S9 rom1 (.DO(rdata1), |
.DOP (dp1), |
.ADDR (addr[10:0]), |
.CLK (clk), |
.DI (wdata), |
.DIP (dp1), |
.EN (cs), |
.SSR (rst), |
.WE (we)); |
|
defparam rom0.INIT_00 = 256'h000000007E818199A58181A5817E0000_00000000000000000000000000000000; // 01() 00( ) |
defparam rom0.INIT_01 = 256'h0000000010387CFEFEFEFE6C00000000_000000007EFFFFE7DBFFFFDBFF7E0000; // 03() 02() |
defparam rom0.INIT_02 = 256'h000000003C1818E7E7E73C3C18000000_000000000010387CFE7C381000000000; // 05() 04() |
defparam rom0.INIT_03 = 256'h000000000000183C3C18000000000000_000000003C18187EFFFF7E3C18000000; // 07() 06() |
defparam rom0.INIT_04 = 256'h00000000003C664242663C0000000000_FFFFFFFFFFFFE7C3C3E7FFFFFFFFFFFF; // 09( ) 08() |
defparam rom0.INIT_05 = 256'h0000000078CCCCCCCC781A0E061E0000_FFFFFFFFFFC399BDBD99C3FFFFFFFFFF; // 0b( ) 0a() |
defparam rom0.INIT_06 = 256'h00000000E0F070303030303F333F0000_0000000018187E183C666666663C0000; // 0d() 0c( ) |
defparam rom0.INIT_07 = 256'h000000001818DB3CE73CDB1818000000_000000C0E6E767636363637F637F0000; // 0f() 0e() |
defparam rom0.INIT_08 = 256'h0000000002060E1E3EFE3E1E0E060200_0000000080C0E0F0F8FEF8F0E0C08000; // 11() 10() |
defparam rom0.INIT_09 = 256'h00000000666600666666666666660000_0000000000183C7E1818187E3C180000; // 13() 12() |
defparam rom0.INIT_0A = 256'h0000007CC60C386CC6C66C3860C67C00_000000001B1B1B1B1B7BDBDBDB7F0000; // 15() 14() |
defparam rom0.INIT_0B = 256'h000000007E183C7E1818187E3C180000_00000000FEFEFEFE0000000000000000; // 17() 16() |
defparam rom0.INIT_0C = 256'h00000000183C7E181818181818180000_00000000181818181818187E3C180000; // 19() 18() |
defparam rom0.INIT_0D = 256'h0000000000003060FE60300000000000_000000000000180CFE0C180000000000; // 1b() 1a() |
defparam rom0.INIT_0E = 256'h000000000000286CFE6C280000000000_000000000000FEC0C0C0000000000000; // 1d( ) 1c( ) |
defparam rom0.INIT_0F = 256'h00000000001038387C7CFEFE00000000_0000000000FEFE7C7C38381000000000; // 1f( ) 1e( ) |
defparam rom0.INIT_10 = 256'h000000001818001818183C3C3C180000_00000000000000000000000000000000; // 21(!) 20( ) |
defparam rom0.INIT_11 = 256'h000000006C6CFE6C6C6CFE6C6C000000_00000000000000000000002466666600; // 23(#) 22(") |
defparam rom0.INIT_12 = 256'h0000000086C66030180CC6C200000000_000018187CC68606067CC0C2C67C1818; // 25(%) 24($) |
defparam rom0.INIT_13 = 256'h00000000000000000000006030303000_0000000076CCCCCCDC76386C6C380000; // 27(') 26(&) |
defparam rom0.INIT_14 = 256'h0000000030180C0C0C0C0C0C18300000_000000000C18303030303030180C0000; // 29()) 28(() |
defparam rom0.INIT_15 = 256'h00000000000018187E18180000000000_000000000000663CFF3C660000000000; // 2b(+) 2a(*) |
defparam rom0.INIT_16 = 256'h0000000000000000FE00000000000000_00000030181818000000000000000000; // 2d(-) 2c(,) |
defparam rom0.INIT_17 = 256'h0000000080C06030180C060200000000_00000000181800000000000000000000; // 2f(/) 2e(.) |
defparam rom0.INIT_18 = 256'h000000007E1818181818187838180000_00000000386CC6C6D6D6C6C66C380000; // 31(1) 30(0) |
defparam rom0.INIT_19 = 256'h000000007CC60606063C0606C67C0000_00000000FEC6C06030180C06C67C0000; // 33(3) 32(2) |
defparam rom0.INIT_1A = 256'h000000007CC6060606FCC0C0C0FE0000_000000001E0C0C0CFECC6C3C1C0C0000; // 35(5) 34(4) |
defparam rom0.INIT_1B = 256'h0000000030303030180C0606C6FE0000_000000007CC6C6C6C6FCC0C060380000; // 37(7) 36(6) |
defparam rom0.INIT_1C = 256'h00000000780C0606067EC6C6C67C0000_000000007CC6C6C6C67CC6C6C67C0000; // 39(9) 38(8) |
defparam rom0.INIT_1D = 256'h00000000301818000000181800000000_00000000001818000000181800000000; // 3b(;) 3a(:) |
defparam rom0.INIT_1E = 256'h000000000000007E00007E0000000000_00000000060C18306030180C06000000; // 3d(=) 3c(<) |
defparam rom0.INIT_1F = 256'h000000001818001818180CC6C67C0000_000000006030180C060C183060000000; // 3f(?) 3e(>) |
defparam rom0.INIT_20 = 256'h00000000C6C6C6C6FEC6C66C38100000_000000007CC0DCDEDEDEC6C67C000000; // 41(A) 40(@) |
defparam rom0.INIT_21 = 256'h000000003C66C2C0C0C0C0C2663C0000_00000000FC666666667C666666FC0000; // 43(C) 42(B) |
defparam rom0.INIT_22 = 256'h00000000FE6662606878686266FE0000_00000000F86C6666666666666CF80000; // 45(E) 44(D) |
defparam rom0.INIT_23 = 256'h000000003A66C6C6DEC0C0C2663C0000_00000000F06060606878686266FE0000; // 47(G) 46(F) |
defparam rom0.INIT_24 = 256'h000000003C18181818181818183C0000_00000000C6C6C6C6C6FEC6C6C6C60000; // 49(I) 48(H) |
defparam rom0.INIT_25 = 256'h00000000E666666C78786C6666E60000_0000000078CCCCCC0C0C0C0C0C1E0000; // 4b(K) 4a(J) |
defparam rom0.INIT_26 = 256'h00000000C6C6C6C6C6D6FEFEEEC60000_00000000FE6662606060606060F00000; // 4d(M) 4c(L) |
defparam rom0.INIT_27 = 256'h000000007CC6C6C6C6C6C6C6C67C0000_00000000C6C6C6C6CEDEFEF6E6C60000; // 4f(O) 4e(N) |
defparam rom0.INIT_28 = 256'h00000E0C7CDED6C6C6C6C6C6C67C0000_00000000F0606060607C666666FC0000; // 51(Q) 50(P) |
defparam rom0.INIT_29 = 256'h000000007CC6C6060C3860C6C67C0000_00000000E66666666C7C666666FC0000; // 53(S) 52(R) |
defparam rom0.INIT_2A = 256'h000000007CC6C6C6C6C6C6C6C6C60000_000000003C1818181818185A7E7E0000; // 55(U) 54(T) |
defparam rom0.INIT_2B = 256'h000000006CEEFED6D6D6C6C6C6C60000_0000000010386CC6C6C6C6C6C6C60000; // 57(W) 56(V) |
defparam rom0.INIT_2C = 256'h000000003C181818183C666666660000_00000000C6C66C7C38387C6CC6C60000; // 59(Y) 58(X) |
defparam rom0.INIT_2D = 256'h000000003C30303030303030303C0000_00000000FEC6C26030180C86C6FE0000; // 5b([) 5a(Z) |
defparam rom0.INIT_2E = 256'h000000003C0C0C0C0C0C0C0C0C3C0000_0000000002060E1C3870E0C080000000; // 5d(]) 5c(\) |
defparam rom0.INIT_2F = 256'h0000FF00000000000000000000000000_000000000000000000000000C66C3810; // 5f(_) 5e(^) |
defparam rom0.INIT_30 = 256'h0000000076CCCCCC7C0C780000000000_00000000000000000000000000183030; // 61(a) 60(`) |
defparam rom0.INIT_31 = 256'h000000007CC6C0C0C0C67C0000000000_000000007C666666666C786060E00000; // 63(c) 62(b) |
defparam rom0.INIT_32 = 256'h000000007CC6C0C0FEC67C0000000000_0000000076CCCCCCCC6C3C0C0C1C0000; // 65(e) 64(d) |
defparam rom0.INIT_33 = 256'h0078CC0C7CCCCCCCCCCC760000000000_00000000F060606060F060646C380000; // 67(g) 66(f) |
defparam rom0.INIT_34 = 256'h000000003C1818181818380018180000_00000000E666666666766C6060E00000; // 69(i) 68(h) |
defparam rom0.INIT_35 = 256'h00000000E6666C78786C666060E00000_003C66660606060606060E0006060000; // 6b(k) 6a(j) |
defparam rom0.INIT_36 = 256'h00000000C6D6D6D6D6FEEC0000000000_000000003C1818181818181818380000; // 6d(m) 6c(l) |
defparam rom0.INIT_37 = 256'h000000007CC6C6C6C6C67C0000000000_00000000666666666666DC0000000000; // 6f(o) 6e(n) |
defparam rom0.INIT_38 = 256'h001E0C0C7CCCCCCCCCCC760000000000_00F060607C6666666666DC0000000000; // 71(q) 70(p) |
defparam rom0.INIT_39 = 256'h000000007CC60C3860C67C0000000000_00000000F06060606676DC0000000000; // 73(s) 72(r) |
defparam rom0.INIT_3A = 256'h0000000076CCCCCCCCCCCC0000000000_000000001C3630303030FC3030100000; // 75(u) 74(t) |
defparam rom0.INIT_3B = 256'h000000006CFED6D6D6C6C60000000000_00000000183C66666666660000000000; // 77(w) 76(v) |
defparam rom0.INIT_3C = 256'h00F80C067EC6C6C6C6C6C60000000000_00000000C66C3838386CC60000000000; // 79(y) 78(x) |
defparam rom0.INIT_3D = 256'h000000000E18181818701818180E0000_00000000FEC6603018CCFE0000000000; // 7b({) 7a(z) |
defparam rom0.INIT_3E = 256'h0000000070181818180E181818700000_00000000181818181800181818180000; // 7d(}) 7c(|) |
defparam rom0.INIT_3F = 256'h0000000000FEC6C6C66C381000000000_000000000000000000000000DC760000; // 7f() 7e(~) |
|
defparam rom1.INIT_00 = 256'h0000000076CCCCCCCCCCCC0000CC0000_00007C060C3C66C2C0C0C0C2663C0000; // 81(�) 80(�) |
defparam rom1.INIT_01 = 256'h0000000076CCCCCC7C0C78006C381000_000000007CC6C0C0FEC67C0030180C00; // 83(�) 82(�) |
defparam rom1.INIT_02 = 256'h0000000076CCCCCC7C0C780018306000_0000000076CCCCCC7C0C780000CC0000; // 85(�) 84(�) |
defparam rom1.INIT_03 = 256'h0000003C060C3C666060663C00000000_0000000076CCCCCC7C0C7800386C3800; // 87(�) 86(�) |
defparam rom1.INIT_04 = 256'h000000007CC6C0C0FEC67C0000C60000_000000007CC6C0C0FEC67C006C381000; // 89(�) 88(�) |
defparam rom1.INIT_05 = 256'h000000003C1818181818380000660000_000000007CC6C0C0FEC67C0018306000; // 8b(�) 8a(�) |
defparam rom1.INIT_06 = 256'h000000003C1818181818380018306000_000000003C18181818183800663C1800; // 8d(�) 8c(�) |
defparam rom1.INIT_07 = 256'h00000000C6C6C6FEC6C66C3800386C38_00000000C6C6C6FEC6C66C381000C600; // 8f(�) 8e(�) |
defparam rom1.INIT_08 = 256'h000000006ED8D87E3676CC0000000000_00000000FE6660607C6066FE00603018; // 91(�) 90(�) |
defparam rom1.INIT_09 = 256'h000000007CC6C6C6C6C67C006C381000_00000000CECCCCCCCCFECCCC6C3E0000; // 93(�) 92(�) |
defparam rom1.INIT_0A = 256'h000000007CC6C6C6C6C67C0018306000_000000007CC6C6C6C6C67C0000C60000; // 95(�) 94(�) |
defparam rom1.INIT_0B = 256'h0000000076CCCCCCCCCCCC0018306000_0000000076CCCCCCCCCCCC00CC783000; // 97(�) 96(�) |
defparam rom1.INIT_0C = 256'h000000007CC6C6C6C6C6C6C67C00C600_00780C067EC6C6C6C6C6C60000C60000; // 99(�) 98(�) |
defparam rom1.INIT_0D = 256'h0000000018183C66606060663C181800_000000007CC6C6C6C6C6C6C6C600C600; // 9b(�) 9a(�) |
defparam rom1.INIT_0E = 256'h000000001818187E187E183C66660000_00000000FCE660606060F060646C3800; // 9d(�) 9c(�) |
defparam rom1.INIT_0F = 256'h000070D818181818187E1818181B0E00_00000000C6CCCCCCDECCC4F8CCCCF800; // 9f(�) 9e(�) |
defparam rom1.INIT_10 = 256'h000000003C1818181818380030180C00_0000000076CCCCCC7C0C780060301800; // a1(�) a0(�) |
defparam rom1.INIT_11 = 256'h0000000076CCCCCCCCCCCC0060301800_000000007CC6C6C6C6C67C0060301800; // a3(�) a2(�) |
defparam rom1.INIT_12 = 256'h00000000C6C6C6CEDEFEF6E6C600DC76_00000000666666666666DC00DC760000; // a5(�) a4(�) |
defparam rom1.INIT_13 = 256'h0000000000000000007C00386C6C3800_0000000000000000007E003E6C6C3C00; // a7(�) a6(�) |
defparam rom1.INIT_14 = 256'h0000000000C0C0C0C0FE000000000000_000000007CC6C6C06030300030300000; // a9(�) a8(�) |
defparam rom1.INIT_15 = 256'h00003E180C86DC603018CCC6C2C0C000_000000000006060606FE000000000000; // ab(�) aa(�) |
defparam rom1.INIT_16 = 256'h00000000183C3C3C1818180018180000_000006063E9ECE663018CCC6C2C0C000; // ad(�) ac(�) |
defparam rom1.INIT_17 = 256'h000000000000D86C366CD80000000000_000000000000366CD86C360000000000; // af(�) ae(�) |
defparam rom1.INIT_18 = 256'hAA55AA55AA55AA55AA55AA55AA55AA55_44114411441144114411441144114411; // b1(�) b0(�) |
defparam rom1.INIT_19 = 256'h18181818181818181818181818181818_77DD77DD77DD77DD77DD77DD77DD77DD; // b3(�) b2(�) |
defparam rom1.INIT_1A = 256'h1818181818181818F818F81818181818_1818181818181818F818181818181818; // b5(�) b4(�) |
defparam rom1.INIT_1B = 256'h3636363636363636FE00000000000000_3636363636363636F636363636363636; // b7(�) b6(�) |
defparam rom1.INIT_1C = 256'h3636363636363636F606F63636363636_1818181818181818F818F80000000000; // b9(�) b8(�) |
defparam rom1.INIT_1D = 256'h3636363636363636F606FE0000000000_36363636363636363636363636363636; // bb(�) ba(�) |
defparam rom1.INIT_1E = 256'h0000000000000000FE36363636363636_0000000000000000FE06F63636363636; // bd(�) bc(�) |
defparam rom1.INIT_1F = 256'h1818181818181818F800000000000000_0000000000000000F818F81818181818; // bf(�) be(�) |
defparam rom1.INIT_20 = 256'h0000000000000000FF18181818181818_00000000000000001F18181818181818; // c1(�) c0(�) |
defparam rom1.INIT_21 = 256'h18181818181818181F18181818181818_1818181818181818FF00000000000000; // c3(�) c2(�) |
defparam rom1.INIT_22 = 256'h1818181818181818FF18181818181818_0000000000000000FF00000000000000; // c5(�) c4(�) |
defparam rom1.INIT_23 = 256'h36363636363636363736363636363636_18181818181818181F181F1818181818; // c7(�) c6(�) |
defparam rom1.INIT_24 = 256'h363636363636363637303F0000000000_00000000000000003F30373636363636; // c9(�) c8(�) |
defparam rom1.INIT_25 = 256'h3636363636363636F700FF0000000000_0000000000000000FF00F73636363636; // cb(�) ca(�) |
defparam rom1.INIT_26 = 256'h0000000000000000FF00FF0000000000_36363636363636363730373636363636; // cd(�) cc(�) |
defparam rom1.INIT_27 = 256'h0000000000000000FF00FF1818181818_3636363636363636F700F73636363636; // cf(�) ce(�) |
defparam rom1.INIT_28 = 256'h1818181818181818FF00FF0000000000_0000000000000000FF36363636363636; // d1(�) d0(�) |
defparam rom1.INIT_29 = 256'h00000000000000003F36363636363636_3636363636363636FF00000000000000; // d3(�) d2(�) |
defparam rom1.INIT_2A = 256'h18181818181818181F181F0000000000_00000000000000001F181F1818181818; // d5(�) d4(�) |
defparam rom1.INIT_2B = 256'h3636363636363636FF36363636363636_36363636363636363F00000000000000; // d7(�) d6(�) |
defparam rom1.INIT_2C = 256'h0000000000000000F818181818181818_1818181818181818FF18FF1818181818; // d9(�) d8(�) |
defparam rom1.INIT_2D = 256'hFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF_18181818181818181F00000000000000; // db(�) da(�) |
defparam rom1.INIT_2E = 256'hF0F0F0F0F0F0F0F0F0F0F0F0F0F0F0F0_FFFFFFFFFFFFFFFFFF00000000000000; // dd(�) dc(�) |
defparam rom1.INIT_2F = 256'h000000000000000000FFFFFFFFFFFFFF_0F0F0F0F0F0F0F0F0F0F0F0F0F0F0F0F; // df(�) de(�) |
defparam rom1.INIT_30 = 256'h00000000CCC6C6C6CCD8CCCCCC780000_0000000076DCD8D8D8DC760000000000; // e1(�) e0(�) |
defparam rom1.INIT_31 = 256'h000000006C6C6C6C6C6C6CFE00000000_00000000C0C0C0C0C0C0C0C6C6FE0000; // e3(�) e2(�) |
defparam rom1.INIT_32 = 256'h0000000070D8D8D8D8D87E0000000000_00000000FEC66030183060C6FE000000; // e5(�) e4(�) |
defparam rom1.INIT_33 = 256'h00000000181818181818DC7600000000_000000C060607C666666666600000000; // e7(�) e6(�) |
defparam rom1.INIT_34 = 256'h00000000386CC6C6FEC6C66C38000000_000000007E183C6666663C187E000000; // e9(�) e8(�) |
defparam rom1.INIT_35 = 256'h000000003C666666663E0C18301E0000_00000000EE6C6C6C6CC6C6C66C380000; // eb(�) ea(�) |
defparam rom1.INIT_36 = 256'h00000000C0607EF3DBDB7E0603000000_0000000000007EDBDBDB7E0000000000; // ed(�) ec(�) |
defparam rom1.INIT_37 = 256'h00000000C6C6C6C6C6C6C6C67C000000_000000001C306060607C6060301C0000; // ef(�) ee(�) |
defparam rom1.INIT_38 = 256'h00000000FF000018187E181800000000_0000000000FE0000FE0000FE00000000; // f1(�) f0(�) |
defparam rom1.INIT_39 = 256'h000000007E000C18306030180C000000_000000007E0030180C060C1830000000; // f3(�) f2(�) |
defparam rom1.INIT_3A = 256'h0000000070D8D8D81818181818181818_18181818181818181818181B1B0E0000; // f5(�) f4(�) |
defparam rom1.INIT_3B = 256'h000000000000DC7600DC760000000000_00000000001818007E00181800000000; // f7(�) f6(�) |
defparam rom1.INIT_3C = 256'h00000000000000181800000000000000_0000000000000000000000386C6C3800; // f9(�) f8(�) |
defparam rom1.INIT_3D = 256'h000000001C3C6C6CEC0C0C0C0C0C0F00_00000000000000180000000000000000; // fb(�) fa(�) |
defparam rom1.INIT_3E = 256'h000000000000000000F8C86030D87000_0000000000000000006C6C6C6C6CD800; // fd(�) fc(�) |
defparam rom1.INIT_3F = 256'h00000000000000000000000000000000_00000000007C7C7C7C7C7C7C00000000; // ff(�) fe(�) |
|
// Assignments |
assign rdata = addr[11] ? rdata1 : rdata0; |
endmodule |
/trunk/soc/vga/rtl/ram2k_b16.v
0,0 → 1,40
`timescale 1ns/10ps |
|
module ram_2k (clk, rst, cs, we, addr, rdata, wdata); |
// IO Ports |
input clk; |
input rst; |
input cs; |
input we; |
input [10:0] addr; |
output [7:0] rdata; |
input [7:0] wdata; |
|
// Net declarations |
wire dp; |
|
// Module instantiations |
RAMB16_S9 ram (.DO(rdata), |
.DOP (dp), |
.ADDR (addr), |
.CLK (clk), |
.DI (wdata), |
.DIP (dp), |
.EN (cs), |
.SSR (rst), |
.WE (we)); |
|
defparam ram.INIT_00 = 256'h554456_2043504F53_20302E3176_20726F737365636F7270_2074655A; |
/* |
defparam ram.INIT_00 = 256'h3130393837363534333231303938373635343332313039383736353433323130; |
defparam ram.INIT_01 = 256'h3332313039383736353433323130393837363534333231303938373635343332; |
defparam ram.INIT_02 = 256'h3534333231303938373635343332313039383736353433323130393837363534; |
defparam ram.INIT_03 = 256'h3736353433323130393837363534333231303938373635343332313039383736; |
defparam ram.INIT_04 = 256'h3938373635343332313039383736353433323130393837363534333231303938; |
defparam ram.INIT_05 = 256'h3130393837363534333231303938373635343332313039383736353433323130; |
defparam ram.INIT_06 = 256'h3332313039383736353433323130393837363534333231303938373635343332; |
defparam ram.INIT_07 = 256'h3534333231303938373635343332313039383736353433323130393837363534; |
defparam ram.INIT_08 = 256'h3736353433323130393837363534333231303938373635343332313039383736; |
defparam ram.INIT_09 = 256'h3938373635343332313039383736353433323130393837363534333231303938; |
*/ |
endmodule |
/trunk/soc/vga/sim/tb.do
0,0 → 1,8
vdel -all -lib work |
vmap unisims /opt/Xilinx/10.1/modelsim/verilog/unisims |
vlib work |
vlog -work work -lint vdu.v vdu_tb.v ram2k_b16_attr.v ram2k_b16.v char_rom_b16.v |
vlog -work work /opt/Xilinx/10.1/ISE/verilog/src/glbl.v |
vsim -L /opt/Xilinx/10.1/modelsim/verilog/unisims -novopt -t ns work.vdu_tb work.glbl |
add wave -radix hexadecimal /vdu_tb/vdu0/* |
|
/trunk/soc/vga/sim/vdu_tb.v
0,0 → 1,34
`timescale 1ns / 1ps |
|
module vdu_tb; |
|
reg clk; |
reg rst; |
|
wire [1:0] tft_lcd_r; |
wire [1:0] tft_lcd_g; |
wire [1:0] tft_lcd_b; |
wire tft_lcd_hsync; |
wire tft_lcd_vsync; |
|
vdu vdu0 ( |
.wb_rst_i (rst), |
.wb_clk_i (clk), // 25MHz VDU clock |
.vga_red_o (tft_lcd_r), |
.vga_green_o (tft_lcd_g), |
.vga_blue_o (tft_lcd_b), |
.horiz_sync (tft_lcd_hsync), |
.vert_sync (tft_lcd_vsync) |
); |
|
always #20 clk <= ~clk; |
|
initial |
begin |
rst <= 1'b0; |
clk <= 1'b0; |
#25 rst <= 1'b1; |
#50 rst <= 1'b0; |
end |
|
endmodule |
/trunk/doc/schema.svg
File deleted
/trunk/doc/schematic.odg
File deleted
\ No newline at end of file
/trunk/doc/cpu.svg
0,0 → 1,1027
<?xml version="1.0" encoding="UTF-8" standalone="no"?> |
<!-- Created with Inkscape (http://www.inkscape.org/) --> |
<svg |
xmlns:dc="http://purl.org/dc/elements/1.1/" |
xmlns:cc="http://creativecommons.org/ns#" |
xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" |
xmlns:svg="http://www.w3.org/2000/svg" |
xmlns="http://www.w3.org/2000/svg" |
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/trunk/src/splitlh.c
File deleted
/trunk/src/Makefile
File deleted
/trunk/src/tools/splitlh.c
0,0 → 1,47
#include <stdio.h> |
#include <sys/stat.h> |
#include <fcntl.h> |
|
int main(int argc, char *argv[]) |
{ |
int fd, count, out0, out1; |
char word[2]; |
|
if (argc != 4) fprintf(stderr, "Syntax: %s infile evenfile oddfile\n", |
argv[0]); |
|
fd=open(argv[1], O_RDONLY); |
if(fd < 0) |
{ |
fprintf(stderr, "Error opening file\n"); |
return 1; |
} |
|
out0 = open (argv[2], O_WRONLY|O_CREAT|O_TRUNC, |
S_IRUSR|S_IWUSR|S_IRGRP|S_IROTH); |
if(out0 < 0) |
{ |
fprintf(stderr, "Error creating even file\n"); |
return 2; |
} |
|
out1 = open (argv[3], O_WRONLY|O_CREAT|O_TRUNC, |
S_IRUSR|S_IWUSR|S_IRGRP|S_IROTH); |
if(out1 < 0) |
{ |
fprintf(stderr, "Error creating odd file\n"); |
return 3; |
} |
|
do { |
count = read(fd, word, 2); |
if (count > 0) write(out0, &word[0], 1); |
if (count > 1) write(out1, &word[1], 1); |
} while (count > 0); |
|
close (fd); |
close (out0); |
close (out1); |
|
return 0; |
} |
/trunk/src/tools/out2rom-ml403.c
0,0 → 1,61
#include <sys/types.h> |
#include <sys/stat.h> |
#include <fcntl.h> |
#include <stdio.h> |
#include <string.h> |
#include <stdlib.h> |
|
int main(int argc, char *argv[]) |
{ |
char buf1[2]; |
char buf2[2]; |
int f1, f2, c1, c2; |
char err[50]; |
|
if (argc!=3) |
{ |
sprintf(err, "Usage: %s hd.img bios.img\n", argv[0]); |
write(2, &err, strlen(err)); |
exit(1); |
} |
|
f1 = open (argv[1], O_RDONLY); |
if (f1<0) |
{ |
sprintf(err, "Could not open file %s\n", argv[1]); |
write(2, &err, strlen(err)); |
exit(1); |
} |
|
f2 = open (argv[2], O_RDONLY); |
if (f2<0) |
{ |
sprintf(err, "Could not open file %s\n", argv[2]); |
write(2, &err, strlen(err)); |
exit(1); |
} |
|
while (1) |
{ |
c1=read(f1, &buf1, 2); |
c2=read(f2, &buf2, 2); |
|
if (c1<2 && c2<2) break; |
else |
{ |
if (c1<2) { buf1[0] = 0xff; buf1[1] = 0xff; } |
if (c2<2) { buf2[0] = 0xff; buf2[1] = 0xff; } |
} |
|
write (1, &buf1[1], 1); |
write (1, &buf1[0], 1); |
write (1, &buf2[1], 1); |
write (1, &buf2[0], 1); |
} |
|
close(f1); |
close(f2); |
|
return 0; |
} |
|
/trunk/src/tools/incr-img.c
0,0 → 1,60
#include <sys/types.h> |
#include <sys/stat.h> |
#include <fcntl.h> |
#include <stdio.h> |
#include <string.h> |
#include <stdlib.h> |
|
int main(int argc, char *argv[]) |
{ |
int f1, f2, c1, c2; |
char err[50]; |
unsigned char *buf1, *buf2; |
|
if (argc!=3) |
{ |
sprintf(err, "Usage: %s hdnew.img hdref.img\n", argv[0]); |
write(2, &err, strlen(err)); |
exit(1); |
} |
|
f1 = open (argv[1], O_RDONLY); |
if (f1<0) |
{ |
sprintf(err, "Could not open file %s\n", argv[1]); |
write(2, &err, strlen(err)); |
exit(1); |
} |
|
f2 = open (argv[2], O_RDONLY); |
if (f2<0) |
{ |
sprintf(err, "Could not open file %s\n", argv[2]); |
write(2, &err, strlen(err)); |
exit(1); |
} |
|
buf1 = malloc(131072); |
if (!buf1) |
{ |
sprintf(err, "Could not allocate 128kb of memory for the 1st buffer\n"); |
write(2, &err, strlen(err)); |
exit(1); |
} |
|
buf2 = malloc(131072); |
if (!buf2) |
{ |
sprintf(err, "Could not allocate 128kb of memory for the 2nd buffer\n"); |
write(2, &err, strlen(err)); |
exit(1); |
} |
|
|
c1=read(f1, &buf1, 131072); // 128kb block |
c2=read(f2, &buf2, 131072); |
|
memcmp (buf1, buf2, 131072); |
|
return 0; |
} |
/trunk/src/tools/ff.c
0,0 → 1,13
int main(int argc, char *argv[]) |
{ |
int f = -1; |
int i, top; |
|
if (argc==2) top=atoi (argv[1]); |
else top = 1000000; |
|
for (i=0; i<top; i++) |
write (1, &f, 4); |
|
return 0; |
} |
/trunk/src/tools/Makefile
0,0 → 1,8
all: ../bin/out2rom-ml403 ../bin/ff |
|
../bin/splitlh: splitlh.c |
gcc -o ../bin/splitlh splitlh.c |
../bin/out2rom-ml403: out2rom-ml403.c |
gcc -o ../bin/out2rom-ml403 out2rom-ml403.c |
../bin/ff: ff.c |
gcc -o ../bin/ff ff.c |
/trunk/src/bochs-diff-2.3.7/disasm/syntax.cc
0,0 → 1,293
///////////////////////////////////////////////////////////////////////// |
// $Id: syntax.cc,v 1.1 2008-11-14 03:31:24 zeus Exp $ |
///////////////////////////////////////////////////////////////////////// |
|
#include <stdio.h> |
#include "disasm.h" |
|
////////////////// |
// Intel STYLE |
////////////////// |
|
#define BX_DISASM_SUPPORT_X86_64 |
|
#ifdef BX_DISASM_SUPPORT_X86_64 |
|
static const char *intel_general_16bit_regname[16] = { |
"ax", "cx", "dx", "bx", "sp", "bp", "si", "di", |
"r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w" |
}; |
|
static const char *intel_general_32bit_regname[16] = { |
"eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi", |
"r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d" |
}; |
|
static const char *intel_general_64bit_regname[16] = { |
"rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", |
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" |
}; |
|
static const char *intel_general_8bit_regname_rex[16] = { |
"al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil", |
"r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b" |
}; |
|
#else |
|
static const char *intel_general_16bit_regname[8] = { |
"ax", "cx", "dx", "bx", "sp", "bp", "si", "di" |
}; |
|
static const char *intel_general_32bit_regname[8] = { |
"eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi" |
}; |
|
#endif |
|
static const char *intel_general_8bit_regname[8] = { |
"al", "cl", "dl", "bl", "ah", "ch", "dh", "bh" |
}; |
|
static const char *intel_segment_name[8] = { |
"es", "cs", "ss", "ds", "fs", "gs", "??", "??" |
}; |
|
static const char *intel_index16[8] = { |
"bx+si", |
"bx+di", |
"bp+si", |
"bp+di", |
"si", |
"di", |
"bp", |
"bx" |
}; |
|
|
////////////////// |
// AT&T STYLE |
////////////////// |
|
#ifdef BX_DISASM_SUPPORT_X86_64 |
|
static const char *att_general_16bit_regname[16] = { |
"%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di", |
"%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w" |
}; |
|
static const char *att_general_32bit_regname[16] = { |
"%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi", |
"%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d" |
}; |
|
static const char *att_general_64bit_regname[16] = { |
"%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi", |
"%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15" |
}; |
|
static const char *att_general_8bit_regname_rex[16] = { |
"%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil", |
"%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b" |
}; |
|
#else |
|
static const char *att_general_16bit_regname[8] = { |
"%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di" |
}; |
|
static const char *att_general_32bit_regname[8] = { |
"%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi" |
}; |
|
#endif |
|
static const char *att_general_8bit_regname[8] = { |
"%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh" |
}; |
|
static const char *att_segment_name[8] = { |
"%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%??", "%??" |
}; |
|
static const char *att_index16[8] = { |
"%bx,%si", |
"%bx,%di", |
"%bp,%si", |
"%bp,%di", |
"%si", |
"%di", |
"%bp", |
"%bx" |
}; |
|
#define NULL_SEGMENT_REGISTER 7 |
|
void disassembler::initialize_modrm_segregs() |
{ |
sreg_mod00_rm16[0] = segment_name[DS_REG]; |
sreg_mod00_rm16[1] = segment_name[DS_REG]; |
sreg_mod00_rm16[2] = segment_name[SS_REG]; |
sreg_mod00_rm16[3] = segment_name[SS_REG]; |
sreg_mod00_rm16[4] = segment_name[DS_REG]; |
sreg_mod00_rm16[5] = segment_name[DS_REG]; |
sreg_mod00_rm16[6] = segment_name[DS_REG]; |
sreg_mod00_rm16[7] = segment_name[DS_REG]; |
|
sreg_mod01or10_rm16[0] = segment_name[DS_REG]; |
sreg_mod01or10_rm16[1] = segment_name[DS_REG]; |
sreg_mod01or10_rm16[2] = segment_name[SS_REG]; |
sreg_mod01or10_rm16[3] = segment_name[SS_REG]; |
sreg_mod01or10_rm16[4] = segment_name[DS_REG]; |
sreg_mod01or10_rm16[5] = segment_name[DS_REG]; |
sreg_mod01or10_rm16[6] = segment_name[SS_REG]; |
sreg_mod01or10_rm16[7] = segment_name[DS_REG]; |
|
sreg_mod01or10_rm32[0] = segment_name[DS_REG]; |
sreg_mod01or10_rm32[1] = segment_name[DS_REG]; |
sreg_mod01or10_rm32[2] = segment_name[DS_REG]; |
sreg_mod01or10_rm32[3] = segment_name[DS_REG]; |
sreg_mod01or10_rm32[4] = segment_name[NULL_SEGMENT_REGISTER]; |
sreg_mod01or10_rm32[5] = segment_name[SS_REG]; |
sreg_mod01or10_rm32[6] = segment_name[DS_REG]; |
sreg_mod01or10_rm32[7] = segment_name[DS_REG]; |
sreg_mod01or10_rm32[8] = segment_name[DS_REG]; |
sreg_mod01or10_rm32[9] = segment_name[DS_REG]; |
sreg_mod01or10_rm32[10] = segment_name[DS_REG]; |
sreg_mod01or10_rm32[11] = segment_name[DS_REG]; |
sreg_mod01or10_rm32[12] = segment_name[NULL_SEGMENT_REGISTER]; |
sreg_mod01or10_rm32[13] = segment_name[DS_REG]; |
sreg_mod01or10_rm32[14] = segment_name[DS_REG]; |
sreg_mod01or10_rm32[15] = segment_name[DS_REG]; |
|
sreg_mod00_base32[0] = segment_name[DS_REG]; |
sreg_mod00_base32[1] = segment_name[DS_REG]; |
sreg_mod00_base32[2] = segment_name[DS_REG]; |
sreg_mod00_base32[3] = segment_name[DS_REG]; |
sreg_mod00_base32[4] = segment_name[SS_REG]; |
sreg_mod00_base32[5] = segment_name[DS_REG]; |
sreg_mod00_base32[6] = segment_name[DS_REG]; |
sreg_mod00_base32[7] = segment_name[DS_REG]; |
sreg_mod00_base32[8] = segment_name[DS_REG]; |
sreg_mod00_base32[9] = segment_name[DS_REG]; |
sreg_mod00_base32[10] = segment_name[DS_REG]; |
sreg_mod00_base32[11] = segment_name[DS_REG]; |
sreg_mod00_base32[12] = segment_name[DS_REG]; |
sreg_mod00_base32[13] = segment_name[DS_REG]; |
sreg_mod00_base32[14] = segment_name[DS_REG]; |
sreg_mod00_base32[15] = segment_name[DS_REG]; |
|
sreg_mod01or10_base32[0] = segment_name[DS_REG]; |
sreg_mod01or10_base32[1] = segment_name[DS_REG]; |
sreg_mod01or10_base32[2] = segment_name[DS_REG]; |
sreg_mod01or10_base32[3] = segment_name[DS_REG]; |
sreg_mod01or10_base32[4] = segment_name[SS_REG]; |
sreg_mod01or10_base32[5] = segment_name[SS_REG]; |
sreg_mod01or10_base32[6] = segment_name[DS_REG]; |
sreg_mod01or10_base32[7] = segment_name[DS_REG]; |
sreg_mod01or10_base32[8] = segment_name[DS_REG]; |
sreg_mod01or10_base32[9] = segment_name[DS_REG]; |
sreg_mod01or10_base32[10] = segment_name[DS_REG]; |
sreg_mod01or10_base32[11] = segment_name[DS_REG]; |
sreg_mod01or10_base32[12] = segment_name[DS_REG]; |
sreg_mod01or10_base32[13] = segment_name[DS_REG]; |
sreg_mod01or10_base32[14] = segment_name[DS_REG]; |
sreg_mod01or10_base32[15] = segment_name[DS_REG]; |
} |
|
////////////////// |
// Intel STYLE |
////////////////// |
|
void disassembler::set_syntax_intel() |
{ |
intel_mode = 1; |
|
general_16bit_regname = intel_general_16bit_regname; |
general_8bit_regname = intel_general_8bit_regname; |
general_32bit_regname = intel_general_32bit_regname; |
general_8bit_regname_rex = intel_general_8bit_regname_rex; |
general_64bit_regname = intel_general_64bit_regname; |
|
segment_name = intel_segment_name; |
index16 = intel_index16; |
|
initialize_modrm_segregs(); |
} |
|
void disassembler::print_disassembly_intel(const x86_insn *insn, const BxDisasmOpcodeInfo_t *entry) |
{ |
// print opcode |
dis_sprintf("%s ", entry->IntelOpcode); |
|
if (entry->Operand1) { |
(this->*entry->Operand1)(insn); |
} |
if (entry->Operand2) { |
dis_sprintf(", "); |
(this->*entry->Operand2)(insn); |
} |
if (entry->Operand3) { |
dis_sprintf(", "); |
(this->*entry->Operand3)(insn); |
} |
if (entry->Operand4) { |
dis_sprintf(", "); |
(this->*entry->Operand4)(insn); |
} |
} |
|
////////////////// |
// AT&T STYLE |
////////////////// |
|
void disassembler::set_syntax_att() |
{ |
intel_mode = 0; |
|
general_16bit_regname = att_general_16bit_regname; |
general_8bit_regname = att_general_8bit_regname; |
general_32bit_regname = att_general_32bit_regname; |
general_8bit_regname_rex = att_general_8bit_regname_rex; |
general_64bit_regname = att_general_64bit_regname; |
|
segment_name = att_segment_name; |
index16 = att_index16; |
|
initialize_modrm_segregs(); |
} |
|
void disassembler::toggle_syntax_mode() |
{ |
if (intel_mode) set_syntax_att(); |
else set_syntax_intel(); |
} |
/* |
void disassembler::print_disassembly_att(const x86_insn *insn, const BxDisasmOpcodeInfo_t *entry) |
{ |
// print opcode |
dis_sprintf("%s ", entry->AttOpcode); |
|
if (entry->Operand4) { |
(this->*entry->Operand4)(insn); |
dis_sprintf(", "); |
} |
if (entry->Operand3) { |
(this->*entry->Operand3)(insn); |
dis_sprintf(", "); |
} |
if (entry->Operand2) { |
(this->*entry->Operand2)(insn); |
dis_sprintf(", "); |
} |
if (entry->Operand1) { |
(this->*entry->Operand1)(insn); |
} |
} |
*/ |
void disassembler::print_disassembly_att(const x86_insn *insn, const BxDisasmOpcodeInfo_t *entry) |
{ |
// print opcode |
dis_sprintf("%s", entry->AttOpcode); |
} |
trunk/src/bochs-diff-2.3.7/disasm/syntax.cc
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/src/bochs-diff-2.3.7/configure-zet
===================================================================
--- trunk/src/bochs-diff-2.3.7/configure-zet (nonexistent)
+++ trunk/src/bochs-diff-2.3.7/configure-zet (revision 39)
@@ -0,0 +1,13 @@
+#!/bin/bash
+CFLAGS='-g3 -O0' CXXFLAGS='-g3 -O0' ./configure \
+ --prefix=$(pwd)/../../opt/bochs-2.3.7-zet \
+ --enable-disasm \
+ --enable-debugger \
+ --disable-docbook \
+ --disable-vbe \
+ --disable-fpu \
+ --disable-mmx \
+ --enable-cpu-level=3 \
+ --disable-cdrom \
+ --enable-logging \
+ --enable-instrumentation="instrument/zet"
trunk/src/bochs-diff-2.3.7/configure-zet
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/src/bochs-diff-2.3.7/bochs.h
===================================================================
--- trunk/src/bochs-diff-2.3.7/bochs.h (nonexistent)
+++ trunk/src/bochs-diff-2.3.7/bochs.h (revision 39)
@@ -0,0 +1,633 @@
+/////////////////////////////////////////////////////////////////////////
+// $Id: bochs.h,v 1.1 2008-11-14 03:31:22 zeus Exp $
+/////////////////////////////////////////////////////////////////////////
+//
+// Copyright (C) 2002 MandrakeSoft S.A.
+//
+// MandrakeSoft S.A.
+// 43, rue d'Aboukir
+// 75002 Paris - France
+// http://www.linux-mandrake.com/
+// http://www.mandrakesoft.com/
+//
+// This library is free software; you can redistribute it and/or
+// modify it under the terms of the GNU Lesser General Public
+// License as published by the Free Software Foundation; either
+// version 2 of the License, or (at your option) any later version.
+//
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+// Lesser General Public License for more details.
+//
+// You should have received a copy of the GNU Lesser General Public
+// License along with this library; if not, write to the Free Software
+// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+//
+// bochs.h is the master header file for all C++ code. It includes all
+// the system header files needed by bochs, and also includes all the bochs
+// C++ header files. Because bochs.h and the files that it includes has
+// structure and class definitions, it cannot be called from C code.
+//
+
+#ifndef BX_BOCHS_H
+# define BX_BOCHS_H 1
+
+#include "config.h" /* generated by configure script from config.h.in */
+
+#ifndef __QNXNTO__
+extern "C" {
+#endif
+
+#ifdef WIN32
+// In a win32 compile (including cygwin), windows.h is required for several
+// files in gui and iodev. It is important to include it here in a header
+// file so that WIN32-specific data types can be used in fields of classes.
+#include
+#endif
+
+#include
+#include
+#include
+#if defined(__sun__)
+#undef EAX
+#undef ECX
+#undef EDX
+#undef EBX
+#undef ESP
+#undef EBP
+#undef ESI
+#undef EDI
+#undef EIP
+#undef CS
+#undef DS
+#undef ES
+#undef SS
+#undef FS
+#undef GS
+#endif
+#include
+#include
+
+#ifndef WIN32
+# include
+#else
+# include
+#endif
+#include
+#if BX_WITH_MACOS
+# include
+# include
+# include
+# include
+#elif BX_WITH_CARBON
+# include
+# include
+# include /* for MAXPATHLEN */
+# include
+# include
+#else
+# ifndef WIN32
+# include
+# endif
+# include
+# include
+#endif
+#include
+#include
+#include
+#include
+#ifdef macintosh
+# define SuperDrive "[fd:]"
+#endif
+
+#ifndef __QNXNTO__
+}
+#endif
+
+#include "osdep.h" /* platform dependent includes and defines */
+#include "bx_debug/debug.h"
+#include "bxversion.h"
+
+#include "gui/siminterface.h"
+
+// BX_SHARE_PATH should be defined by the makefile. If not, give it
+// a value of NULL to avoid compile problems.
+#ifndef BX_SHARE_PATH
+#define BX_SHARE_PATH NULL
+#endif
+
+// prototypes
+int bx_begin_simulation(int argc, char *argv[]);
+void bx_stop_simulation();
+char *bx_find_bochsrc(void);
+int bx_parse_cmdline(int arg, int argc, char *argv[]);
+int bx_read_configuration(const char *rcfile);
+int bx_write_configuration(const char *rcfile, int overwrite);
+void bx_reset_options(void);
+Bit32u crc32(const Bit8u *buf, int len);
+// for param-tree testing only
+void print_tree(bx_param_c *node, int level = 0);
+
+//
+// some macros to interface the CPU and memory to external environment
+// so that these functions can be redirected to the debugger when
+// needed.
+//
+
+#define BXRS_PARAM_SPECIAL(parent, name, maxvalue, save_handler, restore_handler) \
+{ \
+ bx_param_num_c *param = new bx_param_num_c(parent, #name, "", "", 0, maxvalue, 0); \
+ param->set_base(BASE_HEX); \
+ param->set_sr_handlers(this, save_handler, restore_handler); \
+}
+
+#define BXRS_PARAM_SPECIAL64(parent, name, save_handler, restore_handler) \
+ BXRS_PARAM_SPECIAL(parent, name, BX_MAX_BIT64U, save_handler, restore_handler)
+#define BXRS_PARAM_SPECIAL32(parent, name, save_handler, restore_handler) \
+ BXRS_PARAM_SPECIAL(parent, name, BX_MAX_BIT32U, save_handler, restore_handler)
+#define BXRS_PARAM_SPECIAL16(parent, name, save_handler, restore_handler) \
+ BXRS_PARAM_SPECIAL(parent, name, BX_MAX_BIT16U, save_handler, restore_handler)
+#define BXRS_PARAM_SPECIAL8(parent, name, save_handler, restore_handler) \
+ BXRS_PARAM_SPECIAL(parent, name, BX_MAX_BIT8U, save_handler, restore_handler)
+
+#define BXRS_HEX_PARAM_SIMPLE32(parent, name) \
+ new bx_shadow_num_c(parent, #name, (Bit32u*)&(name), BASE_HEX)
+#define BXRS_HEX_PARAM_SIMPLE64(parent, name) \
+ new bx_shadow_num_c(parent, #name, (Bit64u*)&(name), BASE_HEX)
+
+#define BXRS_HEX_PARAM_SIMPLE(parent, name) \
+ new bx_shadow_num_c(parent, #name, &(name), BASE_HEX)
+#define BXRS_HEX_PARAM_FIELD(parent, name, field) \
+ new bx_shadow_num_c(parent, #name, &(field), BASE_HEX)
+
+#define BXRS_DEC_PARAM_SIMPLE(parent, name) \
+ new bx_shadow_num_c(parent, #name, &(name), BASE_DEC)
+#define BXRS_DEC_PARAM_FIELD(parent, name, field) \
+ new bx_shadow_num_c(parent, #name, &(field), BASE_DEC)
+
+#define BXRS_PARAM_BOOL(parent, name, field) \
+ new bx_shadow_bool_c(parent, #name, (bx_bool*)(&(field)))
+
+// =-=-=-=-=-=-=- Normal optimized use -=-=-=-=-=-=-=-=-=-=-=-=-=-=
+// some pc_systems functions just redirect to the IO devices so optimize
+// by eliminating call here
+//
+// #define BX_INP(addr, len) bx_pc_system.inp(addr, len)
+// #define BX_OUTP(addr, val, len) bx_pc_system.outp(addr, val, len)
+#define BX_INP(addr, len) bx_devices.inp(addr, len)
+#define BX_OUTP(addr, val, len) bx_devices.outp(addr, val, len)
+#define BX_TICK1() bx_pc_system.tick1()
+#define BX_TICKN(n) bx_pc_system.tickn(n)
+#define BX_INTR bx_pc_system.INTR
+#define BX_SET_INTR(b) bx_pc_system.set_INTR(b)
+#define BX_CPU_C bx_cpu_c
+#define BX_MEM_C bx_mem_c
+#define BX_HRQ (bx_pc_system.HRQ)
+
+#if BX_SUPPORT_SMP
+#define BX_CPU(x) (bx_cpu_array[x])
+#else
+#define BX_CPU(x) (&bx_cpu)
+#endif
+
+#define BX_MEM(x) (&bx_mem)
+
+#define BX_SET_ENABLE_A20(enabled) bx_pc_system.set_enable_a20(enabled)
+#define BX_GET_ENABLE_A20() bx_pc_system.get_enable_a20()
+
+#if BX_SUPPORT_A20
+# define A20ADDR(x) (bx_phy_address(x) & bx_pc_system.a20_mask)
+#else
+# define A20ADDR(x) (bx_phy_address(x))
+#endif
+
+#if BX_SUPPORT_SMP
+# define BX_TICK1_IF_SINGLE_PROCESSOR() \
+ if (BX_SMP_PROCESSORS == 1) BX_TICK1()
+# define BX_TICKN_IF_SINGLE_PROCESSOR(n) \
+ if (BX_SMP_PROCESSORS == 1) BX_TICKN(n)
+#else
+# define BX_TICK1_IF_SINGLE_PROCESSOR() BX_TICK1()
+# define BX_TICKN_IF_SINGLE_PROCESSOR(n) BX_TICKN(n)
+#endif
+
+// you can't use static member functions on the CPU, if there are going
+// to be 2 cpus. Check this early on.
+#if BX_SUPPORT_SMP
+# if BX_USE_CPU_SMF
+# error For SMP simulation, BX_USE_CPU_SMF must be 0.
+# endif
+#endif
+
+//
+// Ways for the the external environment to report back information
+// to the debugger.
+//
+
+#if BX_DEBUGGER
+# define BX_DBG_ASYNC_INTR bx_guard.async.irq
+# define BX_DBG_ASYNC_DMA bx_guard.async.dma
+
+# define BX_DBG_DMA_REPORT(addr, len, what, val) \
+ if (bx_guard.report.dma) bx_dbg_dma_report(addr, len, what, val)
+# define BX_DBG_IAC_REPORT(vector, irq) \
+ if (bx_guard.report.irq) bx_dbg_iac_report(vector, irq)
+# define BX_DBG_A20_REPORT(val) \
+ if (bx_guard.report.a20) bx_dbg_a20_report(val)
+# define BX_DBG_IO_REPORT(port, size, op, val) \
+ if (bx_guard.report.io) bx_dbg_io_report(port, size, op, val)
+# define BX_DBG_UCMEM_REPORT(addr, size, op, val) \
+ if (bx_guard.report.ucmem) bx_dbg_ucmem_report(addr, size, op, val)
+# define BX_DBG_LIN_MEMORY_ACCESS(cpu, lin, phy, len, pl, rw, data) \
+ bx_dbg_lin_memory_access(cpu, lin, phy, len, pl, rw, data)
+# define BX_DBG_PHY_MEMORY_ACCESS(cpu, phy, len, rw, data) \
+ bx_dbg_phy_memory_access(cpu, phy, len, rw, data)
+#else // #if BX_DEBUGGER
+// debugger not compiled in, use empty stubs
+# define BX_DBG_ASYNC_INTR 1
+# define BX_DBG_ASYNC_DMA 1
+# define BX_DBG_DMA_REPORT(addr, len, what, val) /* empty */
+# define BX_DBG_IAC_REPORT(vector, irq) /* empty */
+# define BX_DBG_A20_REPORT(val) /* empty */
+# define BX_DBG_IO_REPORT(addr, size, op, val) /* empty */
+# define BX_DBG_UCMEM_REPORT(addr, size, op, val) /* empty */
+# define BX_DBG_LIN_MEMORY_ACCESS(cpu, lin, phy, len, pl, rw, data) /* empty */
+# define BX_DBG_PHY_MEMORY_ACCESS(cpu, phy, len, rw, data) /* empty */
+#endif // #if BX_DEBUGGER
+
+#define MAGIC_LOGNUM 0x12345678
+
+typedef class BOCHSAPI logfunctions
+{
+ char *prefix;
+ int type;
+// values of onoff: 0=ignore, 1=report, 2=ask, 3=fatal
+#define ACT_IGNORE 0
+#define ACT_REPORT 1
+#define ACT_ASK 2
+#define ACT_FATAL 3
+#define N_ACT 4
+ int onoff[N_LOGLEV];
+ class iofunctions *logio;
+ // default log actions for all devices, declared and initialized
+ // in logio.cc.
+ BOCHSAPI_CYGONLY static int default_onoff[N_LOGLEV];
+public:
+ logfunctions(void);
+ logfunctions(class iofunctions *);
+ ~logfunctions(void);
+
+ void info(const char *fmt, ...) BX_CPP_AttrPrintf(2, 3);
+ void error(const char *fmt, ...) BX_CPP_AttrPrintf(2, 3);
+ void panic(const char *fmt, ...) BX_CPP_AttrPrintf(2, 3);
+ void pass(const char *fmt, ...) BX_CPP_AttrPrintf(2, 3);
+ void ldebug(const char *fmt, ...) BX_CPP_AttrPrintf(2, 3);
+ void fatal (const char *prefix, const char *fmt, va_list ap, int exit_status);
+#if BX_EXTERNAL_DEBUGGER
+ virtual void ask (int level, const char *prefix, const char *fmt, va_list ap);
+#else
+ void ask (int level, const char *prefix, const char *fmt, va_list ap);
+#endif
+ void put(const char *);
+ void settype(int);
+ void setio(class iofunctions *);
+ void setonoff(int loglev, int value) {
+ assert (loglev >= 0 && loglev < N_LOGLEV);
+ onoff[loglev] = value;
+ }
+ char *getprefix () { return prefix; }
+ int getonoff(int level) {
+ assert (level>=0 && level= 0 && loglev < N_LOGLEV);
+ assert (action >= 0 && action < N_ACT);
+ default_onoff[loglev] = action;
+ }
+ static int get_default_action (int loglev) {
+ assert (loglev >= 0 && loglev < N_LOGLEV);
+ return default_onoff[loglev];
+ }
+} logfunc_t;
+
+#define BX_LOGPREFIX_SIZE 51
+
+enum {
+ IOLOG=0, FDLOG, GENLOG, CMOSLOG, CDLOG, DMALOG, ETHLOG, G2HLOG, HDLOG, KBDLOG,
+ NE2KLOG, PARLOG, HDEMULOG, PCILOG, PICLOG, PITLOG, SB16LOG, SERLOG, VGALOG,
+ DEVLOG, MEMLOG, DISLOG, GUILOG, IOAPICLOG, APICLOG, CPU0LOG, CPU1LOG,
+ CPU2LOG, CPU3LOG, CPU4LOG, CPU5LOG, CPU6LOG, CPU7LOG, CPU8LOG, CPU9LOG,
+ CPU10LOG, CPU11LOG, CPU12LOG, CPU13LOG, CPU14LOG, CPU15LOG, CTRLLOG,
+ UNMAPLOG, SERRLOG, BIOSLOG, PIT81LOG, PIT82LOG, IODEBUGLOG, PCI2ISALOG,
+ PLUGINLOG, EXTFPUIRQLOG , PCIVGALOG, PCIUSBLOG, VTIMERLOG, STIMERLOG,
+ PCIIDELOG, PCIDEVLOG, PCIPNICLOG, SPEAKERLOG, BUSMLOG, GAMELOG, ACPILOG
+};
+
+class BOCHSAPI iofunctions {
+ int magic;
+ char logprefix[BX_LOGPREFIX_SIZE];
+ FILE *logfd;
+ class logfunctions *log;
+ void init(void);
+ void flush(void);
+
+// Log Class types
+public:
+ iofunctions(void);
+ iofunctions(FILE *);
+ iofunctions(int);
+ iofunctions(const char *);
+ ~iofunctions(void);
+
+ void out(int facility, int level, const char *pre, const char *fmt, va_list ap);
+
+ void init_log(const char *fn);
+ void init_log(int fd);
+ void init_log(FILE *fs);
+ void exit_log();
+ void set_log_prefix(const char *prefix);
+ int get_n_logfns() { return n_logfn; }
+ logfunc_t *get_logfn(int index) { return logfn_list[index]; }
+ void add_logfn(logfunc_t *fn);
+ void remove_logfn(logfunc_t *fn);
+ void set_log_action(int loglevel, int action);
+ const char *getlevel(int i) {
+ static const char *loglevel[N_LOGLEV] = {
+ "DEBUG",
+ "INFO",
+ "ERROR",
+ "PANIC",
+ "PASS"
+ };
+ if (i>=0 && i=ACT_IGNORE && idbg_xlate_linear2phy() and
+// BX_CPU(n)->dword.eip, etc.
+#endif
+#endif
+
+typedef struct {
+ bx_bool floppy;
+ bx_bool keyboard;
+ bx_bool video;
+ bx_bool disk;
+ bx_bool pit;
+ bx_bool pic;
+ bx_bool bios;
+ bx_bool cmos;
+ bx_bool a20;
+ bx_bool interrupts;
+ bx_bool exceptions;
+ bx_bool debugger;
+ bx_bool mouse;
+ bx_bool io;
+ bx_bool dma;
+ bx_bool unsupported_io;
+ bx_bool serial;
+ bx_bool cdrom;
+ bx_bool print_timestamps;
+#if BX_DEBUGGER
+ bx_bool magic_break_enabled;
+#endif
+#if BX_GDBSTUB
+ bx_bool gdbstub_enabled;
+#endif
+#if BX_SUPPORT_APIC
+ bx_bool apic;
+ bx_bool ioapic;
+#endif
+#if BX_DEBUG_LINUX
+ bx_bool linux_syscall;
+#endif
+ void* record_io;
+} bx_debug_t;
+
+void CDECL bx_signal_handler(int signum);
+int bx_atexit(void);
+BOCHSAPI extern bx_debug_t bx_dbg;
+
+// memory access type (read/write/rw)
+#define BX_READ 0
+#define BX_WRITE 1
+#define BX_RW 2
+
+#define DATA_ACCESS 0
+#define CODE_ACCESS 1
+
+#include "memory/memory.h"
+#include "pc_system.h"
+#include "plugin.h"
+#include "gui/gui.h"
+#include "gui/textconfig.h"
+#include "gui/keymap.h"
+
+/* --- EXTERNS --- */
+
+#if BX_GUI_SIGHANDLER
+extern bx_bool bx_gui_sighandler;
+#endif
+
+// This value controls how often each I/O device's periodic() method
+// gets called. The timer is set up in iodev/devices.cc.
+#define BX_IODEV_HANDLER_PERIOD 100 // microseconds
+//#define BX_IODEV_HANDLER_PERIOD 10 // microseconds
+
+#define BX_PATHNAME_LEN 512
+
+#define BX_KBD_XT_TYPE 0
+#define BX_KBD_AT_TYPE 1
+#define BX_KBD_MF_TYPE 2
+
+#define BX_N_OPTROM_IMAGES 4
+#define BX_N_OPTRAM_IMAGES 4
+#define BX_N_SERIAL_PORTS 4
+#define BX_N_PARALLEL_PORTS 2
+#define BX_N_USB_HUBS 1
+#define BX_N_PCI_SLOTS 5
+
+#if BX_SUPPORT_SMP
+ #define BX_SMP_PROCESSORS (bx_cpu_count)
+#else
+ #define BX_SMP_PROCESSORS 1
+#endif
+
+void bx_center_print(FILE *file, const char *line, unsigned maxwidth);
+
+#include "instrument.h"
+
+// These are some convenience macros which abstract out accesses between
+// a variable in native byte ordering to/from guest (x86) memory, which is
+// always in little endian format. You must deal with alignment (if your
+// system cares) and endian rearranging. Don't assume anything. You could
+// put some platform specific asm() statements here, to make use of native
+// instructions to help perform these operations more efficiently than C++.
+
+
+#ifdef BX_LITTLE_ENDIAN
+
+#define WriteHostWordToLittleEndian(hostPtr, nativeVar16) \
+ *((Bit16u*)(hostPtr)) = (nativeVar16)
+#define WriteHostDWordToLittleEndian(hostPtr, nativeVar32) \
+ *((Bit32u*)(hostPtr)) = (nativeVar32)
+#define WriteHostQWordToLittleEndian(hostPtr, nativeVar64) \
+ *((Bit64u*)(hostPtr)) = (nativeVar64)
+
+#define ReadHostWordFromLittleEndian(hostPtr, nativeVar16) \
+ (nativeVar16) = *((Bit16u*)(hostPtr))
+#define ReadHostDWordFromLittleEndian(hostPtr, nativeVar32) \
+ (nativeVar32) = *((Bit32u*)(hostPtr))
+#define ReadHostQWordFromLittleEndian(hostPtr, nativeVar64) \
+ (nativeVar64) = *((Bit64u*)(hostPtr))
+
+#define CopyHostWordLittleEndian(hostAddrDst, hostAddrSrc) \
+ (* (Bit16u *)(hostAddrDst)) = (* (Bit16u *)(hostAddrSrc));
+#define CopyHostDWordLittleEndian(hostAddrDst, hostAddrSrc) \
+ (* (Bit32u *)(hostAddrDst)) = (* (Bit32u *)(hostAddrSrc));
+#define CopyHostQWordLittleEndian(hostAddrDst, hostAddrSrc) \
+ (* (Bit64u *)(hostAddrDst)) = (* (Bit64u *)(hostAddrSrc));
+
+#else
+
+#define WriteHostWordToLittleEndian(hostPtr, nativeVar16) { \
+ ((Bit8u *)(hostPtr))[0] = (Bit8u) (nativeVar16); \
+ ((Bit8u *)(hostPtr))[1] = (Bit8u) ((nativeVar16)>>8); \
+}
+#define WriteHostDWordToLittleEndian(hostPtr, nativeVar32) { \
+ ((Bit8u *)(hostPtr))[0] = (Bit8u) (nativeVar32); \
+ ((Bit8u *)(hostPtr))[1] = (Bit8u) ((nativeVar32)>>8); \
+ ((Bit8u *)(hostPtr))[2] = (Bit8u) ((nativeVar32)>>16); \
+ ((Bit8u *)(hostPtr))[3] = (Bit8u) ((nativeVar32)>>24); \
+}
+#define WriteHostQWordToLittleEndian(hostPtr, nativeVar64) { \
+ ((Bit8u *)(hostPtr))[0] = (Bit8u) (nativeVar64); \
+ ((Bit8u *)(hostPtr))[1] = (Bit8u) ((nativeVar64)>>8); \
+ ((Bit8u *)(hostPtr))[2] = (Bit8u) ((nativeVar64)>>16); \
+ ((Bit8u *)(hostPtr))[3] = (Bit8u) ((nativeVar64)>>24); \
+ ((Bit8u *)(hostPtr))[4] = (Bit8u) ((nativeVar64)>>32); \
+ ((Bit8u *)(hostPtr))[5] = (Bit8u) ((nativeVar64)>>40); \
+ ((Bit8u *)(hostPtr))[6] = (Bit8u) ((nativeVar64)>>48); \
+ ((Bit8u *)(hostPtr))[7] = (Bit8u) ((nativeVar64)>>56); \
+}
+
+#define ReadHostWordFromLittleEndian(hostPtr, nativeVar16) { \
+ (nativeVar16) = ((Bit16u) ((Bit8u *)(hostPtr))[0]) | \
+ (((Bit16u) ((Bit8u *)(hostPtr))[1])<<8) ; \
+}
+#define ReadHostDWordFromLittleEndian(hostPtr, nativeVar32) { \
+ (nativeVar32) = ((Bit32u) ((Bit8u *)(hostPtr))[0]) | \
+ (((Bit32u) ((Bit8u *)(hostPtr))[1])<<8) | \
+ (((Bit32u) ((Bit8u *)(hostPtr))[2])<<16) | \
+ (((Bit32u) ((Bit8u *)(hostPtr))[3])<<24); \
+}
+#define ReadHostQWordFromLittleEndian(hostPtr, nativeVar64) { \
+ (nativeVar64) = ((Bit64u) ((Bit8u *)(hostPtr))[0]) | \
+ (((Bit64u) ((Bit8u *)(hostPtr))[1])<<8) | \
+ (((Bit64u) ((Bit8u *)(hostPtr))[2])<<16) | \
+ (((Bit64u) ((Bit8u *)(hostPtr))[3])<<24) | \
+ (((Bit64u) ((Bit8u *)(hostPtr))[4])<<32) | \
+ (((Bit64u) ((Bit8u *)(hostPtr))[5])<<40) | \
+ (((Bit64u) ((Bit8u *)(hostPtr))[6])<<48) | \
+ (((Bit64u) ((Bit8u *)(hostPtr))[7])<<56); \
+}
+
+#define CopyHostWordLittleEndian(hostAddrDst, hostAddrSrc) { \
+ ((Bit8u *)(hostAddrDst))[0] = ((Bit8u *)(hostAddrSrc))[0]; \
+ ((Bit8u *)(hostAddrDst))[1] = ((Bit8u *)(hostAddrSrc))[1]; \
+}
+#define CopyHostDWordLittleEndian(hostAddrDst, hostAddrSrc) { \
+ ((Bit8u *)(hostAddrDst))[0] = ((Bit8u *)(hostAddrSrc))[0]; \
+ ((Bit8u *)(hostAddrDst))[1] = ((Bit8u *)(hostAddrSrc))[1]; \
+ ((Bit8u *)(hostAddrDst))[2] = ((Bit8u *)(hostAddrSrc))[2]; \
+ ((Bit8u *)(hostAddrDst))[3] = ((Bit8u *)(hostAddrSrc))[3]; \
+}
+#define CopyHostQWordLittleEndian(hostAddrDst, hostAddrSrc) { \
+ ((Bit8u *)(hostAddrDst))[0] = ((Bit8u *)(hostAddrSrc))[0]; \
+ ((Bit8u *)(hostAddrDst))[1] = ((Bit8u *)(hostAddrSrc))[1]; \
+ ((Bit8u *)(hostAddrDst))[2] = ((Bit8u *)(hostAddrSrc))[2]; \
+ ((Bit8u *)(hostAddrDst))[3] = ((Bit8u *)(hostAddrSrc))[3]; \
+ ((Bit8u *)(hostAddrDst))[4] = ((Bit8u *)(hostAddrSrc))[4]; \
+ ((Bit8u *)(hostAddrDst))[5] = ((Bit8u *)(hostAddrSrc))[5]; \
+ ((Bit8u *)(hostAddrDst))[6] = ((Bit8u *)(hostAddrSrc))[6]; \
+ ((Bit8u *)(hostAddrDst))[7] = ((Bit8u *)(hostAddrSrc))[7]; \
+}
+
+#endif
+
+#endif /* BX_BOCHS_H */
Index: trunk/src/bochs-diff-2.3.7/gui/gui.cc
===================================================================
--- trunk/src/bochs-diff-2.3.7/gui/gui.cc (nonexistent)
+++ trunk/src/bochs-diff-2.3.7/gui/gui.cc (revision 39)
@@ -0,0 +1,785 @@
+/////////////////////////////////////////////////////////////////////////
+// $Id: gui.cc,v 1.1 2008-11-14 03:31:24 zeus Exp $
+/////////////////////////////////////////////////////////////////////////
+//
+// Copyright (C) 2002 MandrakeSoft S.A.
+//
+// MandrakeSoft S.A.
+// 43, rue d'Aboukir
+// 75002 Paris - France
+// http://www.linux-mandrake.com/
+// http://www.mandrakesoft.com/
+//
+// This library is free software; you can redistribute it and/or
+// modify it under the terms of the GNU Lesser General Public
+// License as published by the Free Software Foundation; either
+// version 2 of the License, or (at your option) any later version.
+//
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+// Lesser General Public License for more details.
+//
+// You should have received a copy of the GNU Lesser General Public
+// License along with this library; if not, write to the Free Software
+// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+
+#include
+#include "bochs.h"
+#include "iodev.h"
+#include "gui/bitmaps/floppya.h"
+#include "gui/bitmaps/floppyb.h"
+#include "gui/bitmaps/mouse.h"
+#include "gui/bitmaps/reset.h"
+#include "gui/bitmaps/power.h"
+#include "gui/bitmaps/snapshot.h"
+#include "gui/bitmaps/copy.h"
+#include "gui/bitmaps/paste.h"
+#include "gui/bitmaps/configbutton.h"
+#include "gui/bitmaps/cdromd.h"
+#include "gui/bitmaps/userbutton.h"
+#include "gui/bitmaps/saverestore.h"
+
+#if BX_WITH_MACOS
+# include
+#endif
+
+bx_gui_c *bx_gui = NULL;
+
+#define BX_GUI_THIS bx_gui->
+#define LOG_THIS BX_GUI_THIS
+
+#define BX_KEY_UNKNOWN 0x7fffffff
+#define N_USER_KEYS 37
+
+typedef struct {
+ const char *key;
+ Bit32u symbol;
+} user_key_t;
+
+static user_key_t user_keys[N_USER_KEYS] =
+{
+ { "f1", BX_KEY_F1 },
+ { "f2", BX_KEY_F2 },
+ { "f3", BX_KEY_F3 },
+ { "f4", BX_KEY_F4 },
+ { "f5", BX_KEY_F5 },
+ { "f6", BX_KEY_F6 },
+ { "f7", BX_KEY_F7 },
+ { "f8", BX_KEY_F8 },
+ { "f9", BX_KEY_F9 },
+ { "f10", BX_KEY_F10 },
+ { "f11", BX_KEY_F11 },
+ { "f12", BX_KEY_F12 },
+ { "alt", BX_KEY_ALT_L },
+ { "bksl", BX_KEY_BACKSLASH },
+ { "bksp", BX_KEY_BACKSPACE },
+ { "ctrl", BX_KEY_CTRL_L },
+ { "del", BX_KEY_DELETE },
+ { "down", BX_KEY_DOWN },
+ { "end", BX_KEY_END },
+ { "enter", BX_KEY_ENTER },
+ { "esc", BX_KEY_ESC },
+ { "home", BX_KEY_HOME },
+ { "ins", BX_KEY_INSERT },
+ { "left", BX_KEY_LEFT },
+ { "menu", BX_KEY_MENU },
+ { "minus", BX_KEY_MINUS },
+ { "pgdwn", BX_KEY_PAGE_DOWN },
+ { "pgup", BX_KEY_PAGE_UP },
+ { "plus", BX_KEY_KP_ADD },
+ { "right", BX_KEY_RIGHT },
+ { "shift", BX_KEY_SHIFT_L },
+ { "space", BX_KEY_SPACE },
+ { "tab", BX_KEY_TAB },
+ { "up", BX_KEY_UP },
+ { "win", BX_KEY_WIN_L },
+ { "print", BX_KEY_PRINT },
+ { "power", BX_KEY_POWER_POWER }
+};
+
+bx_gui_c::bx_gui_c(void)
+{
+ put("GUI"); // Init in specific_init
+ settype(GUILOG);
+ statusitem_count = 0;
+ framebuffer = NULL;
+}
+
+bx_gui_c::~bx_gui_c()
+{
+ if (framebuffer != NULL) {
+ delete [] framebuffer;
+ }
+}
+
+void bx_gui_c::init(int argc, char **argv, unsigned tilewidth, unsigned tileheight)
+{
+ BX_GUI_THIS new_gfx_api = 0;
+ BX_GUI_THIS host_xres = 640;
+ BX_GUI_THIS host_yres = 480;
+ BX_GUI_THIS host_bpp = 8;
+ BX_GUI_THIS dialog_caps = BX_GUI_DLG_RUNTIME | BX_GUI_DLG_SAVE_RESTORE;
+
+ specific_init(argc, argv, tilewidth, tileheight, BX_HEADER_BAR_Y);
+
+ // Define some bitmaps to use in the headerbar
+ BX_GUI_THIS floppyA_bmap_id = create_bitmap(bx_floppya_bmap,
+ BX_FLOPPYA_BMAP_X, BX_FLOPPYA_BMAP_Y);
+ BX_GUI_THIS floppyA_eject_bmap_id = create_bitmap(bx_floppya_eject_bmap,
+ BX_FLOPPYA_BMAP_X, BX_FLOPPYA_BMAP_Y);
+ BX_GUI_THIS floppyB_bmap_id = create_bitmap(bx_floppyb_bmap,
+ BX_FLOPPYB_BMAP_X, BX_FLOPPYB_BMAP_Y);
+ BX_GUI_THIS floppyB_eject_bmap_id = create_bitmap(bx_floppyb_eject_bmap,
+ BX_FLOPPYB_BMAP_X, BX_FLOPPYB_BMAP_Y);
+ BX_GUI_THIS cdromD_bmap_id = create_bitmap(bx_cdromd_bmap,
+ BX_CDROMD_BMAP_X, BX_CDROMD_BMAP_Y);
+ BX_GUI_THIS cdromD_eject_bmap_id = create_bitmap(bx_cdromd_eject_bmap,
+ BX_CDROMD_BMAP_X, BX_CDROMD_BMAP_Y);
+ BX_GUI_THIS mouse_bmap_id = create_bitmap(bx_mouse_bmap,
+ BX_MOUSE_BMAP_X, BX_MOUSE_BMAP_Y);
+ BX_GUI_THIS nomouse_bmap_id = create_bitmap(bx_nomouse_bmap,
+ BX_MOUSE_BMAP_X, BX_MOUSE_BMAP_Y);
+
+ BX_GUI_THIS power_bmap_id = create_bitmap(bx_power_bmap, BX_POWER_BMAP_X, BX_POWER_BMAP_Y);
+ BX_GUI_THIS reset_bmap_id = create_bitmap(bx_reset_bmap, BX_RESET_BMAP_X, BX_RESET_BMAP_Y);
+ BX_GUI_THIS snapshot_bmap_id = create_bitmap(bx_snapshot_bmap, BX_SNAPSHOT_BMAP_X, BX_SNAPSHOT_BMAP_Y);
+ BX_GUI_THIS copy_bmap_id = create_bitmap(bx_copy_bmap, BX_COPY_BMAP_X, BX_COPY_BMAP_Y);
+ BX_GUI_THIS paste_bmap_id = create_bitmap(bx_paste_bmap, BX_PASTE_BMAP_X, BX_PASTE_BMAP_Y);
+ BX_GUI_THIS config_bmap_id = create_bitmap(bx_config_bmap, BX_CONFIG_BMAP_X, BX_CONFIG_BMAP_Y);
+ BX_GUI_THIS user_bmap_id = create_bitmap(bx_user_bmap, BX_USER_BMAP_X, BX_USER_BMAP_Y);
+ BX_GUI_THIS save_restore_bmap_id = create_bitmap(bx_save_restore_bmap,
+ BX_SAVE_RESTORE_BMAP_X, BX_SAVE_RESTORE_BMAP_Y);
+
+ // Add the initial bitmaps to the headerbar, and enable callback routine, for use
+ // when that bitmap is clicked on
+
+ // Floppy A:
+// BX_GUI_THIS floppyA_status = DEV_floppy_get_media_status(0);
+BX_GUI_THIS floppyA_status = true;
+ if (BX_GUI_THIS floppyA_status)
+ BX_GUI_THIS floppyA_hbar_id = headerbar_bitmap(BX_GUI_THIS floppyA_bmap_id,
+ BX_GRAVITY_LEFT, floppyA_handler);
+ else
+ BX_GUI_THIS floppyA_hbar_id = headerbar_bitmap(BX_GUI_THIS floppyA_eject_bmap_id,
+ BX_GRAVITY_LEFT, floppyA_handler);
+ BX_GUI_THIS set_tooltip(BX_GUI_THIS floppyA_hbar_id, "Change floppy A: media");
+
+ // Floppy B:
+// BX_GUI_THIS floppyB_status = DEV_floppy_get_media_status(1);
+BX_GUI_THIS floppyB_status = false;
+ if (BX_GUI_THIS floppyB_status)
+ BX_GUI_THIS floppyB_hbar_id = headerbar_bitmap(BX_GUI_THIS floppyB_bmap_id,
+ BX_GRAVITY_LEFT, floppyB_handler);
+ else
+ BX_GUI_THIS floppyB_hbar_id = headerbar_bitmap(BX_GUI_THIS floppyB_eject_bmap_id,
+ BX_GRAVITY_LEFT, floppyB_handler);
+ BX_GUI_THIS set_tooltip(BX_GUI_THIS floppyB_hbar_id, "Change floppy B: media");
+
+ // CDROM,
+ // the harddrive object is not initialised yet,
+ // so we just set the bitmap to ejected for now
+ BX_GUI_THIS cdromD_hbar_id = headerbar_bitmap(BX_GUI_THIS cdromD_eject_bmap_id,
+ BX_GRAVITY_LEFT, cdromD_handler);
+ BX_GUI_THIS set_tooltip(BX_GUI_THIS cdromD_hbar_id, "Change first CDROM media");
+
+ // Mouse button
+ if (SIM->get_param_bool(BXPN_MOUSE_ENABLED)->get())
+ BX_GUI_THIS mouse_hbar_id = headerbar_bitmap(BX_GUI_THIS mouse_bmap_id,
+ BX_GRAVITY_LEFT, toggle_mouse_enable);
+ else
+ BX_GUI_THIS mouse_hbar_id = headerbar_bitmap(BX_GUI_THIS nomouse_bmap_id,
+ BX_GRAVITY_LEFT, toggle_mouse_enable);
+ BX_GUI_THIS set_tooltip(BX_GUI_THIS mouse_hbar_id, "Enable mouse capture");
+
+ // These are the buttons on the right side. They are created in order
+ // of right to left.
+
+ // Power button
+ BX_GUI_THIS power_hbar_id = headerbar_bitmap(BX_GUI_THIS power_bmap_id,
+ BX_GRAVITY_RIGHT, power_handler);
+ BX_GUI_THIS set_tooltip(BX_GUI_THIS power_hbar_id, "Turn power off");
+ // Save/Restore Button
+ BX_GUI_THIS save_restore_hbar_id = headerbar_bitmap(BX_GUI_THIS save_restore_bmap_id,
+ BX_GRAVITY_RIGHT, save_restore_handler);
+ BX_GUI_THIS set_tooltip(BX_GUI_THIS save_restore_hbar_id, "Save simulation state");
+ // Reset button
+ BX_GUI_THIS reset_hbar_id = headerbar_bitmap(BX_GUI_THIS reset_bmap_id,
+ BX_GRAVITY_RIGHT, reset_handler);
+ BX_GUI_THIS set_tooltip(BX_GUI_THIS reset_hbar_id, "Reset the system");
+ // Configure button
+ BX_GUI_THIS config_hbar_id = headerbar_bitmap(BX_GUI_THIS config_bmap_id,
+ BX_GRAVITY_RIGHT, config_handler);
+ BX_GUI_THIS set_tooltip(BX_GUI_THIS config_hbar_id, "Runtime config dialog");
+ // Snapshot button
+ BX_GUI_THIS snapshot_hbar_id = headerbar_bitmap(BX_GUI_THIS snapshot_bmap_id,
+ BX_GRAVITY_RIGHT, snapshot_handler);
+ BX_GUI_THIS set_tooltip(BX_GUI_THIS snapshot_hbar_id, "Save snapshot of the text mode screen");
+ // Paste button
+ BX_GUI_THIS paste_hbar_id = headerbar_bitmap(BX_GUI_THIS paste_bmap_id,
+ BX_GRAVITY_RIGHT, paste_handler);
+ BX_GUI_THIS set_tooltip(BX_GUI_THIS paste_hbar_id, "Paste clipboard text as emulated keystrokes");
+ // Copy button
+ BX_GUI_THIS copy_hbar_id = headerbar_bitmap(BX_GUI_THIS copy_bmap_id,
+ BX_GRAVITY_RIGHT, copy_handler);
+ BX_GUI_THIS set_tooltip(BX_GUI_THIS copy_hbar_id, "Copy text mode screen to the clipboard");
+ // User button
+ BX_GUI_THIS user_hbar_id = headerbar_bitmap(BX_GUI_THIS user_bmap_id,
+ BX_GRAVITY_RIGHT, userbutton_handler);
+ BX_GUI_THIS set_tooltip(BX_GUI_THIS user_hbar_id, "Send keyboard shortcut");
+
+ if (SIM->get_param_bool(BXPN_TEXT_SNAPSHOT_CHECK)->get()) {
+ bx_pc_system.register_timer(this, bx_gui_c::snapshot_checker, (unsigned) 1000000, 1, 1, "snap_chk");
+ }
+
+ BX_GUI_THIS charmap_updated = 0;
+
+ if (!BX_GUI_THIS new_gfx_api && (BX_GUI_THIS framebuffer == NULL)) {
+ BX_GUI_THIS framebuffer = new Bit8u[BX_MAX_XRES * BX_MAX_YRES * 4];
+ }
+ show_headerbar();
+}
+
+void bx_gui_c::cleanup(void)
+{
+ statusitem_count = 0;
+}
+
+void bx_gui_c::update_drive_status_buttons(void)
+{
+ BX_GUI_THIS floppyA_status = /* DEV_floppy_get_media_status(0)
+ && */ (SIM->get_param_enum(BXPN_FLOPPYA_STATUS)->get() == BX_INSERTED);
+ BX_GUI_THIS floppyB_status = false /*DEV_floppy_get_media_status(1)
+ && (SIM->get_param_enum(BXPN_FLOPPYB_STATUS)->get() == BX_INSERTED) */;
+ //Bit32u handle = DEV_hd_get_first_cd_handle();
+ //BX_GUI_THIS cdromD_status = DEV_hd_get_cd_media_status(handle);
+ BX_GUI_THIS cdromD_status = false;
+ if (BX_GUI_THIS floppyA_status)
+ replace_bitmap(BX_GUI_THIS floppyA_hbar_id, BX_GUI_THIS floppyA_bmap_id);
+ else {
+#if BX_WITH_MACOS
+ // If we are using the Mac floppy driver, eject the disk
+ // from the floppy drive. This doesn't work in MacOS X.
+ if (!strcmp(SIM->get_param_string(BXPN_FLOPPYA_PATH)->getptr(), SuperDrive))
+ DiskEject(1);
+#endif
+ replace_bitmap(BX_GUI_THIS floppyA_hbar_id, BX_GUI_THIS floppyA_eject_bmap_id);
+ }
+ if (BX_GUI_THIS floppyB_status)
+ replace_bitmap(BX_GUI_THIS floppyB_hbar_id, BX_GUI_THIS floppyB_bmap_id);
+ else {
+#if BX_WITH_MACOS
+ // If we are using the Mac floppy driver, eject the disk
+ // from the floppy drive. This doesn't work in MacOS X.
+ if (!strcmp(SIM->get_param_string(BXPN_FLOPPYB_PATH)->getptr(), SuperDrive))
+ DiskEject(1);
+#endif
+ replace_bitmap(BX_GUI_THIS floppyB_hbar_id, BX_GUI_THIS floppyB_eject_bmap_id);
+ }
+ if (BX_GUI_THIS cdromD_status)
+ replace_bitmap(BX_GUI_THIS cdromD_hbar_id, BX_GUI_THIS cdromD_bmap_id);
+ else {
+ replace_bitmap(BX_GUI_THIS cdromD_hbar_id, BX_GUI_THIS cdromD_eject_bmap_id);
+ }
+}
+
+void bx_gui_c::floppyA_handler(void)
+{
+ if (SIM->get_param_enum(BXPN_FLOPPYA_DEVTYPE)->get() == BX_FLOPPY_NONE)
+ return; // no primary floppy device present
+ if (BX_GUI_THIS dialog_caps & BX_GUI_DLG_FLOPPY) {
+ // instead of just toggling the status, call win32dialog to bring up
+ // a dialog asking what disk image you want to switch to.
+ int ret = SIM->ask_param(BXPN_FLOPPYA_PATH);
+ if (ret > 0) {
+ BX_GUI_THIS update_drive_status_buttons();
+ }
+ return;
+ }
+ BX_GUI_THIS floppyA_status = !BX_GUI_THIS floppyA_status;
+ DEV_floppy_set_media_status(0, BX_GUI_THIS floppyA_status);
+ BX_GUI_THIS update_drive_status_buttons();
+}
+
+void bx_gui_c::floppyB_handler(void)
+{
+ if (SIM->get_param_enum(BXPN_FLOPPYB_DEVTYPE)->get() == BX_FLOPPY_NONE)
+ return; // no secondary floppy device present
+ if (BX_GUI_THIS dialog_caps & BX_GUI_DLG_FLOPPY) {
+ // instead of just toggling the status, call win32dialog to bring up
+ // a dialog asking what disk image you want to switch to.
+ int ret = SIM->ask_param(BXPN_FLOPPYB_PATH);
+ if (ret > 0) {
+ BX_GUI_THIS update_drive_status_buttons();
+ }
+ return;
+ }
+ BX_GUI_THIS floppyB_status = !BX_GUI_THIS floppyB_status;
+ DEV_floppy_set_media_status(1, BX_GUI_THIS floppyB_status);
+ BX_GUI_THIS update_drive_status_buttons();
+}
+
+void bx_gui_c::cdromD_handler(void)
+{
+ Bit32u handle = DEV_hd_get_first_cd_handle();
+ if (BX_GUI_THIS dialog_caps & BX_GUI_DLG_CDROM) {
+ // instead of just toggling the status, call win32dialog to bring up
+ // a dialog asking what disk image you want to switch to.
+ // This code handles the first cdrom only. The cdrom drives #2, #3 and
+ // #4 are handled in the win32 runtime dialog.
+ bx_param_c *cdrom = SIM->get_first_cdrom();
+ if (cdrom == NULL)
+ return; // no cdrom found
+ int ret = SIM->ask_param(cdrom);
+ if (ret > 0) {
+ BX_GUI_THIS update_drive_status_buttons();
+ }
+ return;
+ }
+ BX_GUI_THIS cdromD_status =
+ DEV_hd_set_cd_media_status(handle, !BX_GUI_THIS cdromD_status);
+ BX_GUI_THIS update_drive_status_buttons();
+}
+
+void bx_gui_c::reset_handler(void)
+{
+ BX_INFO(("system RESET callback"));
+ bx_pc_system.Reset(BX_RESET_HARDWARE);
+}
+
+void bx_gui_c::power_handler(void)
+{
+ // test case for yes/no dialog: confirm power off
+ //if (!SIM->ask_yes_no("Quit Bochs", "Are you sure ?", 0))
+ // return;
+ // the user pressed power button, so there's no doubt they want bochs
+ // to quit. Change panics to fatal for the GUI and then do a panic.
+ bx_user_quit = 1;
+ LOG_THIS setonoff(LOGLEV_PANIC, ACT_FATAL);
+ BX_PANIC (("POWER button turned off."));
+ // shouldn't reach this point, but if you do, QUIT!!!
+ fprintf (stderr, "Bochs is exiting because you pressed the power button.\n");
+ BX_EXIT (1);
+}
+
+Bit32s bx_gui_c::make_text_snapshot(char **snapshot, Bit32u *length)
+{
+ Bit8u* raw_snap = NULL;
+ char *clean_snap;
+ unsigned line_addr, txt_addr, txHeight, txWidth;
+
+ DEV_vga_get_text_snapshot(&raw_snap, &txHeight, &txWidth);
+ if (txHeight <= 0) return -1;
+ clean_snap = (char*) malloc(txHeight*(txWidth+2)+1);
+ txt_addr = 0;
+ for (unsigned i=0; i 0) && (clean_snap[txt_addr-1] == ' ')) txt_addr--;
+#ifdef WIN32
+ if(!(SIM->get_param_bool(BXPN_TEXT_SNAPSHOT_CHECK)->get())) {
+ clean_snap[txt_addr++] = 13;
+ }
+#endif
+ clean_snap[txt_addr++] = 10;
+ }
+ clean_snap[txt_addr] = 0;
+ *snapshot = clean_snap;
+ *length = txt_addr;
+ return 0;
+}
+
+// create a text snapshot and copy to the system clipboard. On guis that
+// we haven't figured out how to support yet, dump to a file instead.
+void bx_gui_c::copy_handler(void)
+{
+ Bit32u len;
+ char *text_snapshot;
+ if (make_text_snapshot (&text_snapshot, &len) < 0) {
+ BX_INFO(("copy button failed, mode not implemented"));
+ return;
+ }
+ if (!BX_GUI_THIS set_clipboard_text(text_snapshot, len)) {
+ // platform specific code failed, use portable code instead
+ FILE *fp = fopen("copy.txt", "w");
+ fwrite(text_snapshot, 1, len, fp);
+ fclose(fp);
+ }
+ free(text_snapshot);
+}
+
+// Check the current text snapshot against file snapchk.txt.
+void bx_gui_c::snapshot_checker(void *this_ptr)
+{
+ char filename[BX_PATHNAME_LEN];
+ strcpy(filename,"snapchk.txt");
+ FILE *fp = fopen(filename, "rb");
+ if(fp) {
+ char *text_snapshot;
+ Bit32u len;
+ if (make_text_snapshot (&text_snapshot, &len) < 0) {
+ return;
+ }
+ char *compare_snapshot = (char *) malloc((len+1) * sizeof(char));
+ fread(compare_snapshot, 1, len, fp);
+ fclose(fp);
+ strcpy(filename,"snapmask.txt");
+ fp=fopen(filename, "rb");
+ if(fp) {
+ char *mask_snapshot = (char *) malloc((len+1) * sizeof(char));
+ unsigned i;
+ bx_bool flag = 1;
+ fread(mask_snapshot, 1, len, fp);
+ fclose(fp);
+ for(i=0;iask_filename (filename, sizeof(filename),
+ "Save snapshot as...", "snapshot.txt",
+ bx_param_string_c::SAVE_FILE_DIALOG);
+ if (ret < 0) { // cancelled
+ free(text_snapshot);
+ return;
+ }
+ } else {
+ strcpy (filename, "snapshot.txt");
+ }
+ FILE *fp = fopen(filename, "wb");
+ fwrite(text_snapshot, 1, len, fp);
+ fclose(fp);
+ free(text_snapshot);
+}
+
+// Read ASCII chars from the system clipboard and paste them into bochs.
+// Note that paste cannot work with the key mapping tables loaded.
+void bx_gui_c::paste_handler(void)
+{
+ Bit32s nbytes;
+ Bit8u *bytes;
+ if (!bx_keymap.isKeymapLoaded ()) {
+ BX_ERROR (("keyboard_mapping disabled, so paste cannot work"));
+ return;
+ }
+ if (!BX_GUI_THIS get_clipboard_text(&bytes, &nbytes)) {
+ BX_ERROR (("paste not implemented on this platform"));
+ return;
+ }
+ BX_INFO (("pasting %d bytes", nbytes));
+ DEV_kbd_paste_bytes (bytes, nbytes);
+}
+
+void bx_gui_c::config_handler(void)
+{
+ if (BX_GUI_THIS dialog_caps & BX_GUI_DLG_RUNTIME) {
+ SIM->configuration_interface(NULL, CI_RUNTIME_CONFIG);
+ }
+}
+
+void bx_gui_c::toggle_mouse_enable(void)
+{
+ int old = SIM->get_param_bool(BXPN_MOUSE_ENABLED)->get();
+ BX_DEBUG (("toggle mouse_enabled, now %d", !old));
+ SIM->get_param_bool(BXPN_MOUSE_ENABLED)->set(!old);
+}
+
+Bit32u get_user_key(char *key)
+{
+ int i = 0;
+
+ while (i < N_USER_KEYS) {
+ if (!strcmp(key, user_keys[i].key))
+ return user_keys[i].symbol;
+ i++;
+ }
+ return BX_KEY_UNKNOWN;
+}
+
+void bx_gui_c::userbutton_handler(void)
+{
+ Bit32u shortcut[4];
+ Bit32u symbol;
+ char user_shortcut[512];
+ char *ptr;
+ int i, len = 0, ret = 1;
+
+ if (BX_GUI_THIS dialog_caps & BX_GUI_DLG_USER) {
+ ret = SIM->ask_param(BXPN_USER_SHORTCUT);
+ }
+ strcpy(user_shortcut, SIM->get_param_string(BXPN_USER_SHORTCUT)->getptr());
+ if ((ret > 0) && user_shortcut[0] && (strcmp(user_shortcut, "none"))) {
+ ptr = strtok(user_shortcut, "-");
+ if ((strcmp(ptr, SIM->get_param_string(BXPN_USER_SHORTCUT)->getptr())) ||
+ (strlen(SIM->get_param_string(BXPN_USER_SHORTCUT)->getptr()) < 6)) {
+ while (ptr) {
+ symbol = get_user_key(ptr);
+ if (symbol == BX_KEY_UNKNOWN) {
+ BX_ERROR(("Unknown shortcut %s ignored", ptr));
+ return;
+ }
+ shortcut[len++] = symbol;
+ ptr = strtok(NULL, "-");
+ }
+ } else {
+ BX_ERROR(("Unknown shortcut %s ignored", user_shortcut));
+ return;
+ }
+ i = 0;
+ while (i < len) {
+ DEV_kbd_gen_scancode(shortcut[i++]);
+ }
+ i--;
+ while (i >= 0) {
+ DEV_kbd_gen_scancode(shortcut[i--] | BX_KEY_RELEASED);
+ }
+ }
+}
+
+void bx_gui_c::save_restore_handler(void)
+{
+ int ret;
+ char sr_path[BX_PATHNAME_LEN];
+
+ if (BX_GUI_THIS dialog_caps & BX_GUI_DLG_SAVE_RESTORE) {
+ sr_path[0] = 0;
+ ret = SIM->ask_filename(sr_path, sizeof(sr_path),
+ "Save Bochs state to folder...", "none",
+ bx_param_string_c::SELECT_FOLDER_DLG);
+ if ((ret >= 0) && (strcmp(sr_path, "none"))) {
+ if (SIM->save_state(sr_path)) {
+ if (!SIM->ask_yes_no("WARNING",
+ "The save function currently doesn't handle the state of hard drive images,\n"
+ "so we don't recommend to continue, unless you are running a read-only\n"
+ "guest system (e.g. Live-CD).\n\n"
+ "Do you want to continue?", 0)) {
+ power_handler();
+ }
+ }
+ }
+ }
+}
+
+void bx_gui_c::mouse_enabled_changed(bx_bool val)
+{
+ // This is only called when SIM->get_init_done is 1. Note that VAL
+ // is the new value of mouse_enabled, which may not match the old
+ // value which is still in SIM->get_param_bool(BXPN_MOUSE_ENABLED)->get().
+ BX_DEBUG (("replacing the mouse bitmaps"));
+ if (val)
+ BX_GUI_THIS replace_bitmap(BX_GUI_THIS mouse_hbar_id, BX_GUI_THIS mouse_bmap_id);
+ else
+ BX_GUI_THIS replace_bitmap(BX_GUI_THIS mouse_hbar_id, BX_GUI_THIS nomouse_bmap_id);
+ // give the GUI a chance to respond to the event. Most guis will hide
+ // the native mouse cursor and do something to trap the mouse inside the
+ // bochs VGA display window.
+ BX_GUI_THIS mouse_enabled_changed_specific (val);
+}
+
+void bx_gui_c::init_signal_handlers()
+{
+#if BX_GUI_SIGHANDLER
+ if (bx_gui_sighandler)
+ {
+ Bit32u mask = bx_gui->get_sighandler_mask ();
+ for (Bit32u sig=0; sig<32; sig++)
+ {
+ if (mask & (1<> 5] = 1;
+ BX_GUI_THIS charmap_updated = 1;
+}
+
+void bx_gui_c::beep_on(float frequency)
+{
+ BX_INFO(("GUI Beep ON (frequency=%.2f)", frequency));
+}
+
+void bx_gui_c::beep_off()
+{
+ BX_INFO(("GUI Beep OFF"));
+}
+
+int bx_gui_c::register_statusitem(const char *text)
+{
+ if (statusitem_count < BX_MAX_STATUSITEMS) {
+ strncpy(statusitem_text[statusitem_count], text, 8);
+ statusitem_text[statusitem_count][7] = 0;
+ return statusitem_count++;
+ } else {
+ return -1;
+ }
+}
+
+void bx_gui_c::get_capabilities(Bit16u *xres, Bit16u *yres, Bit16u *bpp)
+{
+ *xres = 1024;
+ *yres = 768;
+ *bpp = 32;
+}
+
+bx_svga_tileinfo_t *bx_gui_c::graphics_tile_info(bx_svga_tileinfo_t *info)
+{
+ if (!info) {
+ info = (bx_svga_tileinfo_t *)malloc(sizeof(bx_svga_tileinfo_t));
+ if (!info) {
+ return NULL;
+ }
+ }
+
+ BX_GUI_THIS host_pitch = BX_GUI_THIS host_xres * ((BX_GUI_THIS host_bpp + 1) >> 3);
+
+ info->bpp = BX_GUI_THIS host_bpp;
+ info->pitch = BX_GUI_THIS host_pitch;
+ switch (info->bpp) {
+ case 15:
+ info->red_shift = 15;
+ info->green_shift = 10;
+ info->blue_shift = 5;
+ info->red_mask = 0x7c00;
+ info->green_mask = 0x03e0;
+ info->blue_mask = 0x001f;
+ break;
+ case 16:
+ info->red_shift = 16;
+ info->green_shift = 11;
+ info->blue_shift = 5;
+ info->red_mask = 0xf800;
+ info->green_mask = 0x07e0;
+ info->blue_mask = 0x001f;
+ break;
+ case 24:
+ case 32:
+ info->red_shift = 24;
+ info->green_shift = 16;
+ info->blue_shift = 8;
+ info->red_mask = 0xff0000;
+ info->green_mask = 0x00ff00;
+ info->blue_mask = 0x0000ff;
+ break;
+ }
+ info->is_indexed = (BX_GUI_THIS host_bpp == 8);
+#ifdef BX_LITTLE_ENDIAN
+ info->is_little_endian = 1;
+#else
+ info->is_little_endian = 0;
+#endif
+
+ return info;
+}
+
+Bit8u *bx_gui_c::graphics_tile_get(unsigned x0, unsigned y0,
+ unsigned *w, unsigned *h)
+{
+ if (x0+X_TILESIZE > BX_GUI_THIS host_xres) {
+ *w = BX_GUI_THIS host_xres - x0;
+ }
+ else {
+ *w = X_TILESIZE;
+ }
+
+ if (y0+Y_TILESIZE > BX_GUI_THIS host_yres) {
+ *h = BX_GUI_THIS host_yres - y0;
+ }
+ else {
+ *h = Y_TILESIZE;
+ }
+
+ return (Bit8u *)framebuffer + y0 * BX_GUI_THIS host_pitch +
+ x0 * ((BX_GUI_THIS host_bpp + 1) >> 3);
+}
+
+void bx_gui_c::graphics_tile_update_in_place(unsigned x0, unsigned y0,
+ unsigned w, unsigned h)
+{
+ Bit8u tile[X_TILESIZE * Y_TILESIZE * 4];
+ Bit8u *tile_ptr, *fb_ptr;
+ Bit16u xc, yc, fb_pitch, tile_pitch;
+ Bit8u r, diffx, diffy;
+
+ diffx = (x0 % X_TILESIZE);
+ diffy = (y0 % Y_TILESIZE);
+ if (diffx > 0) {
+ x0 -= diffx;
+ w += diffx;
+ }
+ if (diffy > 0) {
+ y0 -= diffy;
+ h += diffy;
+ }
+ fb_pitch = BX_GUI_THIS host_pitch;
+ tile_pitch = X_TILESIZE * ((BX_GUI_THIS host_bpp + 1) >> 3);
+ for (yc=y0; yc<(y0+h); yc+=Y_TILESIZE) {
+ for (xc=x0; xc<(x0+w); xc+=X_TILESIZE) {
+ fb_ptr = BX_GUI_THIS framebuffer + (yc * fb_pitch + xc * ((BX_GUI_THIS host_bpp + 1) >> 3));
+ tile_ptr = &tile[0];
+ for (r=0; rget_reg(a))
+#define DEV_cmos_set_reg(a,b) (bx_devices.pluginCmosDevice->set_reg(a,b))
+#define DEV_cmos_checksum() (bx_devices.pluginCmosDevice->checksum_cmos())
+#define DEV_cmos_get_timeval() (bx_devices.pluginCmosDevice->get_timeval())
+#define DEV_cmos_present() (bx_devices.pluginCmosDevice != &bx_devices.stubCmos)
+
+///////// keyboard macros
+#define DEV_mouse_motion(dx, dy, state) \
+ (bx_devices.pluginKeyboard->mouse_motion(dx, dy, 0, state))
+#define DEV_mouse_motion_ext(dx, dy, dz, state) \
+ (bx_devices.pluginKeyboard->mouse_motion(dx, dy, dz, state))
+#define DEV_kbd_gen_scancode(key) \
+ (bx_devices.pluginKeyboard->gen_scancode(key))
+#define DEV_kbd_paste_bytes(bytes, count) \
+ (bx_devices.pluginKeyboard->paste_bytes(bytes,count))
+
+///////// hard drive macros
+#define DEV_hd_read_handler(a, b, c) \
+ (bx_devices.pluginHardDrive->virt_read_handler(b, c))
+#define DEV_hd_write_handler(a, b, c, d) \
+ (bx_devices.pluginHardDrive->virt_write_handler(b, c, d))
+#define DEV_hd_get_first_cd_handle() \
+ (bx_devices.pluginHardDrive->get_first_cd_handle())
+#define DEV_hd_get_device_handle(a,b) \
+ (bx_devices.pluginHardDrive->get_device_handle(a,b))
+#define DEV_hd_get_cd_media_status(handle) \
+ (bx_devices.pluginHardDrive->get_cd_media_status(handle))
+#define DEV_hd_set_cd_media_status(handle, status) \
+ (bx_devices.pluginHardDrive->set_cd_media_status(handle, status))
+#define DEV_hd_present() (bx_devices.pluginHardDrive != &bx_devices.stubHardDrive)
+#define DEV_hd_bmdma_read_sector(a,b,c) bx_devices.pluginHardDrive->bmdma_read_sector(a,b,c)
+#define DEV_hd_bmdma_write_sector(a,b) bx_devices.pluginHardDrive->bmdma_write_sector(a,b)
+#define DEV_hd_bmdma_complete(a) bx_devices.pluginHardDrive->bmdma_complete(a)
+
+#define DEV_bulk_io_quantum_requested() (bx_devices.bulkIOQuantumsRequested)
+#define DEV_bulk_io_quantum_transferred() (bx_devices.bulkIOQuantumsTransferred)
+#define DEV_bulk_io_host_addr() (bx_devices.bulkIOHostAddr)
+
+///////// FLOPPY macros
+#define DEV_floppy_get_media_status(drive) bx_devices.pluginFloppyDevice->get_media_status(drive)
+#define DEV_floppy_set_media_status(drive, status) bx_devices.pluginFloppyDevice->set_media_status(drive, status)
+#define DEV_floppy_present() (bx_devices.pluginFloppyDevice != &bx_devices.stubFloppy)
+
+///////// DMA macros
+#define DEV_dma_register_8bit_channel(channel, dmaRead, dmaWrite, name) \
+ (bx_devices.pluginDmaDevice->registerDMA8Channel(channel, dmaRead, dmaWrite, name))
+#define DEV_dma_register_16bit_channel(channel, dmaRead, dmaWrite, name) \
+ (bx_devices.pluginDmaDevice->registerDMA16Channel(channel, dmaRead, dmaWrite, name))
+#define DEV_dma_unregister_channel(channel) \
+ (bx_devices.pluginDmaDevice->unregisterDMAChannel(channel))
+#define DEV_dma_set_drq(channel, val) \
+ (bx_devices.pluginDmaDevice->set_DRQ(channel, val))
+#define DEV_dma_get_tc() \
+ (bx_devices.pluginDmaDevice->get_TC())
+#define DEV_dma_raise_hlda() \
+ (bx_devices.pluginDmaDevice->raise_HLDA())
+
+///////// PIC macros
+#define DEV_pic_lower_irq(b) (bx_devices.pluginPicDevice->lower_irq(b))
+#define DEV_pic_raise_irq(b) (bx_devices.pluginPicDevice->raise_irq(b))
+#define DEV_pic_set_mode(a,b) (bx_devices.pluginPicDevice->set_mode(a,b))
+#define DEV_pic_iac() (bx_devices.pluginPicDevice->IAC())
+#define DEV_pic_show_pic_state() (bx_devices.pluginPicDevice->show_pic_state())
+
+///////// VGA macros
+#define DEV_vga_mem_read(addr) (bx_devices.pluginVgaDevice->mem_read(addr))
+#define DEV_vga_mem_write(addr, val) (bx_devices.pluginVgaDevice->mem_write(addr, val))
+#define DEV_vga_redraw_area(left, top, right, bottom) \
+ (bx_devices.pluginVgaDevice->redraw_area(left, top, right, bottom))
+#define DEV_vga_get_text_snapshot(rawsnap, height, width) \
+ (bx_devices.pluginVgaDevice->get_text_snapshot(rawsnap, height, width))
+#define DEV_vga_refresh() \
+ (bx_devices.pluginVgaDevice->trigger_timer(bx_devices.pluginVgaDevice))
+#define DEV_vga_get_actl_pal_idx(index) (bx_devices.pluginVgaDevice->get_actl_palette_idx(index))
+#define DEV_vga_dump_status() (bx_devices.pluginVgaDevice->dump_status())
+
+///////// PCI macros
+#define DEV_register_pci_handlers(a,b,c,d) \
+ (bx_devices.pluginPciBridge->register_pci_handlers(a,b,c,d))
+#define DEV_is_pci_device(name) bx_devices.pluginPciBridge->is_pci_device(name)
+#define DEV_pci_set_irq(a,b,c) bx_devices.pluginPci2IsaBridge->pci_set_irq(a,b,c)
+#define DEV_pci_set_base_mem(a,b,c,d,e,f) \
+ (bx_devices.pluginPciBridge->pci_set_base_mem(a,b,c,d,e,f))
+#define DEV_pci_set_base_io(a,b,c,d,e,f,g,h) \
+ (bx_devices.pluginPciBridge->pci_set_base_io(a,b,c,d,e,f,g,h))
+#define DEV_pci_rd_memtype(addr) bx_devices.pluginPciBridge->rd_memType(addr)
+#define DEV_pci_wr_memtype(addr) bx_devices.pluginPciBridge->wr_memType(addr)
+#define DEV_pci_print_i440fx_state() bx_devices.pluginPciBridge->print_i440fx_state()
+#define DEV_ide_bmdma_present() bx_devices.pluginPciIdeController->bmdma_present()
+#define DEV_ide_bmdma_set_irq(a) bx_devices.pluginPciIdeController->bmdma_set_irq(a)
+#define DEV_acpi_generate_smi(a) bx_devices.pluginACPIController->generate_smi(a)
+
+///////// NE2000 macro
+#define DEV_ne2k_print_info(file,page,reg,brief) \
+ bx_devices.pluginNE2kDevice->print_info(file,page,reg,brief)
+
+///////// Speaker macros
+#define DEV_speaker_beep_on(frequency) bx_devices.pluginSpeaker->beep_on(frequency)
+#define DEV_speaker_beep_off() bx_devices.pluginSpeaker->beep_off()
+
+///////// Serial macro
+#define DEV_serial_mouse_enq(dx, dy, dz, state) \
+ (bx_devices.pluginSerialDevice->serial_mouse_enq(dx, dy, dz, state))
+
+///////// BUS mouse macro
+#define DEV_bus_mouse_enq(dx, dy, dz, state) \
+ (bx_devices.pluginBusMouse->bus_mouse_enq(dx, dy, 0, state))
+
+///////// USB device macros
+#if BX_SUPPORT_PCIUSB
+#define DEV_usb_mouse_enq(dx, dy, dz, state) \
+ (bx_devices.pluginPciUSBAdapter->usb_mouse_enq(dx, dy, dz, state))
+#define DEV_usb_mouse_enabled_changed(enable) \
+ (bx_devices.pluginPciUSBAdapter->usb_mouse_enabled_changed(enable))
+#define DEV_usb_key_enq(scan_code) \
+ (bx_devices.pluginPciUSBAdapter->usb_key_enq(scan_code))
+#define DEV_usb_keyboard_connected() \
+ (bx_devices.pluginPciUSBAdapter->usb_keyboard_connected())
+#define DEV_usb_mouse_connected() \
+ (bx_devices.pluginPciUSBAdapter->usb_mouse_connected())
+#endif
+
+//////// Memory macros
+#define DEV_register_memory_handlers(param,rh,wh,b,e) \
+ bx_devices.mem->registerMemoryHandlers(param,rh,wh,b,e)
+#define DEV_unregister_memory_handlers(rh,wh,b,e) \
+ bx_devices.mem->unregisterMemoryHandlers(rh,wh,b,e)
+
+
+#if BX_HAVE_DLFCN_H
+#include
+#endif
+
+typedef Bit32u (*ioReadHandler_t)(void *, Bit32u, unsigned);
+typedef void (*ioWriteHandler_t)(void *, Bit32u, Bit32u, unsigned);
+
+extern plugin_t *plugins;
+
+typedef struct _device_t
+{
+ const char *name;
+ plugin_t *plugin;
+
+ class bx_devmodel_c *devmodel; // BBD hack
+
+ struct _device_t *next;
+} device_t;
+
+
+extern device_t *devices;
+
+void plugin_startup(void);
+void plugin_load(char *name, char *args, plugintype_t);
+plugin_t *plugin_unload(plugin_t *plugin);
+void plugin_init_all(void);
+void plugin_fini_all(void);
+
+/* === Device Stuff === */
+typedef void (*deviceInitMem_t)(BX_MEM_C *);
+typedef void (*deviceInitDev_t)(void);
+typedef void (*deviceReset_t)(unsigned);
+
+BOCHSAPI void pluginRegisterDeviceDevmodel(plugin_t *plugin, plugintype_t type, bx_devmodel_c *dev, const char *name);
+BOCHSAPI bx_bool pluginDevicePresent(char *name);
+
+/* === IO port stuff === */
+BOCHSAPI extern int (*pluginRegisterIOReadHandler)(void *thisPtr, ioReadHandler_t callback,
+ unsigned base, const char *name, Bit8u mask);
+BOCHSAPI extern int (*pluginRegisterIOWriteHandler)(void *thisPtr, ioWriteHandler_t callback,
+ unsigned base, const char *name, Bit8u mask);
+BOCHSAPI extern int (*pluginUnregisterIOReadHandler)(void *thisPtr, ioReadHandler_t callback,
+ unsigned base, Bit8u mask);
+BOCHSAPI extern int (*pluginUnregisterIOWriteHandler)(void *thisPtr, ioWriteHandler_t callback,
+ unsigned base, Bit8u mask);
+BOCHSAPI extern int (*pluginRegisterIOReadHandlerRange)(void *thisPtr, ioReadHandler_t callback,
+ unsigned base, unsigned end, const char *name, Bit8u mask);
+BOCHSAPI extern int (*pluginRegisterIOWriteHandlerRange)(void *thisPtr, ioWriteHandler_t callback,
+ unsigned base, unsigned end, const char *name, Bit8u mask);
+BOCHSAPI extern int (*pluginUnregisterIOReadHandlerRange)(void *thisPtr, ioReadHandler_t callback,
+ unsigned begin, unsigned end, Bit8u mask);
+BOCHSAPI extern int (*pluginUnregisterIOWriteHandlerRange)(void *thisPtr, ioWriteHandler_t callback,
+ unsigned begin, unsigned end, Bit8u mask);
+BOCHSAPI extern int (*pluginRegisterDefaultIOReadHandler)(void *thisPtr, ioReadHandler_t callback,
+ const char *name, Bit8u mask);
+BOCHSAPI extern int (*pluginRegisterDefaultIOWriteHandler)(void *thisPtr, ioWriteHandler_t callback,
+ const char *name, Bit8u mask);
+
+/* === A20 enable line stuff === */
+BOCHSAPI extern unsigned (*pluginGetA20E)(void);
+BOCHSAPI extern void (*pluginSetA20E)(unsigned val);
+
+/* === IRQ stuff === */
+BOCHSAPI extern void (*pluginRegisterIRQ)(unsigned irq, const char *name);
+BOCHSAPI extern void (*pluginUnregisterIRQ)(unsigned irq, const char *name);
+
+/* === Floppy stuff ===*/
+BOCHSAPI extern unsigned (* pluginFloppyGetMediaStatus)(unsigned drive);
+BOCHSAPI extern unsigned (* pluginFloppySetMediaStatus)(unsigned drive, unsigned status);
+
+/* === VGA stuff === */
+BOCHSAPI extern void (* pluginVGARedrawArea)(unsigned x0, unsigned y0,
+ unsigned width, unsigned height);
+BOCHSAPI extern Bit8u (* pluginVGAMemRead)(Bit32u addr);
+BOCHSAPI extern void (* pluginVGAMemWrite)(Bit32u addr, Bit8u value);
+BOCHSAPI extern void (* pluginVGAGetTextSnapshot)(Bit8u **text_snapshot,
+ unsigned *txHeight, unsigned *txWidth);
+BOCHSAPI extern void (* pluginVGARefresh)(void *);
+BOCHSAPI extern void (* pluginVGASetUpdateInterval)(unsigned);
+BOCHSAPI extern Bit8u (* pluginVGAGetActlPaletteIdx)(Bit8u index);
+
+/* === Timer stuff === */
+BOCHSAPI extern int (*pluginRegisterTimer)(void *this_ptr, void (*funct)(void *),
+ Bit32u useconds, bx_bool continuous,
+ bx_bool active, const char *name);
+
+BOCHSAPI extern void (*pluginActivateTimer)(unsigned id, Bit32u usec, bx_bool continuous);
+BOCHSAPI extern void (*pluginDeactivateTimer)(unsigned id);
+
+/* === HRQ stuff === */
+BOCHSAPI extern void (*pluginSetHRQ)(unsigned val);
+BOCHSAPI extern void (*pluginSetHRQHackCallback)(void (*callback)(void));
+
+/* === PCI stuff === */
+BOCHSAPI extern bx_bool (*pluginRegisterPCIDevice)(void *this_ptr,
+ Bit32u (*bx_pci_read_handler)(void *, Bit8u, unsigned),
+ void(*bx_pci_write_handler)(void *, Bit8u, Bit32u, unsigned),
+ Bit8u *devfunc, const char *name, const char *descr);
+BOCHSAPI extern Bit8u (*pluginRd_memType)(Bit32u addr);
+BOCHSAPI extern Bit8u (*pluginWr_memType)(Bit32u addr);
+
+void plugin_abort(void);
+
+int bx_load_plugin(const char *name, plugintype_t type);
+extern void bx_unload_plugin(const char *name);
+extern void bx_init_plugins(void);
+extern void bx_reset_plugins(unsigned);
+extern void bx_unload_plugins(void);
+extern void bx_plugins_register_state(void);
+extern void bx_plugins_after_restore_state(void);
+
+// every plugin must define these, within the extern"C" block, so that
+// a non-mangled function symbol is available in the shared library.
+void plugin_fini(void);
+int plugin_init(plugin_t *plugin, plugintype_t type, int argc, char *argv[]);
+
+// still in extern "C"
+#define DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(mod) \
+ int lib##mod##_LTX_plugin_init(plugin_t *plugin, plugintype_t type, int argc, char *argv[]); \
+ void lib##mod##_LTX_plugin_fini(void);
+
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(harddrv)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(keyboard)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(busmouse)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(serial)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(unmapped)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(biosdev)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(cmos)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(dma)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(pic)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(vga)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(floppy)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(parallel)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(hdemu)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(pci)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(pci2isa)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(pci_ide)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(pcivga)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(pcidev)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(pciusb)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(pcipnic)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(sb16)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(ne2k)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(extfpuirq)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(gameport)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(speaker)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(acpi)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(amigaos)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(beos)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(carbon)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(macintosh)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(nogui)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(rfb)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(sdl)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(svga)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(term)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(win32)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(wx)
+DECLARE_PLUGIN_INIT_FINI_FOR_MODULE(x)
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PLUGIN_H */
Index: trunk/src/bochs-diff-2.3.7/iodev/Makefile.in
===================================================================
--- trunk/src/bochs-diff-2.3.7/iodev/Makefile.in (nonexistent)
+++ trunk/src/bochs-diff-2.3.7/iodev/Makefile.in (revision 39)
@@ -0,0 +1,1226 @@
+# Copyright (C) 2001 MandrakeSoft S.A.
+#
+# MandrakeSoft S.A.
+# 43, rue d'Aboukir
+# 75002 Paris - France
+# http://www.linux-mandrake.com/
+# http://www.mandrakesoft.com/
+#
+# This library is free software; you can redistribute it and/or
+# modify it under the terms of the GNU Lesser General Public
+# License as published by the Free Software Foundation; either
+# version 2 of the License, or (at your option) any later version.
+#
+# This library is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public
+# License along with this library; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+# Makefile for the iodev component of bochs
+
+
+@SUFFIX_LINE@
+
+prefix = @prefix@
+exec_prefix = @exec_prefix@
+srcdir = @srcdir@
+VPATH = @srcdir@
+bindir = @bindir@
+libdir = @libdir@
+datarootdir = @datarootdir@
+mandir = @mandir@
+man1dir = $(mandir)/man1
+man5dir = $(mandir)/man5
+docdir = $(datarootdir)/doc/bochs
+sharedir = $(datarootdir)/bochs
+top_builddir = ..
+top_srcdir = @top_srcdir@
+
+SHELL = /bin/sh
+
+@SET_MAKE@
+
+CXX = @CXX@
+CXXFLAGS = $(BX_INCDIRS) @CXXFLAGS@ @GUI_CXXFLAGS@
+
+LDFLAGS = @LDFLAGS@
+LIBS = @LIBS@
+RANLIB = @RANLIB@
+PLUGIN_PATH=@libdir@
+top_builddir = ..
+LIBTOOL=@LIBTOOL@
+WIN32_DLL_IMPORT_LIBRARY=../dllexports.a
+
+CDROM_OBJS = @CDROM_OBJS@
+IOAPIC_OBJS = @IOAPIC_OBJS@
+SOUNDLOW_OBJS = @SOUNDLOW_OBJS@
+NETLOW_OBJS = @NETLOW_OBJS@
+USBDEV_OBJS = @USBDEV_OBJS@
+SCSI_OBJS = @SCSI_OBJS@
+
+BX_INCDIRS = -I.. -I$(srcdir)/.. -I../@INSTRUMENT_DIR@ -I$(srcdir)/../@INSTRUMENT_DIR@
+LOCAL_CXXFLAGS = $(MCH_CFLAGS)
+
+PCIDEV_CXXFLAGS = -I$(srcdir)/../host/linux/pcidev
+
+OBJS_THAT_CANNOT_BE_PLUGINS = \
+ devices.o \
+ pit82c54.o pit_wrap.o \
+ virt_timer.o \
+ slowdown_timer.o \
+ @IODEBUG_OBJS@ \
+ $(MCH_OBJS) \
+ $(IOAPIC_OBJS)
+
+OBJS_THAT_CAN_BE_PLUGINS = \
+ pic.o \
+ serial.o \
+ parallel.o \
+ hdemu.o \
+ floppy.o \
+ keyboard.o \
+ vga.o \
+ biosdev.o \
+ cmos.o \
+ harddrv.o \
+ dma.o \
+ unmapped.o \
+ extfpuirq.o \
+ speaker.o \
+ busmouse.o \
+ @GAME_OBJS@ \
+ @PCI_OBJ@ \
+ @SB16_OBJS@ \
+ @NE2K_OBJS@
+
+OBJS_THAT_SUPPORT_OTHER_PLUGINS = \
+ scancodes.o \
+ serial_raw.o \
+ svga_cirrus.o \
+ hdimage.o \
+ vmware3.o \
+ vmware4.o \
+ $(CDROM_OBJS) \
+ $(SOUNDLOW_OBJS) \
+ $(NETLOW_OBJS) \
+ $(USBDEV_OBJS) \
+ $(SCSI_OBJS)
+
+NONPLUGIN_OBJS = @IODEV_NON_PLUGIN_OBJS@
+PLUGIN_OBJS = @IODEV_PLUGIN_OBJS@
+
+all: libiodev.a
+
+plugins: $(PLUGIN_OBJS:@PLUGIN_LIBNAME_TRANSFORMATION@)
+
+libiodev.a: $(NONPLUGIN_OBJS)
+ @RMCOMMAND@ libiodev.a
+ @MAKELIB@ $(NONPLUGIN_OBJS)
+ @RANLIB@ libiodev.a
+
+# standard compile rule for C++ files
+.@CPP_SUFFIX@.o:
+ $(CXX) @DASH@c $(CXXFLAGS) $(LOCAL_CXXFLAGS) @CXXFP@$< @OFP@$@
+
+pcidev.o : pcidev.@CPP_SUFFIX@
+ $(CXX) @DASH@c $(CXXFLAGS) $(LOCAL_CXXFLAGS) $(PCIDEV_CXXFLAGS) @CXXFP@$< @OFP@$@
+
+##### building plugins with libtool
+%.lo: %.@CPP_SUFFIX@
+ $(LIBTOOL) --mode=compile $(CXX) -c $(CXXFLAGS) $(LOCAL_CXXFLAGS) $< -o $@
+
+pcidev.lo : pcidev.@CPP_SUFFIX@
+ $(LIBTOOL) --mode=compile $(CXX) -c $(CXXFLAGS) $(LOCAL_CXXFLAGS) $(PCIDEV_CXXFLAGS) $< -o $@
+
+libbx_%.la: %.lo
+ $(LIBTOOL) --mode=link $(CXX) -module $< -o $@ -rpath $(PLUGIN_PATH)
+
+# special link rules for plugins that require more than one object file
+libbx_harddrv.la: harddrv.lo hdimage.lo vmware3.lo vmware4.lo $(CDROM_OBJS:.o=.lo)
+ $(LIBTOOL) --mode=link $(CXX) -module harddrv.lo hdimage.lo vmware3.lo vmware4.lo $(CDROM_OBJS:.o=.lo) -o libbx_harddrv.la -rpath $(PLUGIN_PATH)
+
+libbx_keyboard.la: keyboard.lo scancodes.lo
+ $(LIBTOOL) --mode=link $(CXX) -module keyboard.lo scancodes.lo -o libbx_keyboard.la -rpath $(PLUGIN_PATH)
+
+libbx_pit.la: pit82c54.lo pit_wrap.lo
+ $(LIBTOOL) --mode=link $(CXX) -module pit82c54.lo pit_wrap.lo -o libbx_pit.la -rpath $(PLUGIN_PATH)
+
+libbx_sb16.la: sb16.lo $(SOUNDLOW_OBJS:.o=.lo)
+ $(LIBTOOL) --mode=link $(CXX) -module sb16.lo $(SOUNDLOW_OBJS:.o=.lo) -o libbx_sb16.la -rpath $(PLUGIN_PATH)
+
+libbx_ne2k.la: ne2k.lo $(NETLOW_OBJS:.o=.lo)
+ $(LIBTOOL) --mode=link $(CXX) -module ne2k.lo $(NETLOW_OBJS:.o=.lo) -o libbx_ne2k.la -rpath $(PLUGIN_PATH)
+
+libbx_pcipnic.la: pcipnic.lo $(NETLOW_OBJS:.o=.lo)
+ $(LIBTOOL) --mode=link $(CXX) -module pcipnic.lo $(NETLOW_OBJS:.o=.lo) -o libbx_pcipnic.la -rpath $(PLUGIN_PATH)
+
+libbx_serial.la: serial.lo serial_raw.lo
+ $(LIBTOOL) --mode=link $(CXX) -module serial.lo serial_raw.lo -o libbx_serial.la -rpath $(PLUGIN_PATH)
+
+libbx_vga.la: vga.lo svga_cirrus.lo
+ $(LIBTOOL) --mode=link $(CXX) -module vga.lo svga_cirrus.lo -o libbx_vga.la -rpath $(PLUGIN_PATH)
+
+libbx_pciusb.la: pciusb.lo usb_hid.lo usb_msd.lo scsi_device.lo hdimage.lo cdrom.lo
+ $(LIBTOOL) --mode=link $(CXX) -module pciusb.lo usb_hid.lo usb_msd.lo scsi_device.lo hdimage.lo cdrom.lo -o libbx_pciusb.la -rpath $(PLUGIN_PATH)
+
+#### building DLLs for win32 (tested on cygwin only)
+bx_%.dll: %.o
+ $(CXX) $(CXXFLAGS) -shared -o $@ $< $(WIN32_DLL_IMPORT_LIBRARY)
+
+# special link rules for plugins that require more than one object file
+bx_harddrv.dll: harddrv.o hdimage.o vmware3.o vmware4.o $(CDROM_OBJS)
+ $(CXX) $(CXXFLAGS) -shared -o bx_harddrv.dll harddrv.o hdimage.o vmware3.o vmware4.o $(CDROM_OBJS) $(WIN32_DLL_IMPORT_LIBRARY)
+
+bx_keyboard.dll: keyboard.o scancodes.o
+ $(CXX) $(CXXFLAGS) -shared -o bx_keyboard.dll keyboard.o scancodes.o $(WIN32_DLL_IMPORT_LIBRARY)
+
+bx_pit.dll: pit82c54.o pit_wrap.o
+ $(CXX) $(CXXFLAGS) -shared -o bx_pit.dll pit82c54.o pit_wrap.o $(WIN32_DLL_IMPORT_LIBRARY)
+
+bx_sb16.dll: sb16.o $(SOUNDLOW_OBJS)
+ $(CXX) $(CXXFLAGS) -shared -o bx_sb16.dll sb16.o $(SOUNDLOW_OBJS) $(WIN32_DLL_IMPORT_LIBRARY) -lwinmm
+
+bx_ne2k.dll: ne2k.o $(NETLOW_OBJS)
+ $(CXX) $(CXXFLAGS) -shared -o bx_ne2k.dll ne2k.o $(NETLOW_OBJS) $(WIN32_DLL_IMPORT_LIBRARY)
+
+bx_pcipnic.dll: pcipnic.o $(NETLOW_OBJS)
+ $(CXX) $(CXXFLAGS) -shared -o bx_pcipnic.dll pcipnic.o $(NETLOW_OBJS) $(WIN32_DLL_IMPORT_LIBRARY)
+
+bx_gameport.dll: gameport.o
+ $(CXX) $(CXXFLAGS) -shared -o bx_gameport.dll gameport.o $(WIN32_DLL_IMPORT_LIBRARY) -lwinmm
+
+bx_serial.dll: serial.o serial_raw.o
+ $(CXX) $(CXXFLAGS) -shared -o bx_serial.dll serial.o serial_raw.o $(WIN32_DLL_IMPORT_LIBRARY) -lwsock32
+
+bx_vga.dll: vga.o svga_cirrus.o
+ $(CXX) $(CXXFLAGS) -shared -o bx_vga.dll vga.o svga_cirrus.o $(WIN32_DLL_IMPORT_LIBRARY)
+
+bx_pciusb.dll: pciusb.o usb_hid.o usb_msd.o scsi_device.o hdimage.o cdrom.o
+ $(CXX) $(CXXFLAGS) -shared -o bx_pciusb.dll pciusb.o usb_hid.o usb_msd.o scsi_device.o hdimage.o cdrom.o $(WIN32_DLL_IMPORT_LIBRARY)
+
+##### end DLL section
+
+clean:
+ @RMCOMMAND@ -rf .libs *.lo *.o *.la *.a *.dll
+
+dist-clean: clean
+ @RMCOMMAND@ Makefile
+
+###########################################
+# dependencies generated by
+# gcc -MM -I.. -I../instrument/stubs *.cc | sed -e 's/\.cc/.@CPP_SUFFIX@/g'
+# gcc -MM -I.. -I../instrument/stubs *.cc | \
+# sed -e 's/\.cc/.@CPP_SUFFIX@/g' -e 's/\.o:/.lo:/g'
+#
+# This means that every source file is listed twice, once with a .o rule
+# and then again with an identical .lo rule. The .lo rules are used when
+# building plugins.
+###########################################
+acpi.o: acpi.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h ../bx_debug/debug.h \
+ ../config.h ../osdep.h ../bxversion.h ../gui/siminterface.h \
+ ../memory/memory.h ../pc_system.h ../plugin.h ../extplugin.h \
+ ../gui/gui.h ../gui/textconfig.h ../config.h ../gui/keymap.h \
+ ../instrument/stubs/instrument.h iodev.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+biosdev.o: biosdev.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+busmouse.o: busmouse.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+cdrom_amigaos.o: cdrom_amigaos.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h scsi_commands.h \
+ cdrom.h
+cdrom_beos.o: cdrom_beos.@CPP_SUFFIX@ cdrom_beos.h
+cdrom.o: cdrom.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h ../bx_debug/debug.h \
+ ../config.h ../osdep.h ../bxversion.h ../gui/siminterface.h \
+ ../memory/memory.h ../pc_system.h ../plugin.h ../extplugin.h \
+ ../gui/gui.h ../gui/textconfig.h ../config.h ../gui/keymap.h \
+ ../instrument/stubs/instrument.h
+cmos.o: cmos.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+crc32.o: crc32.@CPP_SUFFIX@ crc32.h ../config.h
+devices.o: devices.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h iodev.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+dma.o: dma.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+eth_arpback.o: eth_arpback.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+eth.o: eth.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+eth_fbsd.o: eth_fbsd.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+eth_linux.o: eth_linux.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+eth_null.o: eth_null.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+eth_packetmaker.o: eth_packetmaker.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h \
+ ../osdep.h ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+eth_tap.o: eth_tap.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+eth_tuntap.o: eth_tuntap.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+eth_vde.o: eth_vde.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+eth_vnet.o: eth_vnet.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+eth_win32.o: eth_win32.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+extfpuirq.o: extfpuirq.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+floppy.o: floppy.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+gameport.o: gameport.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+guest2host.o: guest2host.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+harddrv.o: harddrv.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h \
+ hdimage.h vmware3.h vmware4.h cdrom.h
+hdemu.o: hdemu.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+hdimage.o: hdimage.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h hdimage.h
+ioapic.o: ioapic.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h ../bx_debug/debug.h \
+ ../config.h ../osdep.h ../bxversion.h ../gui/siminterface.h \
+ ../memory/memory.h ../pc_system.h ../plugin.h ../extplugin.h \
+ ../gui/gui.h ../gui/textconfig.h ../config.h ../gui/keymap.h \
+ ../instrument/stubs/instrument.h ../cpu/apic.h iodev.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+iodebug.o: iodebug.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../cpu/cpu.h \
+ ../disasm/disasm.h ../config.h ../cpu/crregs.h ../cpu/descriptor.h \
+ ../cpu/instr.h ../cpu/lazy_flags.h iodev.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+keyboard.o: keyboard.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h \
+ scancodes.h
+ne2k.o: ne2k.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+parallel.o: parallel.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+pci2isa.o: pci2isa.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+pci.o: pci.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+pcidev.o: pcidev.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+pci_ide.o: pci_ide.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+pcipnic.o: pcipnic.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+pciusb.o: pciusb.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+pcivga.o: pcivga.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+pic.o: pic.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+pit82c54.o: pit82c54.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h \
+ pit82c54.h
+pit_wrap.o: pit_wrap.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h \
+ speaker.h
+sb16.o: sb16.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+scancodes.o: scancodes.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h scancodes.h
+scsi_device.o: scsi_device.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+serial.o: serial.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+serial_raw.o: serial_raw.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+slowdown_timer.o: slowdown_timer.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h slowdown_timer.h
+soundlnx.o: soundlnx.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h sb16.h
+soundosx.o: soundosx.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h sb16.h
+soundwin.o: soundwin.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h sb16.h
+speaker.o: speaker.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h speaker.h
+svga_cirrus.o: svga_cirrus.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+unmapped.o: unmapped.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+usb_hid.o: usb_hid.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+usb_msd.o: usb_msd.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+vga.o: vga.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+virt_timer.o: virt_timer.@CPP_SUFFIX@ ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h virt_timer.h
+vmware3.o: vmware3.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h hdimage.h vmware3.h
+vmware4.o: vmware4.@CPP_SUFFIX@ iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h hdimage.h vmware4.h
+acpi.lo: acpi.cc ../bochs.h ../config.h ../osdep.h ../bx_debug/debug.h \
+ ../config.h ../osdep.h ../bxversion.h ../gui/siminterface.h \
+ ../memory/memory.h ../pc_system.h ../plugin.h ../extplugin.h \
+ ../gui/gui.h ../gui/textconfig.h ../config.h ../gui/keymap.h \
+ ../instrument/stubs/instrument.h iodev.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+biosdev.lo: biosdev.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+busmouse.lo: busmouse.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+cdrom_amigaos.lo: cdrom_amigaos.cc ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h scsi_commands.h \
+ cdrom.h
+cdrom_beos.lo: cdrom_beos.cc cdrom_beos.h
+cdrom.lo: cdrom.cc ../bochs.h ../config.h ../osdep.h ../bx_debug/debug.h \
+ ../config.h ../osdep.h ../bxversion.h ../gui/siminterface.h \
+ ../memory/memory.h ../pc_system.h ../plugin.h ../extplugin.h \
+ ../gui/gui.h ../gui/textconfig.h ../config.h ../gui/keymap.h \
+ ../instrument/stubs/instrument.h
+cmos.lo: cmos.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+crc32.lo: crc32.cc crc32.h ../config.h
+devices.lo: devices.cc ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h iodev.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+dma.lo: dma.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+eth_arpback.lo: eth_arpback.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+eth.lo: eth.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+eth_fbsd.lo: eth_fbsd.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+eth_linux.lo: eth_linux.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+eth_null.lo: eth_null.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+eth_packetmaker.lo: eth_packetmaker.cc iodev.h ../bochs.h ../config.h \
+ ../osdep.h ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+eth_tap.lo: eth_tap.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+eth_tuntap.lo: eth_tuntap.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+eth_vde.lo: eth_vde.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+eth_vnet.lo: eth_vnet.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+eth_win32.lo: eth_win32.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+extfpuirq.lo: extfpuirq.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+floppy.lo: floppy.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+gameport.lo: gameport.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+guest2host.lo: guest2host.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+harddrv.lo: harddrv.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h \
+ hdimage.h vmware3.h vmware4.h cdrom.h
+hdemu.lo: hdemu.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+hdimage.lo: hdimage.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h hdimage.h
+ioapic.lo: ioapic.cc ../bochs.h ../config.h ../osdep.h ../bx_debug/debug.h \
+ ../config.h ../osdep.h ../bxversion.h ../gui/siminterface.h \
+ ../memory/memory.h ../pc_system.h ../plugin.h ../extplugin.h \
+ ../gui/gui.h ../gui/textconfig.h ../config.h ../gui/keymap.h \
+ ../instrument/stubs/instrument.h ../cpu/apic.h iodev.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+iodebug.lo: iodebug.cc ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../cpu/cpu.h \
+ ../disasm/disasm.h ../config.h ../cpu/crregs.h ../cpu/descriptor.h \
+ ../cpu/instr.h ../cpu/lazy_flags.h iodev.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+keyboard.lo: keyboard.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h \
+ scancodes.h
+ne2k.lo: ne2k.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+parallel.lo: parallel.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+pci2isa.lo: pci2isa.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+pci.lo: pci.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+pcidev.lo: pcidev.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+pci_ide.lo: pci_ide.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+pcipnic.lo: pcipnic.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+pciusb.lo: pciusb.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+pcivga.lo: pcivga.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+pic.lo: pic.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+pit82c54.lo: pit82c54.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h \
+ pit82c54.h
+pit_wrap.lo: pit_wrap.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h \
+ speaker.h
+sb16.lo: sb16.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+scancodes.lo: scancodes.cc ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h scancodes.h
+scsi_device.lo: scsi_device.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+serial.lo: serial.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+serial_raw.lo: serial_raw.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+slowdown_timer.lo: slowdown_timer.cc ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h slowdown_timer.h
+soundlnx.lo: soundlnx.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h sb16.h
+soundosx.lo: soundosx.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h sb16.h
+soundwin.lo: soundwin.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h sb16.h
+speaker.lo: speaker.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h speaker.h
+svga_cirrus.lo: svga_cirrus.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+unmapped.lo: unmapped.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+usb_hid.lo: usb_hid.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+usb_msd.lo: usb_msd.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h
+vga.lo: vga.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h ../iodev/vga.h \
+ ../iodev/biosdev.h ../iodev/cmos.h ../iodev/dma.h ../iodev/floppy.h \
+ ../iodev/harddrv.h ../iodev/keyboard.h ../iodev/parallel.h \
+ ../iodev/hdemu.h ../iodev/pic.h ../iodev/pit_wrap.h ../bochs.h \
+ ../iodev/pit82c54.h ../iodev/virt_timer.h ../iodev/serial.h \
+ ../iodev/unmapped.h ../iodev/ne2k.h ../iodev/guest2host.h \
+ ../iodev/slowdown_timer.h ../iodev/extfpuirq.h ../iodev/gameport.h
+virt_timer.lo: virt_timer.cc ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h virt_timer.h
+vmware3.lo: vmware3.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h hdimage.h vmware3.h
+vmware4.lo: vmware4.cc iodev.h ../bochs.h ../config.h ../osdep.h \
+ ../bx_debug/debug.h ../config.h ../osdep.h ../bxversion.h \
+ ../gui/siminterface.h ../memory/memory.h ../pc_system.h ../plugin.h \
+ ../extplugin.h ../gui/gui.h ../gui/textconfig.h ../config.h \
+ ../gui/keymap.h ../instrument/stubs/instrument.h hdimage.h vmware4.h
Index: trunk/src/bochs-diff-2.3.7/iodev/devices.cc
===================================================================
--- trunk/src/bochs-diff-2.3.7/iodev/devices.cc (nonexistent)
+++ trunk/src/bochs-diff-2.3.7/iodev/devices.cc (revision 39)
@@ -0,0 +1,1041 @@
+/////////////////////////////////////////////////////////////////////////
+// $Id: devices.cc,v 1.1 2008-11-14 03:31:25 zeus Exp $
+/////////////////////////////////////////////////////////////////////////
+//
+// Copyright (C) 2002 MandrakeSoft S.A.
+//
+// MandrakeSoft S.A.
+// 43, rue d'Aboukir
+// 75002 Paris - France
+// http://www.linux-mandrake.com/
+// http://www.mandrakesoft.com/
+//
+// I/O port handlers API Copyright (C) 2003 by Frank Cornelis
+//
+// This library is free software; you can redistribute it and/or
+// modify it under the terms of the GNU Lesser General Public
+// License as published by the Free Software Foundation; either
+// version 2 of the License, or (at your option) any later version.
+//
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+// Lesser General Public License for more details.
+//
+// You should have received a copy of the GNU Lesser General Public
+// License along with this library; if not, write to the Free Software
+// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+//
+/////////////////////////////////////////////////////////////////////////
+
+
+#include "bochs.h"
+#include "iodev.h"
+#define LOG_THIS bx_devices.
+
+
+/* main memory size (in Kbytes)
+ * subtract 1k for extended BIOS area
+ * report only base memory, not extended mem
+ */
+#define BASE_MEMORY_IN_K 640
+
+
+bx_devices_c bx_devices;
+
+
+// constructor for bx_devices_c
+bx_devices_c::bx_devices_c()
+{
+ put("DEV");
+ settype(DEVLOG);
+
+ read_port_to_handler = NULL;
+ write_port_to_handler = NULL;
+ io_read_handlers.next = NULL;
+ io_read_handlers.handler_name = NULL;
+ io_write_handlers.next = NULL;
+ io_write_handlers.handler_name = NULL;
+ init_stubs();
+
+ for (unsigned i=0; i < BX_MAX_IRQS; i++) {
+ irq_handler_name[i] = NULL;
+ }
+}
+
+bx_devices_c::~bx_devices_c()
+{
+ // nothing needed for now
+ timer_handle = BX_NULL_TIMER_HANDLE;
+}
+
+void bx_devices_c::init_stubs()
+{
+#if BX_SUPPORT_PCI
+ pluginPciBridge = &stubPci;
+ pluginPci2IsaBridge = &stubPci2Isa;
+ pluginPciIdeController = &stubPciIde;
+#if BX_SUPPORT_ACPI
+ pluginACPIController = &stubACPIController;
+#endif
+#if BX_SUPPORT_PCIVGA
+ pluginPciVgaAdapter = NULL;
+#endif
+#if BX_SUPPORT_PCIDEV
+ pluginPciDevAdapter = NULL;
+#endif
+#if BX_SUPPORT_PCIUSB
+ pluginPciUSBAdapter = &stubUsbAdapter;
+#endif
+#if BX_SUPPORT_PCIPNIC
+ pluginPciPNicAdapter = NULL;
+#endif
+#endif
+ pit = NULL;
+ pluginKeyboard = &stubKeyboard;
+ pluginDmaDevice = &stubDma;
+ pluginFloppyDevice = &stubFloppy;
+ pluginBiosDevice = NULL;
+ pluginCmosDevice = &stubCmos;
+ pluginSerialDevice = &stubSerial;
+ pluginParallelDevice = NULL;
+ pluginUnmapped = NULL;
+ pluginVgaDevice = &stubVga;
+ pluginPicDevice = &stubPic;
+ pluginHardDrive = &stubHardDrive;
+ pluginSB16Device = NULL;
+ pluginNE2kDevice =&stubNE2k;
+ pluginExtFpuIrq = NULL;
+ pluginGameport = NULL;
+ pluginSpeaker = &stubSpeaker;
+#if BX_SUPPORT_BUSMOUSE
+ pluginBusMouse = &stubBusMouse;
+#endif
+#if BX_SUPPORT_IODEBUG
+ iodebug = NULL;
+#endif
+#if 0
+ g2h = NULL;
+#endif
+}
+
+void bx_devices_c::init(BX_MEM_C *newmem)
+{
+ unsigned i;
+ const char def_name[] = "Default";
+
+ BX_DEBUG(("Init $Id: devices.cc,v 1.1 2008-11-14 03:31:25 zeus Exp $"));
+ mem = newmem;
+
+ /* set no-default handlers, will be overwritten by the real default handler */
+ register_default_io_read_handler(NULL, &default_read_handler, def_name, 7);
+ io_read_handlers.next = &io_read_handlers;
+ io_read_handlers.prev = &io_read_handlers;
+ io_read_handlers.usage_count = 0; // not used with the default handler
+
+ register_default_io_write_handler(NULL, &default_write_handler, def_name, 7);
+ io_write_handlers.next = &io_write_handlers;
+ io_write_handlers.prev = &io_write_handlers;
+ io_write_handlers.usage_count = 0; // not used with the default handler
+
+ if (read_port_to_handler)
+ delete [] read_port_to_handler;
+ if (write_port_to_handler)
+ delete [] write_port_to_handler;
+ read_port_to_handler = new struct io_handler_struct *[PORTS];
+ write_port_to_handler = new struct io_handler_struct *[PORTS];
+
+ /* set handlers to the default one */
+ for (i=0; i < PORTS; i++) {
+ read_port_to_handler[i] = &io_read_handlers;
+ write_port_to_handler[i] = &io_write_handlers;
+ }
+
+ for (i=0; i < BX_MAX_IRQS; i++) {
+ delete [] irq_handler_name[i];
+ irq_handler_name[i] = NULL;
+ }
+
+ // register as soon as possible - the devices want to have their timers !
+ bx_virt_timer.init();
+ bx_slowdown_timer.init();
+
+ // BBD: At present, the only difference between "core" and "optional"
+ // plugins is that initialization and reset of optional plugins is handled
+ // by the plugin device list (). Init and reset of core plugins is done
+ // "by hand" in this file. Basically, we're using core plugins when we
+ // want to control the init order.
+ //
+ // CB: UNMAPPED and BIOSDEV should maybe be optional
+ PLUG_load_plugin(unmapped, PLUGTYPE_CORE);
+ PLUG_load_plugin(biosdev, PLUGTYPE_CORE);
+ PLUG_load_plugin(cmos, PLUGTYPE_CORE);
+/*
+ PLUG_load_plugin(dma, PLUGTYPE_CORE);
+ PLUG_load_plugin(pic, PLUGTYPE_CORE);
+*/
+ PLUG_load_plugin(vga, PLUGTYPE_CORE);
+/*
+ PLUG_load_plugin(floppy, PLUGTYPE_CORE);
+ PLUG_load_plugin(harddrv, PLUGTYPE_OPTIONAL);
+ PLUG_load_plugin(keyboard, PLUGTYPE_OPTIONAL);
+#if BX_SUPPORT_BUSMOUSE
+ if (SIM->get_param_enum(BXPN_MOUSE_TYPE)->get() == BX_MOUSE_TYPE_BUS) {
+ PLUG_load_plugin(busmouse, PLUGTYPE_OPTIONAL);
+ }
+#endif
+ if (is_serial_enabled())
+ PLUG_load_plugin(serial, PLUGTYPE_OPTIONAL);
+ if (is_parallel_enabled())
+ PLUG_load_plugin(parallel, PLUGTYPE_OPTIONAL);
+*/
+ PLUG_load_plugin(hdemu, PLUGTYPE_OPTIONAL);
+/*
+ PLUG_load_plugin(extfpuirq, PLUGTYPE_OPTIONAL);
+#if BX_SUPPORT_GAMEPORT
+ PLUG_load_plugin(gameport, PLUGTYPE_OPTIONAL);
+#endif
+ PLUG_load_plugin(speaker, PLUGTYPE_OPTIONAL);
+*/
+ // Start with registering the default (unmapped) handler
+ pluginUnmapped->init ();
+/*
+ // PCI logic (i440FX)
+ if (SIM->get_param_bool(BXPN_I440FX_SUPPORT)->get()) {
+#if BX_SUPPORT_PCI
+ PLUG_load_plugin(pci, PLUGTYPE_CORE);
+ PLUG_load_plugin(pci2isa, PLUGTYPE_CORE);
+ PLUG_load_plugin(pci_ide, PLUGTYPE_OPTIONAL);
+#if BX_SUPPORT_ACPI
+ PLUG_load_plugin(acpi, PLUGTYPE_OPTIONAL);
+#endif
+#if BX_SUPPORT_PCIVGA
+ if ((DEV_is_pci_device("pcivga")) &&
+ (!strcmp(SIM->get_param_string(BXPN_VGA_EXTENSION)->getptr(), "vbe"))) {
+ PLUG_load_plugin(pcivga, PLUGTYPE_OPTIONAL);
+ }
+#endif
+#if BX_SUPPORT_PCIUSB
+ if (is_usb_enabled()) {
+ PLUG_load_plugin(pciusb, PLUGTYPE_OPTIONAL);
+ }
+#endif
+#if BX_SUPPORT_PCIDEV
+ if (SIM->get_param_num(BXPN_PCIDEV_VENDOR)->get() != 0xffff) {
+ PLUG_load_plugin(pcidev, PLUGTYPE_OPTIONAL);
+ }
+#endif
+#if BX_SUPPORT_PCIPNIC
+ if (SIM->get_param_bool(BXPN_PNIC_ENABLED)->get()) {
+ PLUG_load_plugin(pcipnic, PLUGTYPE_OPTIONAL);
+ }
+#endif
+#else
+ BX_ERROR(("Bochs is not compiled with PCI support"));
+#endif
+ }
+
+ // NE2000 NIC
+ if (SIM->get_param_bool(BXPN_NE2K_ENABLED)->get()) {
+#if BX_SUPPORT_NE2K
+ PLUG_load_plugin(ne2k, PLUGTYPE_OPTIONAL);
+#else
+ BX_ERROR(("Bochs is not compiled with NE2K support"));
+#endif
+ }
+
+#if BX_SUPPORT_APIC
+ // I/O APIC 82093AA
+ ioapic = & bx_ioapic;
+ ioapic->init ();
+#endif
+*/
+ // BIOS log
+ pluginBiosDevice->init ();
+
+ // CMOS RAM & RTC
+ pluginCmosDevice->init ();
+/*
+ //--- 8237 DMA ---
+ pluginDmaDevice->init();
+
+ //--- FLOPPY ---
+ pluginFloppyDevice->init();
+
+ //--- SOUND ---
+ if (SIM->get_param_bool(BXPN_SB16_ENABLED)->get()) {
+#if BX_SUPPORT_SB16
+ PLUG_load_plugin(sb16, PLUGTYPE_OPTIONAL);
+#else
+ BX_ERROR(("Bochs is not compiled with SB16 support"));
+#endif
+ }
+
+#if BX_SUPPORT_PCI
+ pluginPciBridge->init ();
+ pluginPci2IsaBridge->init ();
+#endif
+*/
+ //--- VGA adapter ---
+ pluginVgaDevice->init ();
+/*
+ //--- 8259A PIC ---
+ pluginPicDevice->init();
+
+ //--- 8254 PIT ---
+ pit = & bx_pit;
+ pit->init();
+
+#if BX_SUPPORT_IODEBUG
+ iodebug = &bx_iodebug;
+ iodebug->init();
+#endif
+
+#if 0
+ // Guest to Host interface. Used with special guest drivers
+ // which move data to/from the host environment.
+ g2h = &bx_g2h;
+ g2h->init();
+#endif
+*/
+ // system hardware
+ register_io_read_handler(this, &read_handler, 0x0092,
+ "Port 92h System Control", 1);
+ register_io_write_handler(this, &write_handler, 0x0092,
+ "Port 92h System Control", 1);
+
+ // misc. CMOS
+ Bit32u extended_memory_in_k = mem->get_memory_in_k() > 1024 ? (mem->get_memory_in_k() - 1024) : 0;
+ if (extended_memory_in_k > 0xfc00) extended_memory_in_k = 0xfc00;
+
+ DEV_cmos_set_reg(0x15, (Bit8u) BASE_MEMORY_IN_K);
+ DEV_cmos_set_reg(0x16, (Bit8u) (BASE_MEMORY_IN_K >> 8));
+ DEV_cmos_set_reg(0x17, (Bit8u) (extended_memory_in_k & 0xff));
+ DEV_cmos_set_reg(0x18, (Bit8u) ((extended_memory_in_k >> 8) & 0xff));
+ DEV_cmos_set_reg(0x30, (Bit8u) (extended_memory_in_k & 0xff));
+ DEV_cmos_set_reg(0x31, (Bit8u) ((extended_memory_in_k >> 8) & 0xff));
+
+ Bit32u extended_memory_in_64k = mem->get_memory_in_k() > 16384 ? (mem->get_memory_in_k() - 16384) / 64 : 0;
+ if (extended_memory_in_64k > 0xffff) extended_memory_in_64k = 0xffff;
+
+ DEV_cmos_set_reg(0x34, (Bit8u) (extended_memory_in_64k & 0xff));
+ DEV_cmos_set_reg(0x35, (Bit8u) ((extended_memory_in_64k >> 8) & 0xff));
+/*
+ if (timer_handle != BX_NULL_TIMER_HANDLE) {
+ timer_handle = bx_pc_system.register_timer(this, timer_handler,
+ (unsigned) BX_IODEV_HANDLER_PERIOD, 1, 1, "devices.cc");
+ }
+*/
+ // Clear fields for bulk IO acceleration transfers.
+ bulkIOHostAddr = 0;
+ bulkIOQuantumsRequested = 0;
+ bulkIOQuantumsTransferred = 0;
+
+ bx_init_plugins();
+
+ /* now perform checksum of CMOS memory */
+ DEV_cmos_checksum();
+}
+
+void bx_devices_c::reset(unsigned type)
+{
+ mem->disable_smram();
+ pluginUnmapped->reset(type);
+#if BX_SUPPORT_PCI
+ if (SIM->get_param_bool(BXPN_I440FX_SUPPORT)->get()) {
+ pluginPciBridge->reset(type);
+ pluginPci2IsaBridge->reset(type);
+ }
+#endif
+#if BX_SUPPORT_APIC
+ ioapic->reset(type);
+#endif
+ pluginBiosDevice->reset(type);
+ pluginCmosDevice->reset(type);
+ pluginDmaDevice->reset(type);
+ pluginFloppyDevice->reset(type);
+ pluginVgaDevice->reset(type);
+ pluginPicDevice->reset(type);
+ pit->reset(type);
+#if BX_SUPPORT_IODEBUG
+ iodebug->reset(type);
+#endif
+ // now reset optional plugins
+ bx_reset_plugins(type);
+}
+
+void bx_devices_c::register_state()
+{
+ bx_virt_timer.register_state();
+#if BX_SUPPORT_PCI
+ if (SIM->get_param_bool(BXPN_I440FX_SUPPORT)->get()) {
+ pluginPciBridge->register_state();
+ pluginPci2IsaBridge->register_state();
+ }
+#endif
+#if BX_SUPPORT_APIC
+ ioapic->register_state();
+#endif
+ pluginCmosDevice->register_state();
+ pluginDmaDevice->register_state();
+ pluginFloppyDevice->register_state();
+ pluginVgaDevice->register_state();
+ pluginPicDevice->register_state();
+ pit->register_state();
+ // now register state of optional plugins
+ bx_plugins_register_state();
+}
+
+void bx_devices_c::after_restore_state()
+{
+ bx_slowdown_timer.after_restore_state();
+#if BX_SUPPORT_PCI
+ if (SIM->get_param_bool(BXPN_I440FX_SUPPORT)->get()) {
+ pluginPciBridge->after_restore_state();
+ pluginPci2IsaBridge->after_restore_state();
+ }
+#endif
+ pluginCmosDevice->after_restore_state();
+ pluginVgaDevice->after_restore_state();
+ bx_plugins_after_restore_state();
+}
+
+void bx_devices_c::exit()
+{
+ // delete i/o handlers before unloading plugins
+ struct io_handler_struct *io_read_handler = io_read_handlers.next;
+ struct io_handler_struct *curr = NULL;
+ while (io_read_handler != &io_read_handlers) {
+ io_read_handler->prev->next = io_read_handler->next;
+ io_read_handler->next->prev = io_read_handler->prev;
+ curr = io_read_handler;
+ io_read_handler = io_read_handler->next;
+ delete [] curr->handler_name;
+ delete curr;
+ }
+ struct io_handler_struct *io_write_handler = io_write_handlers.next;
+ while (io_write_handler != &io_write_handlers) {
+ io_write_handler->prev->next = io_write_handler->next;
+ io_write_handler->next->prev = io_write_handler->prev;
+ curr = io_write_handler;
+ io_write_handler = io_write_handler->next;
+ delete [] curr->handler_name;
+ delete curr;
+ }
+
+ pit->exit();
+ bx_virt_timer.setup();
+ bx_slowdown_timer.exit();
+
+ PLUG_unload_plugin(unmapped);
+ PLUG_unload_plugin(biosdev);
+ PLUG_unload_plugin(cmos);
+ PLUG_unload_plugin(dma);
+ PLUG_unload_plugin(pic);
+ PLUG_unload_plugin(vga);
+ PLUG_unload_plugin(floppy);
+#if BX_SUPPORT_PCI
+ PLUG_unload_plugin(pci);
+ PLUG_unload_plugin(pci2isa);
+#endif
+ bx_unload_plugins();
+ init_stubs();
+}
+
+Bit32u bx_devices_c::read_handler(void *this_ptr, Bit32u address, unsigned io_len)
+{
+#if !BX_USE_DEV_SMF
+ bx_devices_c *class_ptr = (bx_devices_c *) this_ptr;
+ return class_ptr->port92_read(address, io_len);
+}
+
+Bit32u bx_devices_c::port92_read(Bit32u address, unsigned io_len)
+{
+#else
+ UNUSED(this_ptr);
+#endif // !BX_USE_DEV_SMF
+
+ BX_DEBUG(("port92h read partially supported!!!"));
+ BX_DEBUG((" returning %02x", (unsigned) (BX_GET_ENABLE_A20() << 1)));
+ return(BX_GET_ENABLE_A20() << 1);
+}
+
+void bx_devices_c::write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len)
+{
+#if !BX_USE_DEV_SMF
+ bx_devices_c *class_ptr = (bx_devices_c *) this_ptr;
+ class_ptr->port92_write(address, value, io_len);
+}
+
+void bx_devices_c::port92_write(Bit32u address, Bit32u value, unsigned io_len)
+{
+#else
+ UNUSED(this_ptr);
+#endif // !BX_USE_DEV_SMF
+
+ BX_DEBUG(("port92h write of %02x partially supported!!!", (unsigned) value));
+ BX_DEBUG(("A20: set_enable_a20() called"));
+ BX_SET_ENABLE_A20((value & 0x02) >> 1);
+ BX_DEBUG(("A20: now %u", (unsigned) BX_GET_ENABLE_A20()));
+ if (value & 0x01) { /* high speed reset */
+ BX_INFO(("iowrite to port0x92 : reset resquested"));
+ bx_pc_system.Reset(BX_RESET_SOFTWARE);
+ }
+}
+
+// This defines a no-default read handler,
+// so Bochs does not segfault if unmapped is not loaded
+Bit32u bx_devices_c::default_read_handler(void *this_ptr, Bit32u address, unsigned io_len)
+{
+ UNUSED(this_ptr);
+ BX_PANIC(("No default io-read handler found for 0x%04x/%d. Unmapped io-device not loaded ?", address, io_len));
+ return 0xffffffff;
+}
+
+// This defines a no-default write handler,
+// so Bochs does not segfault if unmapped is not loaded
+void bx_devices_c::default_write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len)
+{
+ UNUSED(this_ptr);
+ BX_PANIC(("No default io-write handler found for 0x%04x/%d. Unmapped io-device not loaded ?", address, io_len));
+}
+
+void bx_devices_c::timer_handler(void *this_ptr)
+{
+ bx_devices_c *class_ptr = (bx_devices_c *) this_ptr;
+ class_ptr->timer();
+}
+
+void bx_devices_c::timer()
+{
+ // separate calls to bx_gui->handle_events from the keyboard code.
+ {
+ static int multiple=0;
+ if (++multiple==10)
+ {
+ multiple=0;
+ SIM->periodic();
+ if (! bx_pc_system.kill_bochs_request)
+ bx_gui->handle_events();
+ }
+ }
+}
+
+bx_bool bx_devices_c::register_irq(unsigned irq, const char *name)
+{
+ if (irq >= BX_MAX_IRQS) {
+ BX_PANIC(("IO device %s registered with IRQ=%d above %u",
+ name, irq, (unsigned) BX_MAX_IRQS-1));
+ return 0;
+ }
+ if (irq_handler_name[irq]) {
+ BX_PANIC(("IRQ %u conflict, %s with %s", irq,
+ irq_handler_name[irq], name));
+ return 0;
+ }
+ irq_handler_name[irq] = new char[strlen(name)+1];
+ strcpy(irq_handler_name[irq], name);
+ return 1;
+}
+
+bx_bool bx_devices_c::unregister_irq(unsigned irq, const char *name)
+{
+ if (irq >= BX_MAX_IRQS) {
+ BX_PANIC(("IO device %s tried to unregister IRQ %d above %u",
+ name, irq, (unsigned) BX_MAX_IRQS-1));
+ return 0;
+ }
+ if (!irq_handler_name[irq]) {
+ BX_INFO(("IO device %s tried to unregister IRQ %d, not registered",
+ name, irq));
+ return 0;
+ }
+
+ if (strcmp(irq_handler_name[irq], name)) {
+ BX_INFO(("IRQ %u not registered to %s but to %s", irq,
+ name, irq_handler_name[irq]));
+ return 0;
+ }
+ delete [] irq_handler_name[irq];
+ irq_handler_name[irq] = NULL;
+ return 1;
+}
+
+bx_bool bx_devices_c::register_io_read_handler(void *this_ptr, bx_read_handler_t f,
+ Bit32u addr, const char *name, Bit8u mask)
+{
+ addr &= 0x0000ffff;
+
+ if (!f)
+ return 0;
+
+ /* first check if the port already has a handlers != the default handler */
+ if (read_port_to_handler[addr] &&
+ read_port_to_handler[addr] != &io_read_handlers) { // the default
+ BX_ERROR(("IO device address conflict(read) at IO address %Xh",
+ (unsigned) addr));
+ BX_ERROR((" conflicting devices: %s & %s",
+ read_port_to_handler[addr]->handler_name, name));
+ return 0;
+ }
+
+ /* first find existing handle for function or create new one */
+ struct io_handler_struct *curr = &io_read_handlers;
+ struct io_handler_struct *io_read_handler = NULL;
+ do {
+ if (curr->funct == f &&
+ curr->mask == mask &&
+ curr->this_ptr == this_ptr &&
+ curr->handler_name == name) { // really want the same name too
+ io_read_handler = curr;
+ break;
+ }
+ curr = curr->next;
+ } while (curr->next != &io_read_handlers);
+
+ if (!io_read_handler) {
+ io_read_handler = new struct io_handler_struct;
+ io_read_handler->funct = (void *)f;
+ io_read_handler->this_ptr = this_ptr;
+ io_read_handler->handler_name = new char[strlen(name)+1];
+ strcpy(io_read_handler->handler_name, name);
+ io_read_handler->mask = mask;
+ io_read_handler->usage_count = 0;
+ // add the handler to the double linked list of handlers
+ io_read_handlers.prev->next = io_read_handler;
+ io_read_handler->next = &io_read_handlers;
+ io_read_handler->prev = io_read_handlers.prev;
+ io_read_handlers.prev = io_read_handler;
+ }
+
+ io_read_handler->usage_count++;
+ read_port_to_handler[addr] = io_read_handler;
+ return 1; // address mapped successfully
+}
+
+bx_bool bx_devices_c::register_io_write_handler(void *this_ptr, bx_write_handler_t f,
+ Bit32u addr, const char *name, Bit8u mask)
+{
+ addr &= 0x0000ffff;
+
+ if (!f)
+ return 0;
+
+ /* first check if the port already has a handlers != the default handler */
+ if (write_port_to_handler[addr] &&
+ write_port_to_handler[addr] != &io_write_handlers) { // the default
+ BX_ERROR(("IO device address conflict(write) at IO address %Xh",
+ (unsigned) addr));
+ BX_ERROR((" conflicting devices: %s & %s",
+ write_port_to_handler[addr]->handler_name, name));
+ return 0;
+ }
+
+ /* first find existing handle for function or create new one */
+ struct io_handler_struct *curr = &io_write_handlers;
+ struct io_handler_struct *io_write_handler = NULL;
+ do {
+ if (curr->funct == f &&
+ curr->mask == mask &&
+ curr->this_ptr == this_ptr &&
+ curr->handler_name == name) { // really want the same name too
+ io_write_handler = curr;
+ break;
+ }
+ curr = curr->next;
+ } while (curr->next != &io_write_handlers);
+
+ if (!io_write_handler) {
+ io_write_handler = new struct io_handler_struct;
+ io_write_handler->funct = (void *)f;
+ io_write_handler->this_ptr = this_ptr;
+ io_write_handler->handler_name = new char[strlen(name)+1];
+ strcpy(io_write_handler->handler_name, name);
+ io_write_handler->mask = mask;
+ io_write_handler->usage_count = 0;
+ // add the handler to the double linked list of handlers
+ io_write_handlers.prev->next = io_write_handler;
+ io_write_handler->next = &io_write_handlers;
+ io_write_handler->prev = io_write_handlers.prev;
+ io_write_handlers.prev = io_write_handler;
+ }
+
+ io_write_handler->usage_count++;
+ write_port_to_handler[addr] = io_write_handler;
+ return 1; // address mapped successfully
+}
+
+bx_bool bx_devices_c::register_io_read_handler_range(void *this_ptr, bx_read_handler_t f,
+ Bit32u begin_addr, Bit32u end_addr,
+ const char *name, Bit8u mask)
+{
+ Bit32u addr;
+ begin_addr &= 0x0000ffff;
+ end_addr &= 0x0000ffff;
+
+ if (end_addr < begin_addr) {
+ BX_ERROR(("!!! end_addr < begin_addr !!!"));
+ return 0;
+ }
+
+ if (!f) {
+ BX_ERROR(("!!! f == NULL !!!"));
+ return 0;
+ }
+
+ /* first check if the port already has a handlers != the default handler */
+ for (addr = begin_addr; addr <= end_addr; addr++)
+ if (read_port_to_handler[addr] &&
+ read_port_to_handler[addr] != &io_read_handlers) { // the default
+ BX_ERROR(("IO device address conflict(read) at IO address %Xh",
+ (unsigned) addr));
+ BX_ERROR((" conflicting devices: %s & %s",
+ read_port_to_handler[addr]->handler_name, name));
+ return 0;
+ }
+
+ /* first find existing handle for function or create new one */
+ struct io_handler_struct *curr = &io_read_handlers;
+ struct io_handler_struct *io_read_handler = NULL;
+ do {
+ if (curr->funct == f &&
+ curr->mask == mask &&
+ curr->this_ptr == this_ptr &&
+ curr->handler_name == name) {
+ io_read_handler = curr;
+ break;
+ }
+ curr = curr->next;
+ } while (curr->next != &io_read_handlers);
+
+ if (!io_read_handler) {
+ io_read_handler = new struct io_handler_struct;
+ io_read_handler->funct = (void *)f;
+ io_read_handler->this_ptr = this_ptr;
+ io_read_handler->handler_name = new char[strlen(name)+1];
+ strcpy(io_read_handler->handler_name, name);
+ io_read_handler->mask = mask;
+ io_read_handler->usage_count = 0;
+ // add the handler to the double linked list of handlers
+ io_read_handlers.prev->next = io_read_handler;
+ io_read_handler->next = &io_read_handlers;
+ io_read_handler->prev = io_read_handlers.prev;
+ io_read_handlers.prev = io_read_handler;
+ }
+
+ io_read_handler->usage_count += end_addr - begin_addr + 1;
+ for (addr = begin_addr; addr <= end_addr; addr++)
+ read_port_to_handler[addr] = io_read_handler;
+ return 1; // address mapped successfully
+}
+
+bx_bool bx_devices_c::register_io_write_handler_range(void *this_ptr, bx_write_handler_t f,
+ Bit32u begin_addr, Bit32u end_addr,
+ const char *name, Bit8u mask)
+{
+ Bit32u addr;
+ begin_addr &= 0x0000ffff;
+ end_addr &= 0x0000ffff;
+
+ if (end_addr < begin_addr) {
+ BX_ERROR(("!!! end_addr < begin_addr !!!"));
+ return 0;
+ }
+
+ if (!f) {
+ BX_ERROR(("!!! f == NULL !!!"));
+ return 0;
+ }
+
+ /* first check if the port already has a handlers != the default handler */
+ for (addr = begin_addr; addr <= end_addr; addr++)
+ if (write_port_to_handler[addr] &&
+ write_port_to_handler[addr] != &io_write_handlers) { // the default
+ BX_ERROR(("IO device address conflict(read) at IO address %Xh",
+ (unsigned) addr));
+ BX_ERROR((" conflicting devices: %s & %s",
+ write_port_to_handler[addr]->handler_name, name));
+ return 0;
+ }
+
+ /* first find existing handle for function or create new one */
+ struct io_handler_struct *curr = &io_write_handlers;
+ struct io_handler_struct *io_write_handler = NULL;
+ do {
+ if (curr->funct == f &&
+ curr->mask == mask &&
+ curr->this_ptr == this_ptr &&
+ curr->handler_name == name) {
+ io_write_handler = curr;
+ break;
+ }
+ curr = curr->next;
+ } while (curr->next != &io_write_handlers);
+
+ if (!io_write_handler) {
+ io_write_handler = new struct io_handler_struct;
+ io_write_handler->funct = (void *)f;
+ io_write_handler->this_ptr = this_ptr;
+ io_write_handler->handler_name = new char[strlen(name)+1];
+ strcpy(io_write_handler->handler_name, name);
+ io_write_handler->mask = mask;
+ io_write_handler->usage_count = 0;
+ // add the handler to the double linked list of handlers
+ io_write_handlers.prev->next = io_write_handler;
+ io_write_handler->next = &io_write_handlers;
+ io_write_handler->prev = io_write_handlers.prev;
+ io_write_handlers.prev = io_write_handler;
+ }
+
+ io_write_handler->usage_count += end_addr - begin_addr + 1;
+ for (addr = begin_addr; addr <= end_addr; addr++)
+ write_port_to_handler[addr] = io_write_handler;
+ return 1; // address mapped successfully
+}
+
+
+// Registration of default handlers (mainly be the unmapped device)
+bx_bool bx_devices_c::register_default_io_read_handler(void *this_ptr, bx_read_handler_t f,
+ const char *name, Bit8u mask)
+{
+ io_read_handlers.funct = (void *)f;
+ io_read_handlers.this_ptr = this_ptr;
+ if (io_read_handlers.handler_name) {
+ delete [] io_read_handlers.handler_name;
+ }
+ io_read_handlers.handler_name = new char[strlen(name)+1];
+ strcpy(io_read_handlers.handler_name, name);
+ io_read_handlers.mask = mask;
+ return 1;
+}
+
+bx_bool bx_devices_c::register_default_io_write_handler(void *this_ptr, bx_write_handler_t f,
+ const char *name, Bit8u mask)
+{
+ io_write_handlers.funct = (void *)f;
+ io_write_handlers.this_ptr = this_ptr;
+ if (io_write_handlers.handler_name) {
+ delete [] io_write_handlers.handler_name;
+ }
+ io_write_handlers.handler_name = new char[strlen(name)+1];
+ strcpy(io_write_handlers.handler_name, name);
+ io_write_handlers.mask = mask;
+ return 1;
+}
+
+bx_bool bx_devices_c::unregister_io_read_handler(void *this_ptr, bx_read_handler_t f,
+ Bit32u addr, Bit8u mask)
+{
+ addr &= 0x0000ffff;
+
+ struct io_handler_struct *io_read_handler = read_port_to_handler[addr];
+
+ //BX_INFO(("Unregistering I/O read handler at %#x", addr));
+
+ if (!io_read_handler) {
+ BX_ERROR((">>> NO IO_READ_HANDLER <<<"));
+ return 0;
+ }
+
+ if (io_read_handler == &io_read_handlers) {
+ BX_ERROR((">>> CANNOT UNREGISTER THE DEFAULT IO_READ_HANDLER <<<"));
+ return 0; // cannot unregister the default handler
+ }
+
+ if (io_read_handler->funct != f) {
+ BX_ERROR((">>> NOT THE SAME IO_READ_HANDLER FUNC <<<"));
+ return 0;
+ }
+
+ if (io_read_handler->this_ptr != this_ptr) {
+ BX_ERROR((">>> NOT THE SAME IO_READ_HANDLER THIS_PTR <<<"));
+ return 0;
+ }
+
+ if (io_read_handler->mask != mask) {
+ BX_ERROR((">>> NOT THE SAME IO_READ_HANDLER MASK <<<"));
+ return 0;
+ }
+
+ read_port_to_handler[addr] = &io_read_handlers; // reset to default
+ io_read_handler->usage_count--;
+
+ if (!io_read_handler->usage_count) { // kill this handler entry
+ io_read_handler->prev->next = io_read_handler->next;
+ io_read_handler->next->prev = io_read_handler->prev;
+ delete [] io_read_handler->handler_name;
+ delete io_read_handler;
+ }
+ return 1;
+}
+
+bx_bool bx_devices_c::unregister_io_write_handler(void *this_ptr, bx_write_handler_t f,
+ Bit32u addr, Bit8u mask)
+{
+ addr &= 0x0000ffff;
+
+ struct io_handler_struct *io_write_handler = write_port_to_handler[addr];
+
+ if (!io_write_handler)
+ return 0;
+
+ if (io_write_handler == &io_write_handlers)
+ return 0; // cannot unregister the default handler
+
+ if (io_write_handler->funct != f)
+ return 0;
+
+ if (io_write_handler->this_ptr != this_ptr)
+ return 0;
+
+ if (io_write_handler->mask != mask)
+ return 0;
+
+ write_port_to_handler[addr] = &io_write_handlers; // reset to default
+ io_write_handler->usage_count--;
+
+ if (!io_write_handler->usage_count) { // kill this handler entry
+ io_write_handler->prev->next = io_write_handler->next;
+ io_write_handler->next->prev = io_write_handler->prev;
+ delete [] io_write_handler->handler_name;
+ delete io_write_handler;
+ }
+ return 1;
+}
+
+bx_bool bx_devices_c::unregister_io_read_handler_range(void *this_ptr, bx_read_handler_t f,
+ Bit32u begin, Bit32u end, Bit8u mask)
+{
+ begin &= 0x0000ffff;
+ end &= 0x0000ffff;
+ Bit32u addr;
+ bx_bool ret = 1;
+
+ /*
+ * the easy way this time
+ */
+ for (addr = begin; addr <= end; addr++)
+ if (!unregister_io_read_handler(this_ptr, f, addr, mask))
+ ret = 0;
+
+ return ret;
+}
+
+bx_bool bx_devices_c::unregister_io_write_handler_range(void *this_ptr, bx_write_handler_t f,
+ Bit32u begin, Bit32u end, Bit8u mask)
+{
+ begin &= 0x0000ffff;
+ end &= 0x0000ffff;
+ Bit32u addr;
+ bx_bool ret = 1;
+
+ /*
+ * the easy way this time
+ */
+ for (addr = begin; addr <= end; addr++)
+ if (!unregister_io_write_handler(this_ptr, f, addr, mask))
+ ret = 0;
+
+ return ret;
+}
+
+
+/*
+ * Read a byte of data from the IO memory address space
+ */
+
+ Bit32u BX_CPP_AttrRegparmN(2)
+bx_devices_c::inp(Bit16u addr, unsigned io_len)
+{
+ struct io_handler_struct *io_read_handler;
+ Bit32u ret;
+
+ BX_INSTR_INP(addr, io_len);
+
+ io_read_handler = read_port_to_handler[addr];
+ if (io_read_handler->mask & io_len) {
+ ret = ((bx_read_handler_t)io_read_handler->funct)(io_read_handler->this_ptr, (Bit32u)addr, io_len);
+ } else {
+ switch (io_len) {
+ case 1: ret = 0xff; break;
+ case 2: ret = 0xffff; break;
+ default: ret = 0xffffffff; break;
+ }
+ if (addr != 0x0cf8) { // don't flood the logfile when probing PCI
+ BX_ERROR(("read from port 0x%04x with len %d returns 0x%x", addr, io_len, ret));
+ }
+ }
+ BX_INSTR_INP2(addr, io_len, ret);
+ BX_DBG_IO_REPORT(addr, io_len, BX_READ, ret);
+ return(ret);
+}
+
+
+/*
+ * Write a byte of data to the IO memory address space.
+ */
+
+ void BX_CPP_AttrRegparmN(3)
+bx_devices_c::outp(Bit16u addr, Bit32u value, unsigned io_len)
+{
+ struct io_handler_struct *io_write_handler;
+
+ BX_INSTR_OUTP(addr, io_len);
+ BX_INSTR_OUTP2(addr, io_len, value);
+
+ BX_DBG_IO_REPORT(addr, io_len, BX_WRITE, value);
+
+ io_write_handler = write_port_to_handler[addr];
+ if (io_write_handler->mask & io_len) {
+ ((bx_write_handler_t)io_write_handler->funct)(io_write_handler->this_ptr, (Bit32u)addr, value, io_len);
+ } else if (addr != 0x0cf8) { // don't flood the logfile when probing PCI
+ BX_ERROR(("write to port 0x%04x with len %d ignored", addr, io_len));
+ }
+}
+
+bx_bool bx_devices_c::is_serial_enabled(void)
+{
+ char pname[24];
+
+ for (int i=0; iget_param_bool(pname)->get())
+ return true;
+ }
+ return false;
+}
+
+bx_bool bx_devices_c::is_usb_enabled(void)
+{
+ char pname[20];
+
+ for (int i=0; iget_param_bool(pname)->get())
+ return true;
+ }
+ return false;
+}
+
+bx_bool bx_devices_c::is_parallel_enabled(void)
+{
+ char pname[26];
+
+ for (int i=0; iget_param_bool(pname)->get())
+ return true;
+ }
+ return false;
+}
+
+void bx_pci_device_stub_c::register_pci_state(bx_list_c *list, Bit8u *pci_conf)
+{
+ char name[6];
+
+ bx_list_c *pci = new bx_list_c(list, "pci_conf", 256);
+ for (unsigned i=0; i<256; i++) {
+ sprintf(name, "0x%02x", i);
+ new bx_shadow_num_c(pci, name, &pci_conf[i], BASE_HEX);
+ }
+}
Index: trunk/src/bochs-diff-2.3.7/iodev/hdemu.cc
===================================================================
--- trunk/src/bochs-diff-2.3.7/iodev/hdemu.cc (nonexistent)
+++ trunk/src/bochs-diff-2.3.7/iodev/hdemu.cc (revision 39)
@@ -0,0 +1,118 @@
+// Define BX_PLUGGABLE in files that can be compiled into plugins. For
+// platforms that require a special tag on exported symbols, BX_PLUGGABLE
+// is used to know when we are exporting symbols and when we are importing.
+#define BX_PLUGGABLE
+
+#include "iodev.h"
+#define LOG_THIS theHdemuDevice->
+
+bx_hdemu_c *theHdemuDevice = NULL;
+
+int libhdemu_LTX_plugin_init(plugin_t *plugin, plugintype_t type, int argc, char *argv[])
+{
+ theHdemuDevice = new bx_hdemu_c();
+ bx_devices.pluginHdemuDevice = theHdemuDevice;
+ BX_REGISTER_DEVICE_DEVMODEL(plugin, type, theHdemuDevice, "hdemu");
+ return(0); // Success
+}
+
+void libhdemu_LTX_plugin_fini(void)
+{
+ delete theHdemuDevice;
+}
+
+bx_hdemu_c::bx_hdemu_c()
+{
+ put("HDEMU");
+ settype(HDEMULOG);
+ input = NULL;
+}
+
+bx_hdemu_c::~bx_hdemu_c()
+{
+ if (input != NULL) fclose(input);
+ BX_DEBUG(("Exit"));
+}
+
+void bx_hdemu_c::init(void)
+{
+ char name[16];
+
+ BX_DEBUG(("Init $Id: hdemu.cc,v 1.1 2008-11-14 03:31:25 zeus Exp $"));
+
+ sprintf(name, "Hd emu");
+ /* hdemu i/o ports */
+ DEV_register_ioread_handler_range(this, read_handler, 0xe000, 0xe1fe, name, 2);
+ DEV_register_iowrite_handler(this, write_handler, 0xe000, name, 2);
+
+ /* internal state */
+ BX_HDEMU_THIS base = 0x0;
+
+ /* input file */
+ input = fopen("hd.img", "rb");
+ if (!input)
+ BX_PANIC(("Could not open 'hd.img' to read hard disk contents"));
+}
+
+void bx_hdemu_c::reset(unsigned type)
+{
+}
+
+void bx_hdemu_c::register_state(void)
+{
+ unsigned i;
+ char name[4], pname[20];
+ bx_list_c *base, *port;
+
+ bx_list_c *list = new bx_list_c(SIM->get_bochs_root(), "hdemu", "Hard disk emulator", 1);
+
+ sprintf(name, "0", i);
+ port = new bx_list_c(list, name, 1);
+ new bx_shadow_num_c(port, "base", &BX_HDEMU_THIS base, BASE_HEX);
+}
+
+// static IO port read callback handler
+// redirects to non-static class handler to avoid virtual functions
+
+Bit32u bx_hdemu_c::read_handler(void *this_ptr, Bit32u address, unsigned io_len)
+{
+#if !BX_USE_PAR_SMF
+ bx_hdemu_c *class_ptr = (bx_hdemu_c *) this_ptr;
+ return class_ptr->read(address, io_len);
+}
+
+Bit32u bx_hdemu_c::read(Bit32u address, unsigned io_len)
+{
+#else
+ UNUSED(this_ptr);
+#endif // !BX_USE_PAR_SMF
+
+ Bit16u retval;
+ size_t result;
+ address = address & 0x01ff;
+
+ fseek (BX_HDEMU_THIS input, address+(BX_HDEMU_THIS base)*512, SEEK_SET );
+ result = fread (&retval, 2, 1, BX_HDEMU_THIS input);
+
+ return(retval);
+}
+
+// static IO port write callback handler
+// redirects to non-static class handler to avoid virtual functions
+
+void bx_hdemu_c::write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len)
+{
+#if !BX_USE_PAR_SMF
+ bx_hdemu_c *class_ptr = (bx_hdemu_c *) this_ptr;
+
+ class_ptr->write(address, value, io_len);
+}
+
+void bx_hdemu_c::write(Bit32u address, Bit32u value, unsigned io_len)
+{
+#else
+ UNUSED(this_ptr);
+#endif // !BX_USE_PAR_SMF
+
+ BX_HDEMU_THIS base = value;
+}
Index: trunk/src/bochs-diff-2.3.7/iodev/hdemu.h
===================================================================
--- trunk/src/bochs-diff-2.3.7/iodev/hdemu.h (nonexistent)
+++ trunk/src/bochs-diff-2.3.7/iodev/hdemu.h (revision 39)
@@ -0,0 +1,34 @@
+#ifndef BX_IODEV_HDEMU_H
+#define BX_IODEV_HDEMU_H
+
+#define BX_USE_HDEMU_SMF 1
+
+#if BX_USE_HDEMU_SMF
+# define BX_HDEMU_SMF static
+# define BX_HDEMU_THIS theHdemuDevice->
+#else
+# define BX_HDEMU_SMF
+# define BX_HDEMU_THIS this->
+#endif
+
+class bx_hdemu_c : public bx_devmodel_c {
+public:
+ bx_hdemu_c();
+ virtual ~bx_hdemu_c();
+ virtual void init(void);
+ virtual void reset(unsigned type);
+ virtual void register_state(void);
+
+private:
+ FILE *input;
+ Bit16u base;
+
+ static Bit32u read_handler(void *this_ptr, Bit32u address, unsigned io_len);
+ static void write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len);
+#if !BX_USE_HDEMU_SMF
+ Bit32u read(Bit32u address, unsigned io_len);
+ void write(Bit32u address, Bit32u value, unsigned io_len);
+#endif
+};
+
+#endif
Index: trunk/src/bochs-diff-2.3.7/iodev/iodev.h
===================================================================
--- trunk/src/bochs-diff-2.3.7/iodev/iodev.h (nonexistent)
+++ trunk/src/bochs-diff-2.3.7/iodev/iodev.h (revision 39)
@@ -0,0 +1,619 @@
+/////////////////////////////////////////////////////////////////////////
+// $Id: iodev.h,v 1.1 2008-11-14 03:31:25 zeus Exp $
+/////////////////////////////////////////////////////////////////////////
+//
+// Copyright (C) 2002 MandrakeSoft S.A.
+//
+// MandrakeSoft S.A.
+// 43, rue d'Aboukir
+// 75002 Paris - France
+// http://www.linux-mandrake.com/
+// http://www.mandrakesoft.com/
+//
+// I/O port handlers API Copyright (C) 2003 by Frank Cornelis
+//
+// This library is free software; you can redistribute it and/or
+// modify it under the terms of the GNU Lesser General Public
+// License as published by the Free Software Foundation; either
+// version 2 of the License, or (at your option) any later version.
+//
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+// Lesser General Public License for more details.
+//
+// You should have received a copy of the GNU Lesser General Public
+// License along with this library; if not, write to the Free Software
+// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+//
+/////////////////////////////////////////////////////////////////////////
+
+#ifndef IODEV_H
+#define IODEV_H
+
+#include "bochs.h"
+
+/* maximum number of emulated devices allowed. floppy, vga, etc...
+ you can increase this to anything below 256 since an 8-bit handle
+ is used for each device */
+#define BX_MAX_IO_DEVICES 30
+
+/* the last device in the array is the "default" I/O device */
+#define BX_DEFAULT_IO_DEVICE (BX_MAX_IO_DEVICES-1)
+
+/* number of IRQ lines supported. In an ISA PC there are two
+ PIC chips cascaded together. each has 8 IRQ lines, so there
+ should be 16 IRQ's total */
+#define BX_MAX_IRQS 16
+#define BX_NO_IRQ -1
+
+class bx_pit_c;
+#if BX_SUPPORT_APIC
+class bx_ioapic_c;
+#endif
+#if BX_SUPPORT_IODEBUG
+class bx_iodebug_c;
+#endif
+#if 0
+class bx_g2h_c;
+#endif
+
+typedef Bit32u (*bx_read_handler_t)(void *, Bit32u, unsigned);
+typedef void (*bx_write_handler_t)(void *, Bit32u, Bit32u, unsigned);
+
+#if BX_USE_DEV_SMF
+# define BX_DEV_SMF static
+# define BX_DEV_THIS bx_devices.
+#else
+# define BX_DEV_SMF
+# define BX_DEV_THIS this->
+#endif
+
+//////////////////////////////////////////////////////////////////////
+// bx_devmodel_c declaration
+//////////////////////////////////////////////////////////////////////
+
+// This class defines virtual methods that are common to all devices.
+// Child classes do not need to implement all of them, because in this
+// definition they are defined as empty, as opposed to being pure
+// virtual (= 0).
+class BOCHSAPI bx_devmodel_c : public logfunctions {
+ public:
+ virtual ~bx_devmodel_c() {}
+ virtual void init_mem(BX_MEM_C *) {}
+ virtual void init(void) {}
+ virtual void reset(unsigned type) {}
+ virtual void register_state(void) {}
+ virtual void after_restore_state(void) {}
+};
+
+//////////////////////////////////////////////////////////////////////
+// declare stubs for PCI devices
+//////////////////////////////////////////////////////////////////////
+
+class bx_list_c;
+
+// the best should be deriving of bx_pci_device_stub_c from bx_devmodel_c
+// but it make serious problems for cirrus_svga device
+class BOCHSAPI bx_pci_device_stub_c {
+public:
+ virtual ~bx_pci_device_stub_c() {}
+
+ virtual Bit32u pci_read_handler(Bit8u address, unsigned io_len) {
+ return 0;
+ }
+
+ virtual void pci_write_handler(Bit8u address, Bit32u value, unsigned io_len) {}
+
+ void register_pci_state(bx_list_c *list, Bit8u *pci_conf);
+};
+
+//////////////////////////////////////////////////////////////////////
+// declare stubs for devices
+//////////////////////////////////////////////////////////////////////
+
+//////////////////////////////////////////////////////////////////////
+#define STUBFUNC(dev,method) \
+ pluginlog->panic("%s called in %s stub. you must not have loaded the %s plugin", #dev, #method, #dev)
+//////////////////////////////////////////////////////////////////////
+
+class BOCHSAPI bx_keyb_stub_c : public bx_devmodel_c {
+public:
+ virtual ~bx_keyb_stub_c() {}
+ // stubs for bx_keyb_c methods
+ virtual void mouse_motion(int delta_x, int delta_y, int delta_z, unsigned button_state) {
+ STUBFUNC(keyboard, mouse_motion);
+ }
+ virtual void gen_scancode(Bit32u key) {
+ STUBFUNC(keyboard, gen_scancode);
+ }
+ virtual void paste_bytes(Bit8u *data, Bit32s length) {
+ STUBFUNC(keyboard, paste_bytes);
+ }
+};
+
+class BOCHSAPI bx_hard_drive_stub_c : public bx_devmodel_c {
+public:
+ virtual void init() {
+ STUBFUNC(HD, init);
+ }
+ virtual void reset(unsigned type) {
+ STUBFUNC(HD, reset);
+ }
+ virtual Bit32u get_device_handle(Bit8u channel, Bit8u device) {
+ STUBFUNC(HD, get_device_handle); return 0;
+ }
+ virtual Bit32u get_first_cd_handle(void) {
+ STUBFUNC(HD, get_first_cd_handle); return 0;
+ }
+ virtual unsigned get_cd_media_status(Bit32u handle) {
+ STUBFUNC(HD, get_cd_media_status); return 0;
+ }
+ virtual unsigned set_cd_media_status(Bit32u handle, unsigned status) {
+ STUBFUNC(HD, set_cd_media_status); return 0;
+ }
+ virtual Bit32u virt_read_handler(Bit32u address, unsigned io_len)
+ {
+ STUBFUNC(HD, virt_read_handler); return 0;
+ }
+ virtual void virt_write_handler(Bit32u address,
+ Bit32u value, unsigned io_len)
+ {
+ STUBFUNC(HD, virt_write_handler);
+ }
+ virtual bx_bool bmdma_read_sector(Bit8u channel, Bit8u *buffer, Bit32u *sector_size) {
+ STUBFUNC(HD, bmdma_read_sector); return 0;
+ }
+ virtual bx_bool bmdma_write_sector(Bit8u channel, Bit8u *buffer) {
+ STUBFUNC(HD, bmdma_write_sector); return 0;
+ }
+ virtual void bmdma_complete(Bit8u channel) {
+ STUBFUNC(HD, bmdma_complete);
+ }
+};
+
+class BOCHSAPI bx_floppy_stub_c : public bx_devmodel_c {
+public:
+ virtual unsigned get_media_status(unsigned drive) {
+ STUBFUNC(floppy, get_media_status); return 0;
+ }
+ virtual unsigned set_media_status(unsigned drive, unsigned status) {
+ STUBFUNC(floppy, set_media_status); return 0;
+ }
+};
+
+class BOCHSAPI bx_cmos_stub_c : public bx_devmodel_c {
+public:
+ virtual Bit32u get_reg(unsigned reg) {
+ STUBFUNC(cmos, get_reg); return 0;
+ }
+ virtual void set_reg(unsigned reg, Bit32u val) {
+ STUBFUNC(cmos, set_reg);
+ }
+ virtual time_t get_timeval() {
+ return 0;
+ }
+ virtual void checksum_cmos(void) {
+ STUBFUNC(cmos, checksum);
+ }
+};
+
+class BOCHSAPI bx_dma_stub_c : public bx_devmodel_c {
+public:
+ virtual unsigned registerDMA8Channel(
+ unsigned channel,
+ void (* dmaRead)(Bit8u *data_byte),
+ void (* dmaWrite)(Bit8u *data_byte),
+ const char *name)
+ {
+ STUBFUNC(dma, registerDMA8Channel); return 0;
+ }
+ virtual unsigned registerDMA16Channel(
+ unsigned channel,
+ void (* dmaRead)(Bit16u *data_word),
+ void (* dmaWrite)(Bit16u *data_word),
+ const char *name)
+ {
+ STUBFUNC(dma, registerDMA16Channel); return 0;
+ }
+ virtual unsigned unregisterDMAChannel(unsigned channel) {
+ STUBFUNC(dma, unregisterDMAChannel); return 0;
+ }
+ virtual unsigned get_TC(void) {
+ STUBFUNC(dma, get_TC); return 0;
+ }
+ virtual void set_DRQ(unsigned channel, bx_bool val) {
+ STUBFUNC(dma, set_DRQ);
+ }
+ virtual void raise_HLDA(void) {
+ STUBFUNC(dma, raise_HLDA);
+ }
+};
+
+class BOCHSAPI bx_pic_stub_c : public bx_devmodel_c {
+public:
+ virtual void raise_irq(unsigned irq_no) {
+ STUBFUNC(pic, raise_irq);
+ }
+ virtual void lower_irq(unsigned irq_no) {
+ STUBFUNC(pic, lower_irq);
+ }
+ virtual void set_mode(bx_bool ma_sl, Bit8u mode) {
+ STUBFUNC(pic, set_mode);
+ }
+ virtual Bit8u IAC(void) {
+ STUBFUNC(pic, IAC); return 0;
+ }
+ virtual void show_pic_state(void) {
+ STUBFUNC(pic, show_pic_state);
+ }
+};
+
+class BOCHSAPI bx_vga_stub_c : public bx_devmodel_c {
+public:
+ virtual void redraw_area(unsigned x0, unsigned y0,
+ unsigned width, unsigned height) {
+ STUBFUNC(vga, redraw_area);
+ }
+ virtual Bit8u mem_read(Bit32u addr) {
+ STUBFUNC(vga, mem_read); return 0;
+ }
+ virtual void mem_write(Bit32u addr, Bit8u value) {
+ STUBFUNC(vga, mem_write);
+ }
+ virtual void get_text_snapshot(Bit8u **text_snapshot,
+ unsigned *txHeight, unsigned *txWidth) {
+ STUBFUNC(vga, get_text_snapshot);
+ }
+ virtual void trigger_timer(void *this_ptr) {
+ STUBFUNC(vga, trigger_timer);
+ }
+ virtual Bit8u get_actl_palette_idx(Bit8u index) {
+ return 0;
+ }
+ virtual void dump_status(void) {}
+};
+
+class BOCHSAPI bx_pci_bridge_stub_c : public bx_devmodel_c, public bx_pci_device_stub_c {
+public:
+ virtual bx_bool register_pci_handlers(bx_pci_device_stub_c *device,
+ Bit8u *devfunc, const char *name,
+ const char *descr)
+ {
+ STUBFUNC(pci, register_pci_handlers); return 0;
+ }
+ virtual bx_bool is_pci_device(const char *name) {
+ return 0;
+ }
+ virtual bx_bool pci_set_base_mem(void *this_ptr, memory_handler_t f1, memory_handler_t f2,
+ Bit32u *addr, Bit8u *pci_conf, unsigned size) {
+ STUBFUNC(pci, pci_set_base_mem);
+ return 0;
+ }
+
+ virtual bx_bool pci_set_base_io(void *this_ptr, bx_read_handler_t f1, bx_write_handler_t f2,
+ Bit32u *addr, Bit8u *pci_conf, unsigned size,
+ const Bit8u *iomask, const char *name) {
+ STUBFUNC(pci, pci_set_base_io);
+ return 0;
+ }
+
+ virtual Bit8u rd_memType(Bit32u addr) { return 0; }
+ virtual Bit8u wr_memType(Bit32u addr) { return 0; }
+ virtual void print_i440fx_state(void) {}
+};
+
+class BOCHSAPI bx_pci2isa_stub_c : public bx_devmodel_c, public bx_pci_device_stub_c {
+public:
+ virtual void pci_set_irq (Bit8u devfunc, unsigned line, bx_bool level) {
+ STUBFUNC(pci2isa, pci_set_irq);
+ }
+};
+
+class BOCHSAPI bx_pci_ide_stub_c : public bx_devmodel_c, public bx_pci_device_stub_c {
+public:
+ virtual bx_bool bmdma_present(void) {
+ return 0;
+ }
+ virtual void bmdma_set_irq(Bit8u channel) {}
+};
+
+class BOCHSAPI bx_ne2k_stub_c : public bx_devmodel_c {
+public:
+ virtual void print_info(FILE *file, int page, int reg, int nodups) {}
+};
+
+class BOCHSAPI bx_speaker_stub_c : public bx_devmodel_c {
+public:
+ virtual void beep_on(float frequency) {}
+ virtual void beep_off() {}
+};
+
+class BOCHSAPI bx_serial_stub_c : public bx_devmodel_c {
+public:
+ virtual void serial_mouse_enq(int delta_x, int delta_y, int delta_z, unsigned button_state) {
+ STUBFUNC(serial, serial_mouse_enq);
+ }
+};
+
+#if BX_SUPPORT_PCIUSB
+class BOCHSAPI bx_pci_usb_stub_c : public bx_devmodel_c, public bx_pci_device_stub_c {
+public:
+ virtual void usb_mouse_enq(int delta_x, int delta_y, int delta_z, unsigned button_state) {
+ STUBFUNC(pciusb, usb_mouse_enq);
+ }
+ virtual void usb_mouse_enabled_changed(bx_bool enable) {
+ STUBFUNC(pciusb, usb_mouse_enabled_changed);
+ }
+ virtual bx_bool usb_key_enq(Bit8u *scan_code) {
+ STUBFUNC(pciusb, usb_key_enq);
+ return 0;
+ }
+ virtual bx_bool usb_keyboard_connected() { return 0; }
+ virtual bx_bool usb_mouse_connected() { return 0; }
+};
+#endif
+
+#if BX_SUPPORT_ACPI
+class BOCHSAPI bx_acpi_ctrl_stub_c : public bx_devmodel_c, public bx_pci_device_stub_c {
+public:
+ virtual void generate_smi(Bit8u value) {}
+};
+#endif
+
+#if BX_SUPPORT_BUSMOUSE
+class BOCHSAPI bx_busm_stub_c : public bx_devmodel_c {
+public:
+ virtual void bus_mouse_enq(int delta_x, int delta_y, int delta_z, unsigned button_state) {
+ STUBFUNC(busmouse, bus_mouse_enq);
+ }
+};
+#endif
+
+class BOCHSAPI bx_devices_c : public logfunctions {
+public:
+ bx_devices_c(void);
+ ~bx_devices_c(void);
+ // Initialize the device stubs (in constructur and exit())
+ void init_stubs(void);
+ // Register I/O addresses and IRQ lines. Initialize any internal
+ // structures. init() is called only once, even if the simulator
+ // reboots or is restarted.
+ void init(BX_MEM_C *);
+ // Enter reset state in response to a reset condition.
+ // The types of reset conditions are defined in bochs.h:
+ // power-on, hardware, or software.
+ void reset(unsigned type);
+ // Cleanup the devices when the simulation quits.
+ void exit(void);
+ void register_state(void);
+ void after_restore_state(void);
+ BX_MEM_C *mem; // address space associated with these devices
+ bx_bool register_io_read_handler(void *this_ptr, bx_read_handler_t f,
+ Bit32u addr, const char *name, Bit8u mask);
+ bx_bool unregister_io_read_handler(void *this_ptr, bx_read_handler_t f,
+ Bit32u addr, Bit8u mask);
+ bx_bool register_io_write_handler(void *this_ptr, bx_write_handler_t f,
+ Bit32u addr, const char *name, Bit8u mask);
+ bx_bool unregister_io_write_handler(void *this_ptr, bx_write_handler_t f,
+ Bit32u addr, Bit8u mask);
+ bx_bool register_io_read_handler_range(void *this_ptr, bx_read_handler_t f,
+ Bit32u begin_addr, Bit32u end_addr,
+ const char *name, Bit8u mask);
+ bx_bool register_io_write_handler_range(void *this_ptr, bx_write_handler_t f,
+ Bit32u begin_addr, Bit32u end_addr,
+ const char *name, Bit8u mask);
+ bx_bool unregister_io_read_handler_range(void *this_ptr, bx_read_handler_t f,
+ Bit32u begin, Bit32u end, Bit8u mask);
+ bx_bool unregister_io_write_handler_range(void *this_ptr, bx_write_handler_t f,
+ Bit32u begin, Bit32u end, Bit8u mask);
+ bx_bool register_default_io_read_handler(void *this_ptr, bx_read_handler_t f, const char *name, Bit8u mask);
+ bx_bool register_default_io_write_handler(void *this_ptr, bx_write_handler_t f, const char *name, Bit8u mask);
+ bx_bool register_irq(unsigned irq, const char *name);
+ bx_bool unregister_irq(unsigned irq, const char *name);
+ Bit32u inp(Bit16u addr, unsigned io_len) BX_CPP_AttrRegparmN(2);
+ void outp(Bit16u addr, Bit32u value, unsigned io_len) BX_CPP_AttrRegparmN(3);
+
+ static void timer_handler(void *);
+ void timer(void);
+
+ bx_devmodel_c *pluginBiosDevice;
+#if BX_SUPPORT_APIC
+ bx_ioapic_c *ioapic;
+#endif
+ bx_pci_bridge_stub_c *pluginPciBridge;
+ bx_pci2isa_stub_c *pluginPci2IsaBridge;
+ bx_pci_ide_stub_c *pluginPciIdeController;
+#if BX_SUPPORT_ACPI
+ bx_acpi_ctrl_stub_c *pluginACPIController;
+#endif
+ bx_devmodel_c *pluginPciVgaAdapter;
+ bx_devmodel_c *pluginPciDevAdapter;
+ bx_devmodel_c *pluginPciPNicAdapter;
+ bx_pit_c *pit;
+ bx_keyb_stub_c *pluginKeyboard;
+ bx_dma_stub_c *pluginDmaDevice;
+ bx_floppy_stub_c *pluginFloppyDevice;
+ bx_cmos_stub_c *pluginCmosDevice;
+ bx_serial_stub_c *pluginSerialDevice;
+#if BX_SUPPORT_PCIUSB
+ bx_pci_usb_stub_c *pluginPciUSBAdapter;
+#endif
+ bx_devmodel_c *pluginParallelDevice;
+ bx_devmodel_c *pluginHdemuDevice;
+ bx_devmodel_c *pluginUnmapped;
+ bx_vga_stub_c *pluginVgaDevice;
+ bx_pic_stub_c *pluginPicDevice;
+ bx_hard_drive_stub_c *pluginHardDrive;
+ bx_devmodel_c *pluginSB16Device;
+ bx_ne2k_stub_c *pluginNE2kDevice;
+ bx_devmodel_c *pluginExtFpuIrq;
+ bx_devmodel_c *pluginGameport;
+ bx_speaker_stub_c *pluginSpeaker;
+#if BX_SUPPORT_BUSMOUSE
+ bx_busm_stub_c *pluginBusMouse;
+#endif
+#if BX_SUPPORT_IODEBUG
+ bx_iodebug_c *iodebug;
+#endif
+#if 0
+ bx_g2h_c *g2h;
+#endif
+
+ // stub classes that the pointers (above) can point to until a plugin is
+ // loaded
+ bx_cmos_stub_c stubCmos;
+ bx_keyb_stub_c stubKeyboard;
+#if BX_SUPPORT_BUSMOUSE
+ bx_busm_stub_c stubBusMouse;
+#endif
+ bx_hard_drive_stub_c stubHardDrive;
+ bx_dma_stub_c stubDma;
+ bx_pic_stub_c stubPic;
+ bx_floppy_stub_c stubFloppy;
+ bx_vga_stub_c stubVga;
+ bx_pci_bridge_stub_c stubPci;
+ bx_pci2isa_stub_c stubPci2Isa;
+ bx_pci_ide_stub_c stubPciIde;
+ bx_ne2k_stub_c stubNE2k;
+ bx_speaker_stub_c stubSpeaker;
+ bx_serial_stub_c stubSerial;
+#if BX_SUPPORT_PCIUSB
+ bx_pci_usb_stub_c stubUsbAdapter;
+#endif
+#if BX_SUPPORT_ACPI
+ bx_acpi_ctrl_stub_c stubACPIController;
+#endif
+
+ // Some info to pass to devices which can handled bulk IO. This allows
+ // the interface to remain the same for IO devices which can't handle
+ // bulk IO. We should probably implement special INPBulk() and OUTBulk()
+ // functions which stick these values in the bx_devices_c class, and
+ // then call the normal functions rather than having gross globals
+ // variables.
+ Bit8u* bulkIOHostAddr;
+ unsigned bulkIOQuantumsRequested;
+ unsigned bulkIOQuantumsTransferred;
+
+private:
+
+ struct io_handler_struct {
+ struct io_handler_struct *next;
+ struct io_handler_struct *prev;
+ void *funct; // C++ type checking is great, but annoying
+ void *this_ptr;
+ char *handler_name; // name of device
+ int usage_count;
+ Bit8u mask; // io_len mask
+ };
+ struct io_handler_struct io_read_handlers;
+ struct io_handler_struct io_write_handlers;
+#define PORTS 0x10000
+ struct io_handler_struct **read_port_to_handler;
+ struct io_handler_struct **write_port_to_handler;
+
+ // more for informative purposes, the names of the devices which
+ // are use each of the IRQ 0..15 lines are stored here
+ char *irq_handler_name[BX_MAX_IRQS];
+
+ static Bit32u read_handler(void *this_ptr, Bit32u address, unsigned io_len);
+ static void write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len);
+ BX_DEV_SMF Bit32u port92_read(Bit32u address, unsigned io_len);
+ BX_DEV_SMF void port92_write(Bit32u address, Bit32u value, unsigned io_len);
+
+ static Bit32u default_read_handler(void *this_ptr, Bit32u address, unsigned io_len);
+ static void default_write_handler(void *this_ptr, Bit32u address, Bit32u value, unsigned io_len);
+
+ int timer_handle;
+ bx_bool is_serial_enabled();
+ bx_bool is_usb_enabled();
+ bx_bool is_parallel_enabled();
+};
+
+// memory stub has an assumption that there are no memory accesses splitting 4K page
+BX_CPP_INLINE void DEV_MEM_READ_PHYSICAL(bx_phy_address phy_addr, unsigned len, Bit8u *ptr)
+{
+ while(len > 0) {
+ unsigned remainingInPage = 0x1000 - (phy_addr & 0xfff);
+ if (len < remainingInPage) remainingInPage = len;
+ BX_MEM(0)->readPhysicalPage(NULL, phy_addr, remainingInPage, ptr);
+ ptr += remainingInPage;
+ phy_addr += remainingInPage;
+ len -= remainingInPage;
+ }
+}
+
+// memory stub has an assumption that there are no memory accesses splitting 4K page
+BX_CPP_INLINE void DEV_MEM_WRITE_PHYSICAL(bx_phy_address phy_addr, unsigned len, Bit8u *ptr)
+{
+ while(len > 0) {
+ unsigned remainingInPage = 0x1000 - (phy_addr & 0xfff);
+ if (len < remainingInPage) remainingInPage = len;
+ BX_MEM(0)->writePhysicalPage(NULL, phy_addr, remainingInPage, ptr);
+ ptr += remainingInPage;
+ phy_addr += remainingInPage;
+ len -= remainingInPage;
+ }
+}
+
+#ifndef NO_DEVICE_INCLUDES
+
+#if BX_SUPPORT_PCI
+#include "iodev/pci.h"
+#include "iodev/pci2isa.h"
+#include "iodev/pci_ide.h"
+#if BX_SUPPORT_ACPI
+#include "iodev/acpi.h"
+#endif
+#if BX_SUPPORT_PCIVGA
+#include "iodev/pcivga.h"
+#endif
+#if BX_SUPPORT_PCIDEV
+#include "iodev/pcidev.h"
+#endif
+#if BX_SUPPORT_PCIUSB
+#include "iodev/pciusb.h"
+#endif
+#endif
+#include "iodev/vga.h"
+#if BX_SUPPORT_APIC
+# include "iodev/ioapic.h"
+#endif
+#include "iodev/biosdev.h"
+#include "iodev/cmos.h"
+#include "iodev/dma.h"
+#include "iodev/floppy.h"
+#include "iodev/harddrv.h"
+#if BX_SUPPORT_IODEBUG
+# include "iodev/iodebug.h"
+#endif
+#include "iodev/keyboard.h"
+#if BX_SUPPORT_BUSMOUSE
+# include "iodev/busmouse.h"
+#endif
+#include "iodev/parallel.h"
+#include "iodev/hdemu.h"
+#include "iodev/pic.h"
+#include "iodev/pit_wrap.h"
+#include "iodev/virt_timer.h"
+#include "iodev/serial.h"
+#if BX_SUPPORT_SB16
+# include "iodev/sb16.h"
+#endif
+#include "iodev/unmapped.h"
+#include "iodev/ne2k.h"
+#if BX_SUPPORT_PCIPNIC
+#include "iodev/pcipnic.h"
+#endif
+#include "iodev/guest2host.h"
+#include "iodev/slowdown_timer.h"
+#include "iodev/extfpuirq.h"
+#include "iodev/gameport.h"
+
+#endif /* NO_DEVICE_INCLUDES */
+
+#if BX_PROVIDE_DEVICE_MODELS
+BOCHSAPI extern bx_devices_c bx_devices;
+#endif
+
+#endif /* IODEV_H */
Index: trunk/src/bochs-diff-2.3.7/cpu/cpu.cc
===================================================================
--- trunk/src/bochs-diff-2.3.7/cpu/cpu.cc (nonexistent)
+++ trunk/src/bochs-diff-2.3.7/cpu/cpu.cc (revision 39)
@@ -0,0 +1,989 @@
+/////////////////////////////////////////////////////////////////////////
+// $Id: cpu.cc,v 1.1 2008-11-14 03:31:23 zeus Exp $
+/////////////////////////////////////////////////////////////////////////
+//
+// Copyright (C) 2001 MandrakeSoft S.A.
+//
+// MandrakeSoft S.A.
+// 43, rue d'Aboukir
+// 75002 Paris - France
+// http://www.linux-mandrake.com/
+// http://www.mandrakesoft.com/
+//
+// This library is free software; you can redistribute it and/or
+// modify it under the terms of the GNU Lesser General Public
+// License as published by the Free Software Foundation; either
+// version 2 of the License, or (at your option) any later version.
+//
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+// Lesser General Public License for more details.
+//
+// You should have received a copy of the GNU Lesser General Public
+// License along with this library; if not, write to the Free Software
+// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+/////////////////////////////////////////////////////////////////////////
+
+#define NEED_CPU_REG_SHORTCUTS 1
+#include "bochs.h"
+#include "cpu.h"
+#define LOG_THIS BX_CPU_THIS_PTR
+
+#include "iodev/iodev.h"
+
+#if BX_EXTERNAL_DEBUGGER
+#include "extdb.h"
+#endif
+
+// Make code more tidy with a few macros.
+#if BX_SUPPORT_X86_64==0
+#define RIP EIP
+#define RCX ECX
+#endif
+
+// ICACHE instrumentation code
+#if BX_SUPPORT_ICACHE
+
+#define InstrumentICACHE 0
+
+#if InstrumentICACHE
+static unsigned iCacheLookups=0;
+static unsigned iCacheMisses=0;
+
+#define InstrICache_StatsMask 0xffffff
+
+#define InstrICache_Stats() {\
+ if ((iCacheLookups & InstrICache_StatsMask) == 0) { \
+ BX_INFO(("ICACHE lookups: %u, misses: %u, hit rate = %6.2f%% ", \
+ iCacheLookups, \
+ iCacheMisses, \
+ (iCacheLookups-iCacheMisses) * 100.0 / iCacheLookups)); \
+ iCacheLookups = iCacheMisses = 0; \
+ } \
+}
+#define InstrICache_Increment(v) (v)++
+
+#else
+#define InstrICache_Stats()
+#define InstrICache_Increment(v)
+#endif
+
+#endif // BX_SUPPORT_ICACHE
+
+// The CHECK_MAX_INSTRUCTIONS macro allows cpu_loop to execute a few
+// instructions and then return so that the other processors have a chance to
+// run. This is used by bochs internal debugger or when simulating
+// multiple processors.
+//
+// If maximum instructions have been executed, return. The zero-count
+// means run forever.
+#if BX_SUPPORT_SMP || BX_DEBUGGER
+ #define CHECK_MAX_INSTRUCTIONS(count) \
+ if ((count) > 0) { \
+ (count)--; \
+ if ((count) == 0) return; \
+ }
+#else
+ #define CHECK_MAX_INSTRUCTIONS(count)
+#endif
+
+void BX_CPU_C::cpu_loop(Bit32u max_instr_count)
+{
+#if BX_DEBUGGER
+ BX_CPU_THIS_PTR break_point = 0;
+ BX_CPU_THIS_PTR magic_break = 0;
+ BX_CPU_THIS_PTR stop_reason = STOP_NO_REASON;
+#endif
+
+ if (setjmp(BX_CPU_THIS_PTR jmp_buf_env)) {
+ // only from exception function we can get here ...
+ BX_INSTR_NEW_INSTRUCTION(BX_CPU_ID);
+ BX_TICK1_IF_SINGLE_PROCESSOR();
+#if BX_DEBUGGER || BX_EXTERNAL_DEBUGGER || BX_GDBSTUB
+ if (dbg_instruction_epilog()) return;
+#endif
+ CHECK_MAX_INSTRUCTIONS(max_instr_count);
+#if BX_GDBSTUB
+ if (bx_dbg.gdbstub_enabled) return;
+#endif
+ }
+
+ // If the exception() routine has encountered a nasty fault scenario,
+ // the debugger may request that control is returned to it so that
+ // the situation may be examined.
+#if BX_DEBUGGER
+ if (bx_guard.interrupt_requested) return;
+#endif
+
+ // We get here either by a normal function call, or by a longjmp
+ // back from an exception() call. In either case, commit the
+ // new EIP/ESP, and set up other environmental fields. This code
+ // mirrors similar code below, after the interrupt() call.
+ BX_CPU_THIS_PTR prev_rip = RIP; // commit new EIP
+ BX_CPU_THIS_PTR speculative_rsp = 0;
+ BX_CPU_THIS_PTR EXT = 0;
+ BX_CPU_THIS_PTR errorno = 0;
+
+ while (1) {
+
+ // check on events which occurred for previous instructions (traps)
+ // and ones which are asynchronous to the CPU (hardware interrupts)
+/*
+ * Zet: we don't handle external interrupts
+ *
+ if (BX_CPU_THIS_PTR async_event) {
+ if (handleAsyncEvent()) {
+ // If request to return to caller ASAP.
+ return;
+ }
+ }
+ */
+no_async_event:
+
+ Bit32u eipBiased = RIP + BX_CPU_THIS_PTR eipPageBias;
+
+ if (eipBiased >= BX_CPU_THIS_PTR eipPageWindowSize) {
+ prefetch();
+ eipBiased = RIP + BX_CPU_THIS_PTR eipPageBias;
+ }
+
+#if BX_SUPPORT_ICACHE
+ bx_phy_address pAddr = BX_CPU_THIS_PTR pAddrA20Page + eipBiased;
+ bxICacheEntry_c *entry = BX_CPU_THIS_PTR iCache.get_entry(pAddr);
+ bxInstruction_c *i = entry->i;
+
+ InstrICache_Increment(iCacheLookups);
+ InstrICache_Stats();
+
+ if ((entry->pAddr == pAddr) &&
+ (entry->writeStamp == *(BX_CPU_THIS_PTR currPageWriteStampPtr)))
+ {
+ // iCache hit. An instruction was found in the iCache.
+#if BX_INSTRUMENTATION
+ BX_INSTR_OPCODE(BX_CPU_ID, BX_CPU_THIS_PTR eipFetchPtr + eipBiased,
+ i->ilen(), BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b, Is64BitMode());
+#endif
+ }
+ else {
+ // iCache miss. No validated instruction with matching fetch parameters
+ // is in the iCache.
+ InstrICache_Increment(iCacheMisses);
+ serveICacheMiss(entry, eipBiased, pAddr);
+ i = entry->i;
+ }
+#else
+ bxInstruction_c iStorage, *i = &iStorage;
+ unsigned remainingInPage = BX_CPU_THIS_PTR eipPageWindowSize - eipBiased;
+ const Bit8u *fetchPtr = BX_CPU_THIS_PTR eipFetchPtr + eipBiased;
+ fetchInstruction(i, fetchPtr, remainingInPage);
+#endif
+
+#if BX_SUPPORT_TRACE_CACHE
+ unsigned length = entry->ilen;
+
+ for(;;i++) {
+#endif
+ // An instruction will have been fetched using either the normal case,
+ // or the boundary fetch (across pages), by this point.
+ BX_INSTR_FETCH_DECODE_COMPLETED(BX_CPU_ID, i);
+
+#if BX_DEBUGGER || BX_EXTERNAL_DEBUGGER || BX_GDBSTUB
+ if (dbg_instruction_prolog()) return;
+#endif
+
+#if BX_DISASM
+ if (BX_CPU_THIS_PTR trace) {
+ // print the instruction that is about to be executed
+ debug_disasm_instruction(BX_CPU_THIS_PTR prev_rip);
+ }
+#endif
+
+ // decoding instruction compeleted -> continue with execution
+ BX_INSTR_BEFORE_EXECUTION(BX_CPU_ID, i);
+ RIP += i->ilen();
+ BX_CPU_CALL_METHOD(i->execute, (i)); // might iterate repeat instruction
+ BX_CPU_THIS_PTR prev_rip = RIP; // commit new RIP
+ BX_INSTR_AFTER_EXECUTION(BX_CPU_ID, i);
+ BX_TICK1_IF_SINGLE_PROCESSOR();
+
+ // inform instrumentation about new instruction
+ BX_INSTR_NEW_INSTRUCTION(BX_CPU_ID);
+
+ // note instructions generating exceptions never reach this point
+#if BX_DEBUGGER || BX_EXTERNAL_DEBUGGER || BX_GDBSTUB
+ if (dbg_instruction_epilog()) return;
+#endif
+
+ CHECK_MAX_INSTRUCTIONS(max_instr_count);
+
+#if BX_SUPPORT_TRACE_CACHE
+ if (BX_CPU_THIS_PTR async_event) {
+ // clear stop trace magic indication that probably was set by repeat or branch32/64
+ BX_CPU_THIS_PTR async_event &= ~BX_ASYNC_EVENT_STOP_TRACE;
+ break;
+ }
+
+ if (--length == 0) goto no_async_event;
+ }
+#endif
+ } // while (1)
+}
+
+void BX_CPP_AttrRegparmN(2) BX_CPU_C::repeat(bxInstruction_c *i, BxExecutePtr_tR execute)
+{
+ // non repeated instruction
+ if (! i->repUsedL()) {
+ BX_CPU_CALL_METHOD(execute, (i));
+ return;
+ }
+
+#if BX_SUPPORT_X86_64
+ if (i->as64L()) {
+ while(1) {
+ if (RCX != 0) {
+ BX_CPU_CALL_METHOD(execute, (i));
+ BX_INSTR_REPEAT_ITERATION(BX_CPU_ID, i);
+ RCX --;
+ }
+ if (RCX == 0) return;
+
+#if BX_DEBUGGER == 0
+ if (BX_CPU_THIS_PTR async_event)
+#endif
+ break; // exit always if debugger enabled
+
+ BX_TICK1_IF_SINGLE_PROCESSOR();
+ }
+ }
+ else
+#endif
+ if (i->as32L()) {
+ while(1) {
+ if (ECX != 0) {
+ BX_CPU_CALL_METHOD(execute, (i));
+ BX_INSTR_REPEAT_ITERATION(BX_CPU_ID, i);
+ RCX = ECX - 1;
+ }
+ if (ECX == 0) return;
+
+#if BX_DEBUGGER == 0
+ if (BX_CPU_THIS_PTR async_event)
+#endif
+ break; // exit always if debugger enabled
+
+ BX_TICK1_IF_SINGLE_PROCESSOR();
+ }
+ }
+ else // 16bit addrsize
+ {
+ while(1) {
+ if (CX != 0) {
+ BX_CPU_CALL_METHOD(execute, (i));
+ BX_INSTR_REPEAT_ITERATION(BX_CPU_ID, i);
+ CX --;
+ }
+ if (CX == 0) return;
+
+#if BX_DEBUGGER == 0
+ if (BX_CPU_THIS_PTR async_event)
+#endif
+ break; // exit always if debugger enabled
+
+ BX_TICK1_IF_SINGLE_PROCESSOR();
+ }
+ }
+
+ RIP = BX_CPU_THIS_PTR prev_rip; // repeat loop not done, restore RIP
+
+#if BX_SUPPORT_TRACE_CACHE
+ // assert magic async_event to stop trace execution
+ BX_CPU_THIS_PTR async_event |= BX_ASYNC_EVENT_STOP_TRACE;
+#endif
+}
+
+void BX_CPP_AttrRegparmN(2) BX_CPU_C::repeat_ZFL(bxInstruction_c *i, BxExecutePtr_tR execute)
+{
+ // non repeated instruction
+ if (! i->repUsedL()) {
+ BX_CPU_CALL_METHOD(execute, (i));
+ return;
+ }
+
+ unsigned rep = i->repUsedValue();
+
+#if BX_SUPPORT_X86_64
+ if (i->as64L()) {
+ while(1) {
+ if (RCX != 0) {
+ BX_CPU_CALL_METHOD(execute, (i));
+ BX_INSTR_REPEAT_ITERATION(BX_CPU_ID, i);
+ RCX --;
+ }
+ if (rep==3 && get_ZF()==0) return;
+ if (rep==2 && get_ZF()!=0) return;
+ if (RCX == 0) return;
+
+#if BX_DEBUGGER == 0
+ if (BX_CPU_THIS_PTR async_event)
+#endif
+ break; // exit always if debugger enabled
+
+ BX_TICK1_IF_SINGLE_PROCESSOR();
+ }
+ }
+ else
+#endif
+ if (i->as32L()) {
+ while(1) {
+ if (ECX != 0) {
+ BX_CPU_CALL_METHOD(execute, (i));
+ BX_INSTR_REPEAT_ITERATION(BX_CPU_ID, i);
+ RCX = ECX - 1;
+ }
+ if (rep==3 && get_ZF()==0) return;
+ if (rep==2 && get_ZF()!=0) return;
+ if (ECX == 0) return;
+
+#if BX_DEBUGGER == 0
+ if (BX_CPU_THIS_PTR async_event)
+#endif
+ break; // exit always if debugger enabled
+
+ BX_TICK1_IF_SINGLE_PROCESSOR();
+ }
+ }
+ else // 16bit addrsize
+ {
+ while(1) {
+ if (CX != 0) {
+ BX_CPU_CALL_METHOD(execute, (i));
+ BX_INSTR_REPEAT_ITERATION(BX_CPU_ID, i);
+ CX --;
+ }
+ if (rep==3 && get_ZF()==0) return;
+ if (rep==2 && get_ZF()!=0) return;
+ if (CX == 0) return;
+
+#if BX_DEBUGGER == 0
+ if (BX_CPU_THIS_PTR async_event)
+#endif
+ break; // exit always if debugger enabled
+
+ BX_TICK1_IF_SINGLE_PROCESSOR();
+ }
+ }
+
+ RIP = BX_CPU_THIS_PTR prev_rip; // repeat loop not done, restore RIP
+
+#if BX_SUPPORT_TRACE_CACHE
+ // assert magic async_event to stop trace execution
+ BX_CPU_THIS_PTR async_event |= BX_ASYNC_EVENT_STOP_TRACE;
+#endif
+}
+
+unsigned BX_CPU_C::handleAsyncEvent(void)
+{
+ //
+ // This area is where we process special conditions and events.
+ //
+ if (BX_CPU_THIS_PTR debug_trap & BX_DEBUG_TRAP_SPECIAL) {
+ // I made up the bitmask above to mean HALT state.
+ // for one processor, pass the time as quickly as possible until
+ // an interrupt wakes up the CPU.
+ while (1)
+ {
+ if ((BX_CPU_INTR && (BX_CPU_THIS_PTR get_IF() || (BX_CPU_THIS_PTR debug_trap & BX_DEBUG_TRAP_MWAIT_IF))) ||
+ BX_CPU_THIS_PTR nmi_pending || BX_CPU_THIS_PTR smi_pending)
+ {
+ // interrupt ends the HALT condition
+#if BX_SUPPORT_MONITOR_MWAIT
+ if (BX_CPU_THIS_PTR debug_trap & BX_DEBUG_TRAP_MWAIT)
+ BX_MEM(0)->clear_monitor(BX_CPU_THIS_PTR bx_cpuid);
+#endif
+ BX_CPU_THIS_PTR debug_trap = 0; // clear traps for after resume
+ BX_CPU_THIS_PTR inhibit_mask = 0; // clear inhibits for after resume
+ break;
+ }
+ if ((BX_CPU_THIS_PTR debug_trap & BX_DEBUG_TRAP_SPECIAL) == 0) {
+ BX_INFO(("handleAsyncEvent: reset detected in HLT state"));
+ break;
+ }
+
+ // for multiprocessor simulation, even if this CPU is halted we still
+ // must give the others a chance to simulate. If an interrupt has
+ // arrived, then clear the HALT condition; otherwise just return from
+ // the CPU loop with stop_reason STOP_CPU_HALTED.
+#if BX_SUPPORT_SMP
+ if (BX_SMP_PROCESSORS > 1) {
+ // HALT condition remains, return so other CPUs have a chance
+#if BX_DEBUGGER
+ BX_CPU_THIS_PTR stop_reason = STOP_CPU_HALTED;
+#endif
+ return 1; // Return to caller of cpu_loop.
+ }
+#endif
+
+#if BX_DEBUGGER
+ if (bx_guard.interrupt_requested)
+ return 1; // Return to caller of cpu_loop.
+#endif
+
+ BX_TICK1();
+ }
+ } else if (bx_pc_system.kill_bochs_request) {
+ // setting kill_bochs_request causes the cpu loop to return ASAP.
+ return 1; // Return to caller of cpu_loop.
+ }
+
+ // Priority 1: Hardware Reset and Machine Checks
+ // RESET
+ // Machine Check
+ // (bochs doesn't support these)
+
+ // Priority 2: Trap on Task Switch
+ // T flag in TSS is set
+ if (BX_CPU_THIS_PTR debug_trap & 0x00008000) {
+ BX_CPU_THIS_PTR dr6 |= BX_CPU_THIS_PTR debug_trap;
+ exception(BX_DB_EXCEPTION, 0, 0); // no error, not interrupt
+ }
+
+ // Priority 3: External Hardware Interventions
+ // FLUSH
+ // STOPCLK
+ // SMI
+ // INIT
+ // (bochs doesn't support these)
+ if (BX_CPU_THIS_PTR smi_pending && ! BX_CPU_THIS_PTR smm_mode())
+ {
+ // clear SMI pending flag and disable NMI when SMM was accepted
+ BX_CPU_THIS_PTR smi_pending = 0;
+ BX_CPU_THIS_PTR nmi_disable = 1;
+ enter_system_management_mode();
+ }
+
+ // Priority 4: Traps on Previous Instruction
+ // Breakpoints
+ // Debug Trap Exceptions (TF flag set or data/IO breakpoint)
+ if (BX_CPU_THIS_PTR debug_trap &&
+ !(BX_CPU_THIS_PTR inhibit_mask & BX_INHIBIT_DEBUG))
+ {
+ // A trap may be inhibited on this boundary due to an instruction
+ // which loaded SS. If so we clear the inhibit_mask below
+ // and don't execute this code until the next boundary.
+ // Commit debug events to DR6
+ BX_CPU_THIS_PTR dr6 |= BX_CPU_THIS_PTR debug_trap;
+ exception(BX_DB_EXCEPTION, 0, 0); // no error, not interrupt
+ }
+
+ // Priority 5: External Interrupts
+ // NMI Interrupts
+ // Maskable Hardware Interrupts
+ if (BX_CPU_THIS_PTR inhibit_mask & BX_INHIBIT_INTERRUPTS) {
+ // Processing external interrupts is inhibited on this
+ // boundary because of certain instructions like STI.
+ // inhibit_mask is cleared below, in which case we will have
+ // an opportunity to check interrupts on the next instruction
+ // boundary.
+ }
+ else if (BX_CPU_THIS_PTR nmi_pending) {
+ BX_CPU_THIS_PTR nmi_pending = 0;
+ BX_CPU_THIS_PTR nmi_disable = 1;
+ BX_CPU_THIS_PTR errorno = 0;
+ BX_CPU_THIS_PTR EXT = 1; /* external event */
+ BX_INSTR_HWINTERRUPT(BX_CPU_ID, 2, BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, RIP);
+ interrupt(2, 0, 0, 0);
+ }
+ else if (BX_CPU_INTR && BX_CPU_THIS_PTR get_IF() && BX_DBG_ASYNC_INTR)
+ {
+ Bit8u vector;
+
+ // NOTE: similar code in ::take_irq()
+#if BX_SUPPORT_APIC
+ if (BX_CPU_THIS_PTR local_apic.INTR)
+ vector = BX_CPU_THIS_PTR local_apic.acknowledge_int();
+ else
+#endif
+ // if no local APIC, always acknowledge the PIC.
+ vector = DEV_pic_iac(); // may set INTR with next interrupt
+ BX_CPU_THIS_PTR errorno = 0;
+ BX_CPU_THIS_PTR EXT = 1; /* external event */
+ BX_INSTR_HWINTERRUPT(BX_CPU_ID, vector,
+ BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value, RIP);
+ interrupt(vector, 0, 0, 0);
+ // Set up environment, as would be when this main cpu loop gets
+ // invoked. At the end of normal instructions, we always commmit
+ // the new EIP/ESP values. But here, we call interrupt() much like
+ // it was a sofware interrupt instruction, and need to effect the
+ // commit here. This code mirrors similar code above.
+ BX_CPU_THIS_PTR prev_rip = RIP; // commit new RIP
+ BX_CPU_THIS_PTR speculative_rsp = 0;
+ BX_CPU_THIS_PTR EXT = 0;
+ BX_CPU_THIS_PTR errorno = 0;
+ }
+ else if (BX_HRQ && BX_DBG_ASYNC_DMA) {
+ // NOTE: similar code in ::take_dma()
+ // assert Hold Acknowledge (HLDA) and go into a bus hold state
+ DEV_dma_raise_hlda();
+ }
+
+ // Priority 6: Faults from fetching next instruction
+ // Code breakpoint fault
+ // Code segment limit violation (priority 7 on 486/Pentium)
+ // Code page fault (priority 7 on 486/Pentium)
+ // (handled in main decode loop)
+
+ // Priority 7: Faults from decoding next instruction
+ // Instruction length > 15 bytes
+ // Illegal opcode
+ // Coprocessor not available
+ // (handled in main decode loop etc)
+
+ // Priority 8: Faults on executing an instruction
+ // Floating point execution
+ // Overflow
+ // Bound error
+ // Invalid TSS
+ // Segment not present
+ // Stack fault
+ // General protection
+ // Data page fault
+ // Alignment check
+ // (handled by rest of the code)
+
+ if (BX_CPU_THIS_PTR get_TF())
+ {
+ // TF is set before execution of next instruction. Schedule
+ // a debug trap (#DB) after execution. After completion of
+ // next instruction, the code above will invoke the trap.
+ BX_CPU_THIS_PTR debug_trap |= 0x00004000; // BS flag in DR6
+ }
+
+ // Now we can handle things which are synchronous to instruction
+ // execution.
+ if (BX_CPU_THIS_PTR get_RF()) {
+ BX_CPU_THIS_PTR clear_RF();
+ }
+#if BX_X86_DEBUGGER
+ else {
+ // only bother comparing if any breakpoints enabled
+ if (BX_CPU_THIS_PTR dr7 & 0x000000ff) {
+ bx_address iaddr = get_laddr(BX_SEG_REG_CS, BX_CPU_THIS_PTR prev_rip);
+ Bit32u dr6_bits = hwdebug_compare(iaddr, 1, BX_HWDebugInstruction, BX_HWDebugInstruction);
+ if (dr6_bits)
+ {
+ // Add to the list of debug events thus far.
+ BX_CPU_THIS_PTR async_event = 1;
+ BX_CPU_THIS_PTR debug_trap |= dr6_bits;
+ // If debug events are not inhibited on this boundary,
+ // fire off a debug fault. Otherwise handle it on the next
+ // boundary. (becomes a trap)
+ if (! (BX_CPU_THIS_PTR inhibit_mask & BX_INHIBIT_DEBUG)) {
+ // Commit debug events to DR6
+ BX_CPU_THIS_PTR dr6 = BX_CPU_THIS_PTR debug_trap;
+ exception(BX_DB_EXCEPTION, 0, 0); // no error, not interrupt
+ }
+ }
+ }
+ }
+#endif
+
+ // We have ignored processing of external interrupts and
+ // debug events on this boundary. Reset the mask so they
+ // will be processed on the next boundary.
+ BX_CPU_THIS_PTR inhibit_mask = 0;
+
+ if (!(BX_CPU_INTR ||
+ BX_CPU_THIS_PTR debug_trap ||
+ BX_HRQ ||
+ BX_CPU_THIS_PTR get_TF()
+#if BX_X86_DEBUGGER
+ || (BX_CPU_THIS_PTR dr7 & 0xff)
+#endif
+ ))
+ BX_CPU_THIS_PTR async_event = 0;
+
+ return 0; // Continue executing cpu_loop.
+}
+
+
+// boundaries of consideration:
+//
+// * physical memory boundary: 1024k (1Megabyte) (increments of...)
+// * A20 boundary: 1024k (1Megabyte)
+// * page boundary: 4k
+// * ROM boundary: 2k (dont care since we are only reading)
+// * segment boundary: any
+
+void BX_CPU_C::prefetch(void)
+{
+ bx_address temp_rip = RIP;
+ bx_address laddr = BX_CPU_THIS_PTR get_laddr(BX_SEG_REG_CS, temp_rip);
+ bx_phy_address pAddr;
+ unsigned pageOffset = PAGE_OFFSET(laddr);
+
+ // Calculate RIP at the beginning of the page.
+ BX_CPU_THIS_PTR eipPageBias = pageOffset - RIP;
+ BX_CPU_THIS_PTR eipPageWindowSize = 4096;
+
+#if BX_SUPPORT_X86_64
+ if (Is64BitMode()) {
+ if (! IsCanonical(RIP)) {
+ BX_ERROR(("prefetch: #GP(0): RIP crossed canonical boundary"));
+ exception(BX_GP_EXCEPTION, 0, 0);
+ }
+ }
+ else
+#endif
+ {
+ Bit32u temp_limit = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled;
+ if (((Bit32u) temp_rip) > temp_limit) {
+ BX_ERROR(("prefetch: EIP [%08x] > CS.limit [%08x]", (Bit32u) temp_rip, temp_limit));
+ exception(BX_GP_EXCEPTION, 0, 0);
+ }
+ if (temp_limit + BX_CPU_THIS_PTR eipPageBias < 4096) {
+ BX_CPU_THIS_PTR eipPageWindowSize = temp_limit + BX_CPU_THIS_PTR eipPageBias + 1;
+ }
+ }
+
+ bx_address lpf = LPFOf(laddr);
+ unsigned TLB_index = BX_TLB_INDEX_OF(lpf, 0);
+ bx_TLB_entry *tlbEntry = &BX_CPU_THIS_PTR TLB.entry[TLB_index];
+ Bit8u *fetchPtr = 0;
+
+ if (tlbEntry->lpf == lpf && (tlbEntry->accessBits & (0x01 << CPL))) {
+ pAddr = A20ADDR(tlbEntry->ppf | pageOffset);
+#if BX_SupportGuest2HostTLB
+ fetchPtr = (Bit8u*) (tlbEntry->hostPageAddr);
+#endif
+ }
+ else {
+ if (BX_CPU_THIS_PTR cr0.get_PG()) {
+ pAddr = translate_linear(laddr, CPL, BX_READ, CODE_ACCESS);
+ pAddr = A20ADDR(pAddr);
+ }
+ else {
+ pAddr = A20ADDR(laddr);
+ }
+ }
+
+ BX_CPU_THIS_PTR pAddrA20Page = LPFOf(pAddr);
+
+ if (fetchPtr) {
+ BX_CPU_THIS_PTR eipFetchPtr = fetchPtr;
+ }
+ else {
+ BX_CPU_THIS_PTR eipFetchPtr = BX_MEM(0)->getHostMemAddr(BX_CPU_THIS,
+ BX_CPU_THIS_PTR pAddrA20Page, BX_READ, CODE_ACCESS);
+ }
+
+ // Sanity checks
+ if (! BX_CPU_THIS_PTR eipFetchPtr) {
+ if (pAddr >= BX_MEM(0)->get_memory_len()) {
+ BX_PANIC(("prefetch: running in bogus memory, pAddr=0x" FMT_PHY_ADDRX, pAddr));
+ }
+ else {
+ BX_PANIC(("prefetch: getHostMemAddr vetoed direct read, pAddr=0x" FMT_PHY_ADDRX, pAddr));
+ }
+ }
+
+#if BX_SUPPORT_ICACHE
+ BX_CPU_THIS_PTR currPageWriteStampPtr = pageWriteStampTable.getPageWriteStampPtr(pAddr);
+ Bit32u pageWriteStamp = *(BX_CPU_THIS_PTR currPageWriteStampPtr);
+ pageWriteStamp &= ~ICacheWriteStampFetchModeMask; // Clear out old fetch mode bits
+ pageWriteStamp |= BX_CPU_THIS_PTR fetchModeMask; // And add new ones
+ pageWriteStampTable.setPageWriteStamp(pAddr, pageWriteStamp);
+#endif
+}
+
+void BX_CPU_C::boundaryFetch(const Bit8u *fetchPtr, unsigned remainingInPage, bxInstruction_c *i)
+{
+ unsigned j;
+ Bit8u fetchBuffer[16]; // Really only need 15
+ unsigned ret;
+
+ if (remainingInPage >= 15) {
+ BX_ERROR(("boundaryFetch #GP(0): too many instruction prefixes"));
+ exception(BX_GP_EXCEPTION, 0, 0);
+ }
+
+ // Read all leftover bytes in current page up to boundary.
+ for (j=0; jilen(),
+ BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b, Is64BitMode());
+}
+
+void BX_CPU_C::deliver_NMI(void)
+{
+ BX_CPU_THIS_PTR nmi_pending = 1;
+ BX_CPU_THIS_PTR async_event = 1;
+}
+
+void BX_CPU_C::deliver_SMI(void)
+{
+ BX_CPU_THIS_PTR smi_pending = 1;
+ BX_CPU_THIS_PTR async_event = 1;
+}
+
+#if BX_EXTERNAL_DEBUGGER
+void BX_CPU_C::ask(int level, const char *prefix, const char *fmt, va_list ap)
+{
+ char buf1[1024];
+ vsprintf (buf1, fmt, ap);
+ printf ("%s %s\n", prefix, buf1);
+ trap_debugger(1, BX_CPU_THIS);
+}
+#endif
+
+#if BX_DEBUGGER || BX_EXTERNAL_DEBUGGER || BX_GDBSTUB
+bx_bool BX_CPU_C::dbg_instruction_prolog(void)
+{
+#if BX_DEBUGGER
+ if(dbg_check_begin_instr_bpoint()) return 1;
+#endif
+
+#if BX_EXTERNAL_DEBUGGER
+ bx_external_debugger(BX_CPU_THIS);
+#endif
+
+ return 0;
+}
+
+bx_bool BX_CPU_C::dbg_instruction_epilog(void)
+{
+#if BX_DEBUGGER
+ if (dbg_check_end_instr_bpoint()) return 1;
+#endif
+
+#if BX_GDBSTUB
+ if (bx_dbg.gdbstub_enabled) {
+ unsigned reason = bx_gdbstub_check(EIP);
+ if (reason != GDBSTUB_STOP_NO_REASON) return 1;
+ }
+#endif
+
+ return 0;
+}
+#endif // BX_DEBUGGER || BX_EXTERNAL_DEBUGGER || BX_GDBSTUB
+
+#if BX_DEBUGGER
+extern unsigned dbg_show_mask;
+
+bx_bool BX_CPU_C::dbg_check_begin_instr_bpoint(void)
+{
+ Bit64u tt = bx_pc_system.time_ticks();
+ bx_address debug_eip = RIP;
+ Bit16u cs = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
+
+ BX_CPU_THIS_PTR guard_found.cs = cs;
+ BX_CPU_THIS_PTR guard_found.eip = debug_eip;
+ BX_CPU_THIS_PTR guard_found.laddr = BX_CPU_THIS_PTR get_laddr(BX_SEG_REG_CS, debug_eip);
+ BX_CPU_THIS_PTR guard_found.is_32bit_code =
+ BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b;
+ BX_CPU_THIS_PTR guard_found.is_64bit_code = Is64BitMode();
+
+ // support for 'show' command in debugger
+ if(dbg_show_mask) {
+ int rv = bx_dbg_show_symbolic();
+ if (rv) return(rv);
+ }
+
+ // see if debugger is looking for iaddr breakpoint of any type
+ if (bx_guard.guard_for & BX_DBG_GUARD_IADDR_ALL) {
+#if (BX_DBG_MAX_VIR_BPOINTS > 0)
+ if (bx_guard.guard_for & BX_DBG_GUARD_IADDR_VIR) {
+ if ((BX_CPU_THIS_PTR guard_found.icount!=0) ||
+ (tt != BX_CPU_THIS_PTR guard_found.time_tick))
+ {
+ for (unsigned i=0; i 0)
+ if (bx_guard.guard_for & BX_DBG_GUARD_IADDR_LIN) {
+ if ((BX_CPU_THIS_PTR guard_found.icount!=0) ||
+ (tt != BX_CPU_THIS_PTR guard_found.time_tick))
+ {
+ for (unsigned i=0; i 0)
+ if (bx_guard.guard_for & BX_DBG_GUARD_IADDR_PHY) {
+ bx_phy_address phy;
+ bx_bool valid = dbg_xlate_linear2phy(BX_CPU_THIS_PTR guard_found.laddr, &phy);
+ // The "guard_found.icount!=0" condition allows you to step or
+ // continue beyond a breakpoint. Bryce tried removing it once,
+ // and once you get to a breakpoint you are stuck there forever.
+ // Not pretty.
+ if (valid && ((BX_CPU_THIS_PTR guard_found.icount!=0) ||
+ (tt != BX_CPU_THIS_PTR guard_found.time_tick)))
+ {
+ for (unsigned i=0; i> bitnum); \
+ } \
+ BX_CPP_INLINE void set_##name (Bit8u val) { \
+ val32 = (val32&~(1<> 0);
+ }
+ BX_CPP_INLINE void set_PE (Bit8u val) {
+ printf("set_PE()\n");
+ val32 = (val32&~(1<<0)) | (val ? (1<<0) : 0);
+ }
+ IMPLEMENT_CRREG_ACCESSORS(MP, 1);
+ IMPLEMENT_CRREG_ACCESSORS(EM, 2);
+ IMPLEMENT_CRREG_ACCESSORS(TS, 3);
+#if BX_CPU_LEVEL >= 4
+ IMPLEMENT_CRREG_ACCESSORS(ET, 4);
+ IMPLEMENT_CRREG_ACCESSORS(NE, 5);
+ IMPLEMENT_CRREG_ACCESSORS(AM, 18);
+ IMPLEMENT_CRREG_ACCESSORS(WP, 16);
+ IMPLEMENT_CRREG_ACCESSORS(CD, 29);
+ IMPLEMENT_CRREG_ACCESSORS(NW, 30);
+#endif
+ IMPLEMENT_CRREG_ACCESSORS(PG, 31);
+
+ BX_CPP_INLINE Bit32u getRegister() { return val32; }
+ BX_CPP_INLINE void setRegister(Bit32u val) { if (val & 1) printf("setCR0 (PE)\n"); val32 = val; }
+};
+
+#if BX_CPU_LEVEL >= 4
+struct bx_cr4_t {
+ Bit32u val32; // 32bit value of register
+
+#if BX_SUPPORT_VME
+ IMPLEMENT_CRREG_ACCESSORS(VME, 0);
+ IMPLEMENT_CRREG_ACCESSORS(PVI, 1);
+#endif
+ IMPLEMENT_CRREG_ACCESSORS(TSD, 2);
+ IMPLEMENT_CRREG_ACCESSORS(DE, 3);
+ IMPLEMENT_CRREG_ACCESSORS(PSE, 4);
+ IMPLEMENT_CRREG_ACCESSORS(PAE, 5);
+ IMPLEMENT_CRREG_ACCESSORS(MCE, 6);
+ IMPLEMENT_CRREG_ACCESSORS(PGE, 7);
+ IMPLEMENT_CRREG_ACCESSORS(PCE, 8);
+ IMPLEMENT_CRREG_ACCESSORS(OSFXSR, 9);
+ IMPLEMENT_CRREG_ACCESSORS(OSXMMEXCPT, 10);
+#if BX_SUPPORT_XSAVE
+ IMPLEMENT_CRREG_ACCESSORS(OSXSAVE, 18);
+#endif
+
+ BX_CPP_INLINE Bit32u getRegister() { return val32; }
+ BX_CPP_INLINE void setRegister(Bit32u val) { val32 = val; }
+};
+#endif // #if BX_CPU_LEVEL >= 4
+
+#if BX_SUPPORT_VME
+ #define CR4_VME_ENABLED (BX_CPU_THIS_PTR cr4.get_VME())
+#else
+ #define CR4_VME_ENABLED (0)
+#endif
+
+#if BX_SUPPORT_X86_64
+
+struct bx_efer_t {
+ Bit32u val32; // 32bit value of register
+
+ IMPLEMENT_CRREG_ACCESSORS(SCE, 0);
+ IMPLEMENT_CRREG_ACCESSORS(LME, 8);
+ IMPLEMENT_CRREG_ACCESSORS(LMA, 10);
+ IMPLEMENT_CRREG_ACCESSORS(NXE, 11);
+ IMPLEMENT_CRREG_ACCESSORS(FFXSR, 14);
+
+ BX_CPP_INLINE Bit32u getRegister() { return val32; }
+ BX_CPP_INLINE void setRegister(Bit32u val) { val32 = val; }
+};
+
+#define BX_EFER_LMA_MASK (1<<10)
+#define BX_EFER_SUPPORTED_BITS BX_CONST64(0x00004d01)
+
+#endif
+
+#if BX_SUPPORT_XSAVE
+struct xcr0_t {
+ Bit32u val32; // 32bit value of register
+
+#define BX_XCR0_SUPPORTED_BITS 0x3
+
+#define BX_XCR0_FPU_BIT 0
+#define BX_XCR0_FPU_MASK (1<
trunk/src/bochs-diff-2.3.7/cpu/crregs.h
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: trunk/src/bochs-diff-2.3.7/cpu/bcd.cc
===================================================================
--- trunk/src/bochs-diff-2.3.7/cpu/bcd.cc (nonexistent)
+++ trunk/src/bochs-diff-2.3.7/cpu/bcd.cc (revision 39)
@@ -0,0 +1,208 @@
+/////////////////////////////////////////////////////////////////////////
+// $Id: bcd.cc,v 1.1 2008-11-14 03:31:23 zeus Exp $
+/////////////////////////////////////////////////////////////////////////
+//
+// Copyright (C) 2002 MandrakeSoft S.A.
+//
+// MandrakeSoft S.A.
+// 43, rue d'Aboukir
+// 75002 Paris - France
+// http://www.linux-mandrake.com/
+// http://www.mandrakesoft.com/
+//
+// This library is free software; you can redistribute it and/or
+// modify it under the terms of the GNU Lesser General Public
+// License as published by the Free Software Foundation; either
+// version 2 of the License, or (at your option) any later version.
+//
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+// Lesser General Public License for more details.
+//
+// You should have received a copy of the GNU Lesser General Public
+// License along with this library; if not, write to the Free Software
+// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+/////////////////////////////////////////////////////////////////////////
+
+#define NEED_CPU_REG_SHORTCUTS 1
+#include "bochs.h"
+#include "cpu.h"
+#define LOG_THIS BX_CPU_THIS_PTR
+
+void BX_CPP_AttrRegparmN(1) BX_CPU_C::AAA(bxInstruction_c *)
+{
+ /*
+ * Note: This instruction incorrectly documented in Intel's materials.
+ * The right description is:
+ *
+ * IF (((AL and 0FH) > 9) or (AF==1)
+ * THEN
+ * IF CPU<286 THEN { AL <- AL+6 }
+ * ELSE { AX <- AX+6 }
+ * AH <- AH+1
+ * CF <- 1
+ * AF <- 1
+ * ELSE
+ * CF <- 0
+ * AF <- 0
+ * ENDIF
+ * AL <- AL and 0Fh
+ */
+
+ /* Validated against Intel Pentium family hardware. */
+
+ /* AAA affects the following flags: A,C */
+
+ if (((AL & 0x0f) > 9) || get_AF())
+ {
+ AX = AX + 0x106;
+ assert_AF();
+ assert_CF();
+ }
+ else {
+ clear_AF();
+ clear_CF();
+ }
+
+ AL = AL & 0x0f;
+
+ /* AAA affects also the following flags: Z,S,O,P */
+ /* modification of the flags is undocumented */
+
+ /* The following behaviour seems to match the P6 and
+ its derived processors. */
+ clear_OF();
+ clear_SF(); /* sign is always 0 because bits 4-7 of AL are zeroed */
+ set_ZF(AL == 0);
+ set_PF_base(AL);
+}
+
+void BX_CPP_AttrRegparmN(1) BX_CPU_C::AAS(bxInstruction_c *)
+{
+ /* AAS affects the following flags: A,C */
+
+ if (((AL & 0x0F) > 0x09) || get_AF())
+ {
+ AX = AX - 0x106;
+ assert_AF();
+ assert_CF();
+ }
+ else {
+ clear_CF();
+ clear_AF();
+ }
+
+ AL = AL & 0x0f;
+
+ /* AAS affects also the following flags: Z,S,O,P */
+ /* modification of the flags is undocumented */
+
+ /* The following behaviour seems to match the P6 and
+ its derived processors. */
+ clear_OF();
+ clear_SF(); /* sign is always 0 because bits 4-7 of AL are zeroed */
+ set_ZF(AL == 0);
+ set_PF_base(AL);
+}
+
+void BX_CPP_AttrRegparmN(1) BX_CPU_C::AAM(bxInstruction_c *i)
+{
+ Bit8u al, imm8 = i->Ib();
+
+ if (imm8 == 0)
+ exception(BX_DE_EXCEPTION, 0, 0);
+
+ al = AL;
+ AH = al / imm8;
+ AL = al % imm8;
+
+ /* modification of flags A,C,O is undocumented */
+ /* The following behaviour seems to match the P6 and
+ its derived processors. */
+ SET_FLAGS_OSZAPC_LOGIC_8(AL);
+}
+
+void BX_CPP_AttrRegparmN(1) BX_CPU_C::AAD(bxInstruction_c *i)
+{
+ Bit16u tmp = AH;
+ tmp *= i->Ib();
+ tmp += AL;
+
+ AX = (tmp & 0xff);
+
+ /* modification of flags A,C,O is undocumented */
+ /* The following behaviour seems to match the P6 and
+ its derived processors. */
+ SET_FLAGS_OSZAPC_LOGIC_8(AL);
+}
+
+void BX_CPP_AttrRegparmN(1) BX_CPU_C::DAA(bxInstruction_c *)
+{
+ Bit8u tmpAL = AL;
+ int tmpCF = 0;
+
+ /* Validated against Intel Pentium family hardware. */
+
+ // DAA affects the following flags: S,Z,A,P,C
+
+ if (((tmpAL & 0x0F) > 0x09) || get_AF())
+ {
+ tmpCF = ((AL > 0xF9) || get_CF());
+ AL = AL + 0x06;
+ assert_AF();
+ }
+ else
+ clear_AF();
+
+ if ((tmpAL > 0x99) || get_CF())
+ {
+ AL = AL + 0x60;
+ tmpCF = 1;
+ }
+/* else
+ tmpCF = 0;
+*/
+ clear_OF(); /* undocumented flag modification */
+ set_SF(AL >= 0x80);
+ set_ZF(AL==0);
+ set_PF_base(AL);
+ set_CF(tmpCF);
+}
+
+void BX_CPP_AttrRegparmN(1) BX_CPU_C::DAS(bxInstruction_c *)
+{
+ /* The algorithm for DAS is fashioned after the pseudo code in the
+ * Pentium Processor Family Developer's Manual, volume 3. It seems
+ * to have changed from earlier processor's manuals. I'm not sure
+ * if this is a correction in the algorithm printed, or Intel has
+ * changed the handling of instruction. Validated against Intel
+ * Pentium family hardware.
+ */
+
+ Bit8u tmpAL = AL;
+ int tmpCF = 0;
+
+ /* DAS effect the following flags: A,C,S,Z,P */
+
+ if (((tmpAL & 0x0F) > 0x09) || get_AF())
+ {
+ tmpCF = (AL < 0x06) || get_CF();
+ AL = AL - 0x06;
+ assert_AF();
+ }
+ else
+ clear_AF();
+
+ if ((tmpAL > 0x99) || get_CF())
+ {
+ AL = AL - 0x60;
+ tmpCF = 1;
+ }
+
+ clear_OF(); /* undocumented flag modification */
+ set_SF(AL >= 0x80);
+ set_ZF(AL==0);
+ set_PF_base(AL);
+ set_CF(tmpCF);
+}
Index: trunk/src/bochs-diff-2.3.7/instrument/zet/Makefile.in
===================================================================
--- trunk/src/bochs-diff-2.3.7/instrument/zet/Makefile.in (nonexistent)
+++ trunk/src/bochs-diff-2.3.7/instrument/zet/Makefile.in (revision 39)
@@ -0,0 +1,77 @@
+# Copyright (C) 2001 MandrakeSoft S.A.
+#
+# MandrakeSoft S.A.
+# 43, rue d'Aboukir
+# 75002 Paris - France
+# http://www.linux-mandrake.com/
+# http://www.mandrakesoft.com/
+#
+# This library is free software; you can redistribute it and/or
+# modify it under the terms of the GNU Lesser General Public
+# License as published by the Free Software Foundation; either
+# version 2 of the License, or (at your option) any later version.
+#
+# This library is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public
+# License along with this library; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+
+@SUFFIX_LINE@
+
+srcdir = @srcdir@
+VPATH = @srcdir@
+
+SHELL = /bin/sh
+
+@SET_MAKE@
+
+CC = @CC@
+CFLAGS = @CFLAGS@
+CXX = @CXX@
+CXXFLAGS = @CXXFLAGS@
+
+LDFLAGS = @LDFLAGS@
+LIBS = @LIBS@
+RANLIB = @RANLIB@
+
+
+# ===========================================================
+# end of configurable options
+# ===========================================================
+
+
+BX_OBJS = \
+ instrument.o
+
+BX_INCLUDES =
+
+BX_INCDIRS = -I../.. -I$(srcdir)/../.. -I. -I$(srcdir)/.
+
+.@CPP_SUFFIX@.o:
+ $(CXX) -c $(CXXFLAGS) $(BX_INCDIRS) @CXXFP@$< @OFP@$@
+
+
+.c.o:
+ $(CC) -c $(CFLAGS) $(BX_INCDIRS) @CFP@$< @OFP@$@
+
+
+
+libinstrument.a: $(BX_OBJS)
+ @RMCOMMAND@ libinstrument.a
+ @MAKELIB@ $(BX_OBJS)
+ $(RANLIB) libinstrument.a
+
+$(BX_OBJS): $(BX_INCLUDES)
+
+
+clean:
+ @RMCOMMAND@ *.o
+ @RMCOMMAND@ *.a
+
+dist-clean: clean
+ @RMCOMMAND@ Makefile
Index: trunk/src/bochs-diff-2.3.7/instrument/zet/instrument.cc
===================================================================
--- trunk/src/bochs-diff-2.3.7/instrument/zet/instrument.cc (nonexistent)
+++ trunk/src/bochs-diff-2.3.7/instrument/zet/instrument.cc (revision 39)
@@ -0,0 +1,295 @@
+/////////////////////////////////////////////////////////////////////////
+// $Id: instrument.cc,v 1.1 2008-11-14 03:31:25 zeus Exp $
+/////////////////////////////////////////////////////////////////////////
+//
+// Copyright (C) 2001 MandrakeSoft S.A.
+//
+// MandrakeSoft S.A.
+// 43, rue d'Aboukir
+// 75002 Paris - France
+// http://www.linux-mandrake.com/
+// http://www.mandrakesoft.com/
+//
+// This library is free software; you can redistribute it and/or
+// modify it under the terms of the GNU Lesser General Public
+// License as published by the Free Software Foundation; either
+// version 2 of the License, or (at your option) any later version.
+//
+// This library is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+// Lesser General Public License for more details.
+//
+// You should have received a copy of the GNU Lesser General Public
+// License along with this library; if not, write to the Free Software
+// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+
+#include
+#include