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https://opencores.org/ocsvn/or1k/or1k/trunk
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- This comparison shows the changes necessary to convert path
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- from Rev 385 to Rev 386
- ↔ Reverse comparison
Rev 385 → Rev 386
/trunk/or1200/rtl/verilog/generic_spram_512x20.v
62,6 → 62,9
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.8 2001/11/23 21:42:31 simons |
// Program counter divided to PPC and NPC. |
// |
// Revision 1.6 2001/10/21 17:57:16 lampret |
// Removed params from generic_XX.v. Added translate_off/on in sprs.v and id.v. Removed spr_addr from dc.v and ic.v. Fixed CR+LF. |
// |
182,7 → 185,11
// |
// Virtual Silicon Single-Port Synchronous SRAM |
// |
`ifdef UNUSED |
virtualsilicon_ssp #(1<<aw, aw-1, dw-1) virtualsilicon_ssp( |
`else |
virtualsilicon_ssp virtualsilicon_ssp( |
`endif |
.CK(clk), |
.ADR(addr), |
.DI(di), |
205,62 → 212,36
// |
// Block 0 |
// |
RAMB4_S4 ramb4_s4_0( |
RAMB4_S8 ramb4_s8_0( |
.CLK(clk), |
.RST(rst), |
.ADDR(addr), |
.DI(di[3:0]), |
.DI(di[7:0]), |
.EN(ce), |
.WE(we), |
.DO(do[3:0]) |
.DO(do[7:0]) |
); |
|
// |
// Block 1 |
// |
RAMB4_S4 ramb4_s4_1( |
RAMB4_S8 ramb4_s8_1( |
.CLK(clk), |
.RST(rst), |
.ADDR(addr), |
.DI(di[7:4]), |
.DI(di[15:8]), |
.EN(ce), |
.WE(we), |
.DO(do[7:4]) |
.DO(do[15:8]) |
); |
|
// |
// Block 2 |
// |
RAMB4_S4 ramb4_s4_2( |
RAMB4_S8 ramb4_s8_2( |
.CLK(clk), |
.RST(rst), |
.ADDR(addr), |
.DI(di[11:8]), |
.EN(ce), |
.WE(we), |
.DO(do[11:8]) |
); |
|
// |
// Block 3 |
// |
RAMB4_S4 ramb4_s4_3( |
.CLK(clk), |
.RST(rst), |
.ADDR(addr), |
.DI(di[15:12]), |
.EN(ce), |
.WE(we), |
.DO(do[15:12]) |
); |
|
// |
// Block 4 |
// |
RAMB4_S4 ramb4_s4_4( |
.CLK(clk), |
.RST(rst), |
.ADDR(addr), |
.DI(di[19:16]), |
.EN(ce), |
.WE(we), |