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URL https://opencores.org/ocsvn/or1k/or1k/trunk

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  • This comparison shows the changes necessary to convert path
    /
    from Rev 393 to Rev 394
    Reverse comparison

Rev 393 → Rev 394

/trunk/or1ksim/sim-config.h
86,8 → 86,8
struct {
char memory_table_file[STR_SIZE]; /* Memory table filename */
int pattern; /* A user specified memory initialization pattern */
int random_seed; /* Initialize the memory with random values, starting with seed */
int pattern; /* A user specified memory initialization pattern */
int random_seed; /* Initialize the memory with random values, starting with seed */
enum {
MT_UNKNOWN,
MT_PATTERN,
100,11 → 100,9
unsigned long ver, rev; /* Version register */
int superscalar; /* superscalara analysis */
int hazards; /* dependency hazards analysis */
int history; /* instruction stream history analysis */
int dependstats; /* dependency statistics */
int dependency; /* not sure: same as dependency statistics? */
int slp; /* not sure: stack analisys? */
int btic; /* branch prediction target insn cache analysis */
int slp; /* subroutine level parallelism */
int btic; /* branch prediction target insn cache analysis */
int bpb; /* branch prediction buffer analysis */
} cpu;
115,7 → 113,8
 
int profile; /* Is profiler running */
char prof_fn[STR_SIZE]; /* Profiler filename */
 
int history; /* instruction stream history analysis */
int exe_log; /* Print out RTL states? */
char exe_log_fn[STR_SIZE]; /* RTL state comparison filename */
} sim;
/trunk/or1ksim/sim.cfg
108,7 → 108,12
prof_fn = "<filename>"
filename, where to generate profiling info, used
only if 'profile' is set
history = 0/1
whether instruction execution flow is tracked for
display by simulator hist command. Useful for
back-trace debugging.
iprompt = 0/1
whether we strart in interactive prompt
 
126,6 → 131,7
profile = 0
prof_fn = "sim.profile"
history = 1
/* iprompt = 0 */
exe_log = 0
exe_log_fn = "executed.log"
177,19 → 183,10
whether data hazards are tracked in superscalar CPU
and displayed by the simulator r command
 
history = 0/1
whether instruction execution flow is tracked for
display by simulator hist command. Useful for
back-trace debugging.
 
dependstats = 0/1
whether inter-instruction dependencies are calculated
and displayed by simulator stats command.
 
dependency = 0/1
whether inter-instruction dependencies are calculated
and displayed by simulator stats command.
 
slp = 0/1
calculation of subroutine level parallelism. Displayed
by simulator stats command.
209,9 → 206,7
/* upr = */
superscalar = 0
hazards = 0
history = 1
dependstats = 0
dependency = 0
slp = 0
btic = 0
bpb = 0
/trunk/or1ksim/cpu/or32/execute.c
490,11 → 490,11
 
inline void analysis()
{
if (config.cpu.dependency)
if (config.cpu.dependstats)
/* Instruction waits in completition buffer until retired. */
memcpy (&icomplet[0], &iqueue[0], sizeof (struct iqueue_entry));
 
if (config.cpu.history) {
if (config.sim.history) {
int i;
 
/* History of execution */
/trunk/or1ksim/toplevel.c
52,7 → 52,7
#include "gdbcomm.h"
 
/* CVS revision number. */
const char rcsrev[] = "$Revision: 1.46 $";
const char rcsrev[] = "$Revision: 1.47 $";
 
/* Continuos run versus single step tracing switch. */
int cont_run;
225,10 → 225,10
}
/* Enable dependency stats, if we want to do history analisis */
if (config.cpu.history && !config.cpu.dependency) {
config.cpu.dependency = 1;
if (config.sim.history && !config.cpu.dependstats) {
config.cpu.dependstats = 1;
if (config.sim.verbose)
fprintf (stderr, "WARNING: dependency stats must be enabled to do history analisis.\n");
fprintf (stderr, "WARNING: dependstats stats must be enabled to do history analisis.\n");
}
/* Debug forces verbose */
/trunk/or1ksim/sim-config.c
77,10 → 77,9
/* CPU */
config.cpu.superscalar = 0;
config.cpu.history = 0;
config.sim.history = 0;
config.cpu.hazards = 0;
config.cpu.dependstats = 0;
config.cpu.dependency = 0;
config.cpu.slp = 0;
config.cpu.upr = SPR_UPR_UP | SPR_UPR_DCP | SPR_UPR_ICP | SPR_UPR_DMP
| SPR_UPR_IMP | SPR_UPR_OB32P | SPR_UPR_DUP | SPR_UPR_PICP
337,10 → 336,8
{5, 0, "rev", "=0x%x", NULL, (void *)(&config.cpu.rev)},
{5, 0, "upr", "=0x%x", NULL, (void *)(&config.cpu.upr)},
{5, 0, "hazards", "=%i", NULL, (void *)(&config.cpu.hazards)},
{5, 0, "history", "=%i", NULL, (void *)(&config.cpu.history)},
{5, 0, "superscalar", "=%i", NULL, (void *)(&config.cpu.superscalar)},
{5, 0, "dependstats", "=%i", NULL, (void *)(&config.cpu.dependstats)},
{5, 0, "dependency", "=%i", NULL, (void *)(&config.cpu.dependency)},
{5, 0, "slp", "=%i", NULL, (void *)(&config.cpu.slp)},
{5, 0, "bpb", "=%i", NULL, (void *)(&config.cpu.bpb)},
{5, 0, "btic", "=%i", NULL, (void *)(&config.cpu.btic)},
350,7 → 347,7
{6, 0, "verbose", "=%i", NULL, (void *)(&config.sim.verbose)},
{6, 0, "profile", "=%i", NULL, (void *)(&config.sim.profile)},
{6, 0, "prof_fn", "=\"%s\"", NULL, (void *)(&config.sim.prof_fn[0])},
 
{6, 0, "history", "=%i", NULL, (void *)(&config.sim.history)},
{6, 0, "exe_log", "=%i", NULL, (void *)(&config.sim.exe_log)},
{6, 0, "exe_log_fn", "=\"%s\"", NULL, (void *)(&config.sim.exe_log_fn[0])},
 

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