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    from Rev 398 to Rev 399
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Rev 398 → Rev 399

/openrisc/trunk/gnu-src/gcc-4.5.1/libgcc/config.host
446,6 → 446,8
;;
or32-*-elf)
;;
or32-*linux*)
;;
pdp11-*-*)
;;
picochip-*-*)
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.c-torture/execute/pr44858.c File deleted
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.c-torture/execute/pr45262.c File deleted
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.c-torture/execute/pr45034.c File deleted
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.c-torture/compile/pr45109.c File deleted
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.target/i386/pr45296.c File deleted
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/pr45055.c File deleted
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/pr45259.c File deleted
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/builtin-apply3.c
25,6 → 25,8
 
int main(void)
{
char dummy[16]; /* Make sure we have 16 bytes of stack to copy. */
 
bar(INTEGER_ARG);
 
return 0;
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/debug/dwarf2/inline2.c
14,7 → 14,7
properly nested DW_TAG_inlined_subroutine DIEs for third, second and first.
*/
 
/* { dg-options "-O -g3 -dA" } */
/* { dg-options "-O -g3 -gdwarf-2 -dA" } */
/* { dg-do compile } */
 
/* There are 6 inlined subroutines:
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/debug/dwarf2/inline3.c
1,7 → 1,7
/* Verify that only one DW_AT_const_value is emitted for baz,
not for baz abstract DIE and again inside of
DW_TAG_inlined_subroutine. */
/* { dg-options "-O2 -g -dA" } */
/* { dg-options "-O2 -gdwarf-2 -dA" } */
/* { dg-do compile } */
/* { dg-final { scan-assembler-times " DW_AT_const_value" 1 } } */
 
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/debug/dwarf2/struct-loc1.c
1,5 → 1,5
/* { dg-do compile } */
/* { dg-options "-g -O0 -dA -fno-merge-debug-strings" } */
/* { dg-options "-gdwarf-2 -O0 -dA -fno-merge-debug-strings" } */
 
struct foo;
struct foo *obj;
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-1.c
2,7 → 2,7
/* Test that token after multi-line function-like macro use
gets correct locus even when preprocessing separately. */
/* { dg-do compile } */
/* { dg-options "-save-temps -g -O0 -dA -fno-merge-debug-strings" } */
/* { dg-options "-save-temps -gdwarf-2 -O0 -dA -fno-merge-debug-strings" } */
 
#define A(a,b)
int varh;A(1,
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-2.c
1,6 → 1,6
/* PR preprocessor/41445 */
/* { dg-do compile } */
/* { dg-options "-g -O0 -dA -fno-merge-debug-strings" } */
/* { dg-options "-gdwarf-2 -O0 -dA -fno-merge-debug-strings" } */
 
#include "pr41445-1.c"
 
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-3.c
2,7 → 2,7
/* Test that token after multi-line function-like macro use
gets correct locus even when preprocessing separately. */
/* { dg-do compile } */
/* { dg-options "-save-temps -g -O0 -dA -fno-merge-debug-strings" } */
/* { dg-options "-save-temps -gdwarf-2 -O0 -dA -fno-merge-debug-strings" } */
 
#define A(a,b)
int varh;/*
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-4.c
1,6 → 1,6
/* PR preprocessor/41445 */
/* { dg-do compile } */
/* { dg-options "-g -O0 -dA -fno-merge-debug-strings" } */
/* { dg-options "-gdwarf-2 -O0 -dA -fno-merge-debug-strings" } */
 
#include "pr41445-3.c"
 
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-5.c
2,7 → 2,7
/* Test that token after multi-line function-like macro use
gets correct locus even when preprocessing separately. */
/* { dg-do compile } */
/* { dg-options "-save-temps -g -O0 -dA -fno-merge-debug-strings" } */
/* { dg-options "-save-temps -gdwarf-2 -O0 -dA -fno-merge-debug-strings" } */
 
#define A(x) vari x
#define vari(x)
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/debug/dwarf2/pr41445-6.c
1,6 → 1,6
/* PR preprocessor/41445 */
/* { dg-do compile } */
/* { dg-options "-g -O0 -dA -fno-merge-debug-strings" } */
/* { dg-options "-gdwarf-2 -O0 -dA -fno-merge-debug-strings" } */
 
#include "pr41445-5.c"
 
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/debug/dwarf2/pr37726.c
1,6 → 1,6
/* PR debug/37726 */
/* { dg-do compile } */
/* { dg-options "-g -O0 -dA -fno-merge-debug-strings" } */
/* { dg-options "-gdwarf-2 -O0 -dA -fno-merge-debug-strings" } */
 
int foo (int parm)
{
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/debug/dwarf2/global-used-types.c
1,6 → 1,6
/*
Contributed by Dodji Seketeli <dodji@redhat.com>
{ dg-options "-g -dA -fno-merge-debug-strings" }
{ dg-options "-gdwarf-2 -dA -fno-merge-debug-strings" }
{ dg-do compile }
{ dg-final { scan-assembler-times "DIE \\(0x.*?\\) DW_TAG_enumeration_type" 1 } }
{ dg-final { scan-assembler-times "DIE \\(0x.*?\\) DW_TAG_enumerator" 2 } }
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/builtin-stringop-chk-1.c
104,8 → 104,8
S *s[3];
memset (s, 0, sizeof (S) * 3); /* { dg-warning "will always overflow" "memset" } */
 
struct T { char a[8]; char b[4]; char c[10]; } t;
stpcpy (t.c,"Testing..."); /* { dg-warning "will always overflow" "stpcpy" } */
struct T { char a[8]; char b[4]; char c[10]; } t; /* or32 pads this to 12 bytes, and __builtin_object_size (t.c, 0) gives the size of the full object. */
stpcpy (t.c,"Testing..."); /* { dg-warning "will always overflow" "stpcpy" { target { ! or32-*-* } } } */
 
char b1[7];
char b2[4];
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/torture/pr37868.c
1,6 → 1,7
/* { dg-do run } */
/* { dg-options "-fno-strict-aliasing" } */
/* { dg-skip-if "unaligned access" { sparc*-*-* } "*" "" } */
/* { dg-skip-if "alignment exception" { or32*-*-* } "*" "" } */
 
extern void abort (void);
#if (__SIZEOF_INT__ <= 2)
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/tree-ssa/pr44258.c
15,7 → 15,7
struct val
{
char y;
struct blah b2;
struct blah b2 __attribute__((packed)); /* { dg-warning "attribute ignored" "" { target { ! or32-*-* } } } */
};
 
union U
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/20020312-2.c
48,6 → 48,8
/* No pic register. */
#elif defined(__moxie__)
/* No pic register. */
#elif defined(__or32__)
/* No pic register. */
#elif defined(__hppa__)
/* PIC register is %r27 or %r19, but is used even without -fpic. */
#elif defined(__pdp11__)
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gcc.dg/builtin-apply2.c
1,5 → 1,5
/* { dg-do run } */
/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "avr-*-*" } { "*" } { "" } } */
/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "avr-*-*" "or32-*-*" } { "*" } { "" } } */
/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { "arm*-*-*" } { "-mfloat-abi=hard" } { "" } } */
 
/* PR target/12503 */
27,6 → 27,8
 
int main(void)
{
char dummy[64]; /* Make sure we have 64 bytes of stack to copy. */
 
bar("eeee", 5.444567, 8.90765, 4.567789, INTEGER_ARG);
 
return 0;
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/g++.dg/pr45112.C File deleted
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/g++.dg/other/i386-8.C File deleted
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/g++.dg/tree-ssa/pr44914.C File deleted
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/g++.dg/ext/strncpy-chk1.C
2,13 → 2,13
// { dg-do compile }
// { dg-options "-O2" }
 
struct A { char x[12], y[35]; };
struct A { char x[12], y[35]; }; // change to y[32] to get warning on or32
struct B { char z[50]; };
 
inline void
foo (char *dest, const char *__restrict src, __SIZE_TYPE__ n)
{
__builtin___strncpy_chk (dest, src, n, __builtin_object_size (dest, 0)); // { dg-warning "will always overflow" }
__builtin___strncpy_chk (dest, src, n, __builtin_object_size (dest, 0)); // { dg-warning "will always overflow" "" { target { ! or32-*-* } } }
}
 
void bar (const char *, int);
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/g++.dg/abi/packed1.C
4,7 → 4,7
 
extern "C" void abort ();
 
struct INNER { // { dg-warning "inefficient.*vptr" "" { target alpha*-*-* ia64-*-* hppa*-*-* sparc*-*-* sh*-*-* } }
struct INNER { // { dg-warning "inefficient.*vptr" "" { target alpha*-*-* ia64-*-* hppa*-*-* sparc*-*-* sh*-*-* or32-*-* } }
virtual int foo() const { return 1; }
} __attribute__ ((packed));
 
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/g++.dg/init/value8.C File deleted
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/lib/target-supports.exp
519,6 → 519,7
|| [istarget mep-*-elf]
|| [istarget mips*-*-elf*]
|| [istarget moxie-*-elf*]
|| [istarget or32-*-elf*]
|| [istarget rx-*-*]
|| [istarget xstormy16-*]
|| [istarget xtensa*-*-elf]
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/testsuite/gfortran.dg/allocate_derived_3.f90 File deleted
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/ChangeLog.or32
1,3 → 1,155
2010-10-29 Joern Rennecke <joern.rennecke@embecosm.com>
 
* config/or32/or32.c (or32_output_mi_thunk): New function.
(or32_output_highadd, or32_output_tailcall): Likewise.
(TARGET_ASM_OUTPUT_MI_THUNK): Redefine.
(TARGET_ASM_CAN_OUTPUT_MI_THUNK): Likewise.
 
(or32_output_mi_thunk): Don't emit add of zero delta.
 
* config/or32/or32.opt: Remove -maj option.
* config/or32/or32.md, config/or32/or32.c: Likewise.
 
* config.gcc: Add Embecosm Copyright notice.
* config/or32/predicates.md: Likewise.
* config/or32/or32.md: Likewise.
* config/or32/t-or32: Likewise.
* config/or32/or32.opt: Likewise.
* config/or32/or32-protos.h: Likewise.
* config/or32/crti.S: Likewise.
* config/or32/or32.c: Likewise.
* config/or32/constraints.md: Likewise.
* config/or32/crtn.S: Likewise.
* config/or32/default.h: Likewise.
* config/or32/or32.h: Likewise.
 
2010-10-28 Joern Rennecke <joern.rennecke@embecosm.com>
 
* config/or32/or32.md (movsi_lo_sum, movsi_high): Enable generator
function generation.
(movsi_insn_big): Now define_insn_and_split.
 
* config.gcc (or32-*-elf*): Change extra_parts to:
"crti.o crtbegin.o crtend.o crtn.o".
( or32-*linux*): Change tmake_file to
"${cpu_type}/t-${cpu_type} or32/t-linux"
* config/or32/t-default, config/or32/initfini.c: Delete.
* t-or32 ((T)or32-crtbegin.o, $(T)or32-crtend.o): Replace with:
((T)crti.o, $(T)crtn.o).
* config/or32/t-linux: New file.
* config/or32/crti.S, config/or32/crtn.S: Likewise.
* config/or32/or32.h (STARTFILE_SPEC): Replace or32-crtbegin.o%s with
crti.o%s crtbegin.o%s.
(ENDFILE_SPEC): Set to crtend.o%s crtn.o%s.
 
* config/or32/elf.h (DBX_DEBUGGING_INFO): Don't redefine.
(PREFERRED_DEBUGGING_TYPE, PUT_SDB_DEF): Likewise.
 
* config/or32/or32.md (tablejump): For -fpic, emit add of table base.
 
2010-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
 
* config.gcc (or32-*-elf*): Rename crtinit.o / crtfini.o
to or32-crtbegin.o / or32-crtend.o.
* config/or32/t-default, config/or32/t-or32 (Entire file): Likewise.
* config/or32/initfini.c, config/or32/or32.h: Likewise.
 
2010-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
 
* config/or32/or32.opt Mask(MASK_SCHED_LOGUE): Renamed to
Mask(SCHED_LOGUE). Changed all users.
(-msibcall): Delete option.
* config/or32/or32.md (sibcall, sibcall_value, sibcall_internal): Make
patterns unconditional.
(sibcall_internal): Change alternatives to handle callee-saved
registers correctly.
* config/or32/or32.c (or32_compute_frame_size): Place register save
area at bottom of frame.
(or32_expand_prologue): Initialize frame pointer from stack pointer.
For large offsets, add a REG_FRAME_RELATED_EXPR note.
(or32_expand_epilogue): Restore stack pointer from frame pointer.
sibcall is now the sibcall epilogue insn to be split.
(or32_compute_frame_size, or32_expand_prologue, or32_expand_epilogue):
Use PROLOGUE_TMP and EPILOGUE_TMP.
(or32_function_ok_for_sibcall): Retrun true.
(TARGET_DEFAULT_TARGET_FLAGS): Include MASK_SCHED_LOGUE.
(STATIC_CHAIN_REGNUM): Change to GP_ARG_RETURNH.
(PROLOGUE_TMP, EPILOGUE_TMP): Define.
* config/or32/or32.md (CC_REG): New constant. Use it to denote
register number of flags register.
Include constraints.md.
* config/or32/predicates.md (cc_reg_operand): Use CC_REG.
(input_operand): Use satisfies_constraint_[KMI].
* config/or32/or32-protos.h (or32_initial_elimination_offset): Declare.
(or32_print_jump_restore): Declare.
* config/or32/or32.h (OR32_LAST_ACTUAL_REG): Define. Use in place of
OR32_LAST_INT_REG to iterate through registers where appropriate.
(ELIMINABLE_REGS, INITIAL_ELIMINATION_OFFSET): Define.
(ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM): Define as fake hard
registers.
(FIXED_REGISTERS, CALL_USED_REGISTERS, REG_CLASS_CONTENTS): Update.
(REGNO_REG_CLASS, REGISTER_NAMES): : Likewise.
* config/or32/or32.c: Use HARD_FRAME_POINTER_REGNUM /
hard_frame_pointer_rtx to refer to the hard frame pointer.
(or32_emit_move): Now static.
(or32_print_jump_restore): New function.
(or32_compute_frame_size): Distinguish between saving the hard frame
pointer and saving the GPR with the regno of the eliminated frame
pointer.
(indexed_memory): Delete.
(stack_disp_mem): New function.
(or32_compute_frame_size): Avoid over-wide shifts.
(or32_output_function_prologue): Likewise.
(or32_output_function_epilogue): Likewise.
(or32_frame_pointer_required): Comment out.
(or32_initial_elimination_offset): New function.
(TARGET_FRAME_POINTER_REQUIRED): Don't redefine.
(PRINT_OPERAND): Handle %J.
* config/or32/constraints.md: New file.
 
2010-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
 
* config/or32/or32-protos.h (get_hard_reg_initial_val): Declare.
* config/or32/or32.h (INCOMING_RETURN_ADDR_RTX): Fix register number.
* (RETURN_ADDR_RTX): Define.
 
2010-10-12 Joern Rennecke <joern.rennecke@embecosm.com>
 
* config/or32/or32.c (or32_struct_alignment): Round up alignment to
power of two.
 
For unions, use maximum of field size for size estimate.
 
2010-10-11 Joern Rennecke <joern.rennecke@embecosm.com>
 
* config/or32/or32.opt (mpadstruct): New option.
* config/or32/or32-protos.h (or32_struct_alignment): Declare.
(or32_data_alignment): Likewise.
* config/or32/or32.c (or32_struct_alignment): New function.
(or32_data_alignment): Likewise.
* config/or32/or32.h (STRUCTURE_SIZE_BOUNDARY): Default to 8.
(ROUND_TYPE_ALIGN, DATA_ALIGNMENT, LOCAL_ALIGNMEN): Define.
 
* config/or32/or32.c (or32_struct_alignment): Take
maximum_field_alignment into account.
 
2010-09-14 Joern Rennecke <joern.rennecke@embecosm.com>
 
* config/or32/or32.h (ASM_OUTPUT_ADDR_DIFF_ELT): Fix typo.
(JUMP_TABLES_IN_TEXT_SECTION): Define.
* config/or32/default.h (JUMP_TABLES_IN_TEXT_SECTION): Use flag_pic.
 
2010-09-13 Joern Rennecke <joern.rennecke@embecosm.com>
 
* config/or32/or32.h (TRAMPOLINE_SIZE): Use result of
or32_trampoline_code_size rather than its address.
 
* config/or32/initfini.c (init): Rename to:
(__init).
* config/or32/or32.c (or32_trampoline_init): Don't clobber r12.
 
* config.gcc (or32-*-elf*): Add newlib-stdint.h to tm_file.
 
2010-09-05 Jeremy Bennett <jeremy.bennett@embecosm.com>
 
* BASE_VER: Updated for gcc-4.5.1-or32-1.0rc1.
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config.gcc
1,6 → 1,7
# GCC target-specific configuration file.
# Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
# 2008, 2009, 2010 Free Software Foundation, Inc.
# Copyright (C) 2010 Embecosm Limited
 
#This file is part of GCC.
 
1910,13 → 1911,13
use_gcc_stdint=wrap
;;
or32-*-elf*)
tm_file="${tm_file} dbxelf.h elfos.h ${cpu_type}/elf.h"
extra_parts="crtinit.o crtfini.o"
tm_file="${tm_file} dbxelf.h elfos.h newlib-stdint.h ${cpu_type}/elf.h"
extra_parts="crti.o crtbegin.o crtend.o crtn.o"
tmake_file=${cpu_type}/t-${cpu_type}
;;
or32-*linux*)
tm_file="${tm_file} dbxelf.h elfos.h or32/elf.h or32/linux-gas.h or32/linux-elf.h"
tmake_file=or32/t-default
tmake_file="${cpu_type}/t-${cpu_type} or32/t-linux"
;;
pdp11-*-*)
tm_file="${tm_file} newlib-stdint.h"
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.md.orig File deleted
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/initfini.c File deleted
openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/initfini.c Property changes : Deleted: svn:eol-style ## -1 +0,0 ## -native \ No newline at end of property Deleted: svn:keywords ## -1 +0,0 ## -Id \ No newline at end of property Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/t-default =================================================================== --- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/t-default (revision 398) +++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/t-default (nonexistent) @@ -1,50 +0,0 @@ -# -# t-default is Makefile fragment to be included when -# building gcc for or32 target -# - -# we don't support -g so don't use it -LIBGCC2_DEBUG_CFLAGS = - -TARGET_LIBGCC2_CFLAGS = -fomit-frame-pointer - -LIB1ASMSRC = or32/or32.S -LIB1ASMFUNCS = __mulsi3 __udivsi3 __divsi3 __umodsi3 __modsi3 - -# These are really part of libgcc1, but this will cause them to be -# built correctly, so... [taken from t-sparclite] -LIB2FUNCS_EXTRA = fp-bit.c dp-bit.c - -dp-bit.c: $(srcdir)/config/fp-bit.c - cat $(srcdir)/config/fp-bit.c > dp-bit.c - -fp-bit.c: $(srcdir)/config/fp-bit.c - echo '#define FLOAT' > fp-bit.c - cat $(srcdir)/config/fp-bit.c >> fp-bit.c - -# Build the libraries for both hard and soft floating point - -#MULTILIB_OPTIONS = msoft-float -#MULTILIB_DIRNAMES = soft-float - -#LIBGCC = stmp-multilib -#INSTALL_LIBGCC = install-multilib - -#LIBGCC = -#INSTALL_LIBGCC = - -# .init/.fini section routines - -$(T)crtinit.o: $(srcdir)/config/or32/initfini.c $(GCC_PASSES) $(CONFIG_H) - $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(CRTSTUFF_T_CFLAGS) \ - $(MULTILIB_CFLAGS) -DCRT_INIT -finhibit-size-directive -fno-inline-functions \ - -g0 -c $(srcdir)/config/or32/initfini.c -o $(T)crtinit.o - -$(T)crtfini.o: $(srcdir)/config/or32/initfini.c $(GCC_PASSES) $(CONFIG_H) - $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(CRTSTUFF_T_CFLAGS) \ - -DCRT_FINI $(MULTILIB_CFLAGS) -finhibit-size-directive -fno-inline-functions \ - -g0 -c $(srcdir)/config/or32/initfini.c -o $(T)crtfini.o - -#MULTILIB_OPTIONS = -MULTILIB_DIRNAMES = be -EXTRA_MULTILIB_PARTS = crtinit.o crtfini.o Index: openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32-protos.h =================================================================== --- openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32-protos.h (revision 398) +++ openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32-protos.h (revision 399) @@ -1,5 +1,23 @@ -/* Definitions of target machine for GNU compiler, OR32 cpu. */ +/* Definitions of target machine for GNU compiler, OR32 cpu. + Copyright (C) 2010 Embecosm Limited + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING3. If not see +. */ + #ifndef GCC_OR32_PROTOS_H #define GCC_OR32_PROTOS_H @@ -9,7 +27,7 @@ /* The following are only needed when handling the machine definition. */ #ifdef RTX_CODE extern void or32_expand_prologue (void); -extern void or32_expand_epilogue (int sibcall); +extern void or32_expand_epilogue (rtx sibcall); extern const char *or32_output_move_double (rtx *operands); extern void or32_expand_conditional_branch (rtx *operands, enum machine_mode mode); @@ -27,3 +45,13 @@ #endif #endif +extern int or32_struct_alignment (tree); +extern int or32_data_alignment (tree, int); + +extern int or32_initial_elimination_offset (int, int); +extern bool or32_save_reg_p_cached (int regno); +extern void or32_print_jump_restore (rtx jump_address); + + +/* For RETURN_ADDR_RTX */ +extern rtx get_hard_reg_initial_val (enum machine_mode, unsigned int);
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/predicates.md
1,4 → 1,22
;; Predicate definitions for OR32
;;
;; Copyright (C) 2010 Embecosm Limited
;;
;; This file is part of GCC.
;;
;; GCC is free software; you can redistribute it and/or modify
;; it under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 3, or (at your option)
;; any later version.
;;
;; GCC is distributed in the hope that it will be useful,
;; but WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;; GNU General Public License for more details.
;;
;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>.
 
(define_predicate "cc_reg_operand"
(match_code "subreg,reg")
5,7 → 23,7
{
register_operand (op, mode);
 
if (GET_CODE (op) == REG && REGNO (op) == 32)
if (GET_CODE (op) == REG && REGNO (op) == CC_REG)
return 1;
 
return 0;
46,9 → 64,9
variants when we are working in DImode and !arch64. */
if (GET_MODE_CLASS (mode) == MODE_INT
&& ((GET_CODE (op) == CONST_INT)
&& (CONST_OK_FOR_LETTER_P (INTVAL (op), 'K')
|| CONST_OK_FOR_LETTER_P (INTVAL (op), 'M')
|| CONST_OK_FOR_LETTER_P (INTVAL (op), 'I'))))
&& (satisfies_constraint_K (op)
|| satisfies_constraint_M (op)
|| satisfies_constraint_I (op))))
return 1;
 
if (register_operand (op, mode))
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.md
1,12 → 1,14
;; Machine description for GNU compiler, OpenRISC 1000 family, OR32 ISA
;; Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
;; 2009, 2010 Free Software Foundation, Inc.
;; Copyright (C) 2010 Embecosm Limited
 
;; Contributed by Damjan Lampret <damjanl@bsemi.com> in 1999.
;; Major optimizations by Matjaz Breskvar <matjazb@bsemi.com> in 2005.
;; Floating point additions by Jungsook Yang <jungsook.yang@uci.edu>
;; Julius Baxter <julius@orsoc.se> in 2010
;; Updated for GCC 4.5 by Jeremy Bennett <jeremy.bennett@embecosm.com> in 2010
;; Updated for GCC 4.5 by Jeremy Bennett <jeremy.bennett@embecosm.com>
;; and Joern Rennecke <joern.rennecke@embecosm.com> in 2010
 
;; This file is part of GNU CC.
 
23,10 → 25,19
;; You should have received a copy of the GNU General Public License along
;; with this program. If not, see <http://www.gnu.org/licenses/>. */
 
(define_constants [
(CC_REG 34)
 
;; unspec_volatile values
(UNSPECV_SIBCALL_EPILOGUE 0)
])
 
(include "predicates.md")
 
(include "constraints.md")
 
(define_attr "type"
"unknown,load,store,move,extend,logic,add,mul,shift,compare,branch,jump,fp"
"unknown,load,store,move,extend,logic,add,mul,shift,compare,branch,jump,fp,jump_restore"
(const_string "unknown"))
 
;; Number of machine instructions required to implement an insn.
62,7 → 73,7
 
(define_expand "prologue"
[(use (const_int 1))]
"TARGET_MASK_SCHED_LOGUE"
"TARGET_SCHED_LOGUE"
{
or32_expand_prologue ();
DONE;
76,17 → 87,20
;; first insn to prevent such scheduling.
(define_expand "epilogue"
[(use (const_int 2))]
"TARGET_MASK_SCHED_LOGUE"
"TARGET_SCHED_LOGUE"
{
or32_expand_epilogue (false);
or32_expand_epilogue (NULL_RTX);
DONE;
})
 
(define_expand "sibcall_epilogue"
[(use (const_int 2))]
"TARGET_MASK_SCHED_LOGUE"
(define_insn_and_split "sibcall_epilogue"
[(unspec_volatile [(const_int 2)] UNSPECV_SIBCALL_EPILOGUE)]
"TARGET_SCHED_LOGUE"
"#"
""
[(pc)]
{
or32_expand_epilogue (true);
or32_expand_epilogue (curr_insn);
DONE;
})
 
93,7 → 107,7
(define_insn "return_internal"
[(return)
(use (match_operand 0 "pmode_register_operand" ""))]
"TARGET_MASK_SCHED_LOGUE"
"TARGET_SCHED_LOGUE"
"l.jr \t%0%("
[(set_attr "type" "jump")
(set_attr "length" "1")])
107,7 → 121,7
(match_operand 1 "" ""))
(use (match_operand 2 "" "")) ;; next_arg_reg
(use (match_operand 3 "" ""))])] ;; struct_value_size_rtx
"TARGET_MASK_SIBCALL"
""
"
{
or32_expand_sibcall (0, XEXP (operands[0], 0), operands[1]);
118,7 → 132,7
[(set (match_operand 0 "" "")
(call (match_operand:SI 1 "" "")
(match_operand 2 "" "")))]
"TARGET_MASK_SIBCALL"
""
"
{
or32_expand_sibcall (operands[0], XEXP (operands[1], 0), operands[2]);
126,14 → 140,15
}")
 
(define_insn "sibcall_internal"
[(call (mem:SI (match_operand:SI 0 "sibcall_insn_operand" "s,r"))
[(call (mem:SI (match_operand:SI 0 "sibcall_insn_operand" "s,Rsc,r"))
(match_operand 1 "" ""))
(use (reg:SI 9))]
"TARGET_MASK_SIBCALL"
""
"@
l.j \t%S0%(\t # sibcall s
l.jr \t%0%(\t # sibcall r"
[(set_attr "type" "jump,jump")])
l.j\t%S0%(\t# sibcall s
l.jr\t%0%(\t# sibcall Rsc
l.jr\t%0\t\t# sibcall r%J0"
[(set_attr "type" "jump,jump,jump_restore")])
 
 
287,7 → 302,7
[(set_attr "type" "add,load,store,add,logic,move")
(set_attr "length" "1,1,1,1,1,1")])
 
(define_insn "*movsi_lo_sum"
(define_insn "movsi_lo_sum"
[(set (match_operand:SI 0 "register_operand" "=r")
(lo_sum:SI (match_operand:SI 1 "register_operand" "r")
(match_operand:SI 2 "immediate_operand" "i")))]
296,7 → 311,7
[(set_attr "type" "logic")
(set_attr "length" "1")])
 
(define_insn "*movsi_high"
(define_insn "movsi_high"
[(set (match_operand:SI 0 "register_operand" "=r")
(high:SI (match_operand:SI 1 "immediate_operand" "i")))]
""
304,11 → 319,20
[(set_attr "type" "move")
(set_attr "length" "1")])
 
(define_insn "movsi_insn_big"
[(set (match_operand:SI 0 "nonimmediate_operand" "=r")
(define_insn_and_split "movsi_insn_big"
[(set (match_operand:SI 0 "register_operand" "=r")
(match_operand:SI 1 "immediate_operand" "i"))]
"GET_CODE(operands[1]) != CONST_INT"
"GET_CODE (operands[1]) != CONST_INT"
"l.movhi \t%0,hi(%1)\;l.ori \t%0,%0,lo(%1)"
;; the switch of or32 bfd to Rela allows us to schedule insns separately.
"&& reload_completed
&& GET_CODE (operands[1]) != HIGH && GET_CODE (operands[1]) != LO_SUM"
[(pc)]
{
emit_insn (gen_movsi_high (operands[0], operands[1]));
emit_insn (gen_movsi_lo_sum (operands[0], operands[0], operands[1]));
DONE;
}
[(set_attr "type" "move")
(set_attr "length" "2")])
 
432,7 → 456,7
;; investigation.
 
;;(define_expand "cmpsi"
;; [(set (reg:CC 32)
;; [(set (reg:CC CC_REG)
;; (compare:CC (match_operand:SI 0 "register_operand" "")
;; (match_operand:SI 1 "nonmemory_operand" "")))]
;; ""
445,7 → 469,7
;; })
 
;; (define_expand "cmpsf"
;; [(set (reg:CC 32)
;; [(set (reg:CC CC_REG)
;; (compare:CC (match_operand:SF 0 "register_operand" "")
;; (match_operand:SF 1 "register_operand" "")))]
;; "TARGET_HARD_FLOAT"
487,7 → 511,7
;; Here are the actual compare insns.
(define_insn "*cmpsi_eq"
[(set (reg:CCEQ 32)
[(set (reg:CCEQ CC_REG)
(compare:CCEQ (match_operand:SI 0 "register_operand" "r,r")
(match_operand:SI 1 "nonmemory_operand" "I,r")))]
""
496,7 → 520,7
l.sfeq \t%0,%1")
 
(define_insn "*cmpsi_ne"
[(set (reg:CCNE 32)
[(set (reg:CCNE CC_REG)
(compare:CCNE (match_operand:SI 0 "register_operand" "r,r")
(match_operand:SI 1 "nonmemory_operand" "I,r")))]
""
505,7 → 529,7
l.sfne \t%0,%1")
 
(define_insn "*cmpsi_gt"
[(set (reg:CCGT 32)
[(set (reg:CCGT CC_REG)
(compare:CCGT (match_operand:SI 0 "register_operand" "r,r")
(match_operand:SI 1 "nonmemory_operand" "I,r")))]
""
514,7 → 538,7
l.sfgts \t%0,%1")
 
(define_insn "*cmpsi_gtu"
[(set (reg:CCGTU 32)
[(set (reg:CCGTU CC_REG)
(compare:CCGTU (match_operand:SI 0 "register_operand" "r,r")
(match_operand:SI 1 "nonmemory_operand" "I,r")))]
""
523,7 → 547,7
l.sfgtu \t%0,%1")
 
(define_insn "*cmpsi_lt"
[(set (reg:CCLT 32)
[(set (reg:CCLT CC_REG)
(compare:CCLT (match_operand:SI 0 "register_operand" "r,r")
(match_operand:SI 1 "nonmemory_operand" "I,r")))]
""
532,7 → 556,7
l.sflts \t%0,%1")
 
(define_insn "*cmpsi_ltu"
[(set (reg:CCLTU 32)
[(set (reg:CCLTU CC_REG)
(compare:CCLTU (match_operand:SI 0 "register_operand" "r,r")
(match_operand:SI 1 "nonmemory_operand" "I,r")))]
""
541,7 → 565,7
l.sfltu \t%0,%1")
 
(define_insn "*cmpsi_ge"
[(set (reg:CCGE 32)
[(set (reg:CCGE CC_REG)
(compare:CCGE (match_operand:SI 0 "register_operand" "r,r")
(match_operand:SI 1 "nonmemory_operand" "I,r")))]
""
551,7 → 575,7
 
 
(define_insn "*cmpsi_geu"
[(set (reg:CCGEU 32)
[(set (reg:CCGEU CC_REG)
(compare:CCGEU (match_operand:SI 0 "register_operand" "r,r")
(match_operand:SI 1 "nonmemory_operand" "I,r")))]
""
561,7 → 585,7
 
 
(define_insn "*cmpsi_le"
[(set (reg:CCLE 32)
[(set (reg:CCLE CC_REG)
(compare:CCLE (match_operand:SI 0 "register_operand" "r,r")
(match_operand:SI 1 "nonmemory_operand" "I,r")))]
""
570,7 → 594,7
l.sfles \t%0,%1")
 
(define_insn "*cmpsi_leu"
[(set (reg:CCLEU 32)
[(set (reg:CCLEU CC_REG)
(compare:CCLEU (match_operand:SI 0 "register_operand" "r,r")
(match_operand:SI 1 "nonmemory_operand" "I,r")))]
""
580,7 → 604,7
 
;; Single precision floating point evaluation instructions
(define_insn "*cmpsf_eq"
[(set (reg:CCEQ 32)
[(set (reg:CCEQ CC_REG)
(compare:CCEQ (match_operand:SF 0 "register_operand" "r,r")
(match_operand:SF 1 "register_operand" "r,r")))]
"TARGET_HARD_FLOAT"
587,7 → 611,7
"lf.sfeq.s\t%0,%1")
 
(define_insn "*cmpsf_ne"
[(set (reg:CCNE 32)
[(set (reg:CCNE CC_REG)
(compare:CCNE (match_operand:SF 0 "register_operand" "r,r")
(match_operand:SF 1 "register_operand" "r,r")))]
"TARGET_HARD_FLOAT"
595,7 → 619,7
 
 
(define_insn "*cmpsf_gt"
[(set (reg:CCGT 32)
[(set (reg:CCGT CC_REG)
(compare:CCGT (match_operand:SF 0 "register_operand" "r,r")
(match_operand:SF 1 "register_operand" "r,r")))]
"TARGET_HARD_FLOAT"
602,7 → 626,7
"lf.sfgt.s\t%0,%1")
 
(define_insn "*cmpsf_ge"
[(set (reg:CCGE 32)
[(set (reg:CCGE CC_REG)
(compare:CCGE (match_operand:SF 0 "register_operand" "r,r")
(match_operand:SF 1 "register_operand" "r,r")))]
"TARGET_HARD_FLOAT"
610,7 → 634,7
 
 
(define_insn "*cmpsf_lt"
[(set (reg:CCLT 32)
[(set (reg:CCLT CC_REG)
(compare:CCLT (match_operand:SF 0 "register_operand" "r,r")
(match_operand:SF 1 "register_operand" "r,r")))]
"TARGET_HARD_FLOAT"
617,7 → 641,7
"lf.sflt.s\t%0,%1")
 
(define_insn "*cmpsf_le"
[(set (reg:CCLE 32)
[(set (reg:CCLE CC_REG)
(compare:CCLE (match_operand:SF 0 "register_operand" "r,r")
(match_operand:SF 1 "register_operand" "r,r")))]
"TARGET_HARD_FLOAT"
989,10 → 1013,7
""
"
{
if (!TARGET_MASK_ALIGNED_JUMPS)
emit_jump_insn (gen_jump_internal (operands[0]));
else
emit_jump_insn (gen_jump_aligned (operands[0]));
emit_jump_insn (gen_jump_internal (operands[0]));
DONE;
}")
 
999,19 → 1020,11
(define_insn "jump_internal"
[(set (pc)
(label_ref (match_operand 0 "" "")))]
"!TARGET_MASK_ALIGNED_JUMPS"
""
"l.j \t%l0%("
[(set_attr "type" "jump")
(set_attr "length" "1")])
 
(define_insn "jump_aligned"
[(set (pc)
(label_ref (match_operand 0 "" "")))]
"TARGET_MASK_ALIGNED_JUMPS"
".balignl 0x8,0x15000015,0x4\;l.j \t%l0%("
[(set_attr "type" "jump")
(set_attr "length" "1")])
 
;; indirect jump
 
(define_expand "indirect_jump"
1019,10 → 1032,7
""
"
{
if (!TARGET_MASK_ALIGNED_JUMPS)
emit_jump_insn (gen_indirect_jump_internal (operands[0]));
else
emit_jump_insn (gen_indirect_jump_aligned (operands[0]));
emit_jump_insn (gen_indirect_jump_internal (operands[0]));
DONE;
 
}")
1029,18 → 1039,11
 
(define_insn "indirect_jump_internal"
[(set (pc) (match_operand:SI 0 "register_operand" "r"))]
"!TARGET_MASK_ALIGNED_JUMPS"
""
"l.jr \t%0%("
[(set_attr "type" "jump")
(set_attr "length" "1")])
 
(define_insn "indirect_jump_aligned"
[(set (pc) (match_operand:SI 0 "register_operand" "r"))]
"TARGET_MASK_ALIGNED_JUMPS"
".balignl 0x8,0x15000015,0x4\;l.jr \t%0%("
[(set_attr "type" "jump")
(set_attr "length" "1")])
 
;;
;; calls
;;
1054,10 → 1057,7
""
"
{
if (!TARGET_MASK_ALIGNED_JUMPS)
emit_call_insn (gen_call_internal (operands[0], operands[1]));
else
emit_call_insn (gen_call_aligned (operands[0], operands[1]));
emit_call_insn (gen_call_internal (operands[0], operands[1]));
DONE;
}")
 
1065,20 → 1065,11
[(parallel [(call (match_operand:SI 0 "sym_ref_mem_operand" "")
(match_operand 1 "" "i"))
(clobber (reg:SI 9))])]
"!TARGET_MASK_ALIGNED_JUMPS"
""
"l.jal \t%S0%("
[(set_attr "type" "jump")
(set_attr "length" "1")])
 
(define_insn "call_aligned"
[(parallel [(call (match_operand:SI 0 "sym_ref_mem_operand" "")
(match_operand 1 "" "i"))
(clobber (reg:SI 9))])]
"TARGET_MASK_ALIGNED_JUMPS"
".balignl 0x8,0x15000015,0x4\;l.jal \t%S0%("
[(set_attr "type" "jump")
(set_attr "length" "1")])
 
;; call value
 
(define_expand "call_value"
1089,10 → 1080,7
""
"
{
if (!TARGET_MASK_ALIGNED_JUMPS)
emit_call_insn (gen_call_value_internal (operands[0], operands[1], operands[2]));
else
emit_call_insn (gen_call_value_aligned (operands[0], operands[1], operands[2]));
emit_call_insn (gen_call_value_internal (operands[0], operands[1], operands[2]));
DONE;
}")
 
1101,21 → 1089,11
(call (match_operand:SI 1 "sym_ref_mem_operand" "")
(match_operand 2 "" "i")))
(clobber (reg:SI 9))])]
"!TARGET_MASK_ALIGNED_JUMPS"
""
"l.jal \t%S1%("
[(set_attr "type" "jump")
(set_attr "length" "1")])
 
(define_insn "call_value_aligned"
[(parallel [(set (match_operand 0 "register_operand" "=r")
(call (match_operand:SI 1 "sym_ref_mem_operand" "")
(match_operand 2 "" "i")))
(clobber (reg:SI 9))])]
"TARGET_MASK_ALIGNED_JUMPS"
".balignl 0x8,0x15000015,0x4\;l.jal \t%S1%("
[(set_attr "type" "jump")
(set_attr "length" "1")])
 
;; indirect call value
 
(define_expand "call_value_indirect"
1126,10 → 1104,7
""
"
{
if (!TARGET_MASK_ALIGNED_JUMPS)
emit_call_insn (gen_call_value_indirect_internal (operands[0], operands[1], operands[2]));
else
emit_call_insn (gen_call_value_indirect_aligned (operands[0], operands[1], operands[2]));
emit_call_insn (gen_call_value_indirect_internal (operands[0], operands[1], operands[2]));
DONE;
}")
 
1138,21 → 1113,11
(call (mem:SI (match_operand:SI 1 "register_operand" "r"))
(match_operand 2 "" "i")))
(clobber (reg:SI 9))])]
"!TARGET_MASK_ALIGNED_JUMPS"
""
"l.jalr \t%1%("
[(set_attr "type" "jump")
(set_attr "length" "1")])
 
(define_insn "call_value_indirect_aligned"
[(parallel [(set (match_operand 0 "register_operand" "=r")
(call (mem:SI (match_operand:SI 1 "register_operand" "r"))
(match_operand 2 "" "i")))
(clobber (reg:SI 9))])]
"TARGET_MASK_ALIGNED_JUMPS"
".balignl 0x8,0x15000015,0x4\;l.jalr \t%1%("
[(set_attr "type" "jump")
(set_attr "length" "1")])
 
;; indirect call
 
(define_expand "call_indirect"
1162,10 → 1127,7
""
"
{
if (!TARGET_MASK_ALIGNED_JUMPS)
emit_call_insn (gen_call_indirect_internal (operands[0], operands[1]));
else
emit_call_insn (gen_call_indirect_aligned (operands[0], operands[1]));
emit_call_insn (gen_call_indirect_internal (operands[0], operands[1]));
DONE;
}")
 
1173,20 → 1135,11
[(parallel [(call (mem:SI (match_operand:SI 0 "register_operand" "r"))
(match_operand 1 "" "i"))
(clobber (reg:SI 9))])]
"!TARGET_MASK_ALIGNED_JUMPS"
""
"l.jalr \t%0%("
[(set_attr "type" "jump")
(set_attr "length" "1")])
 
(define_insn "call_indirect_aligned"
[(parallel [(call (mem:SI (match_operand:SI 0 "register_operand" "r"))
(match_operand 1 "" "i"))
(clobber (reg:SI 9))])]
"TARGET_MASK_ALIGNED_JUMPS"
".balignl 0x8,0x15000015,0x4\;l.jalr \t%0%("
[(set_attr "type" "jump")
(set_attr "length" "1")])
 
;; table jump
 
(define_expand "tablejump"
1195,10 → 1148,12
""
"
{
if (!TARGET_MASK_ALIGNED_JUMPS)
emit_jump_insn (gen_tablejump_internal (operands[0], operands[1]));
else
emit_jump_insn (gen_tablejump_aligned (operands[0], operands[1]));
if (CASE_VECTOR_PC_RELATIVE || flag_pic)
operands[0]
= force_reg (Pmode,
gen_rtx_PLUS (Pmode, operands[0],
gen_rtx_LABEL_REF (Pmode, operands[1])));
emit_jump_insn (gen_tablejump_internal (operands[0], operands[1]));
DONE;
}")
 
1205,20 → 1160,12
(define_insn "tablejump_internal"
[(set (pc) (match_operand:SI 0 "register_operand" "r"))
(use (label_ref (match_operand 1 "" "")))]
"!TARGET_MASK_ALIGNED_JUMPS"
""
"l.jr \t%0%("
[(set_attr "type" "jump")
(set_attr "length" "1")])
 
(define_insn "tablejump_aligned"
[(set (pc) (match_operand:SI 0 "register_operand" "r"))
(use (label_ref (match_operand 1 "" "")))]
"TARGET_MASK_ALIGNED_JUMPS"
".balignl 0x8,0x15000015,0x4\;l.jr \t%0%("
[(set_attr "type" "jump")
(set_attr "length" "1")])
 
 
;; no-op
 
(define_insn "nop"
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/t-or32
1,7 → 1,23
# t-or32 is a Makefile fragment to be included when
# building gcc for the or32 target
 
# Copyright (C) 2010 Embecosm Limited
 
# This file is part of GCC.
#
# t-default is Makefile fragment to be included when
# building gcc for or32 target
# GCC is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3, or (at your option)
# any later version.
#
# GCC is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
 
# we don't support -g so don't use it
LIBGCC2_DEBUG_CFLAGS =
35,16 → 51,14
 
# .init/.fini section routines
 
$(T)crtinit.o: $(srcdir)/config/or32/initfini.c $(GCC_PASSES) $(CONFIG_H)
$(T)crti.o: $(srcdir)/config/or32/crti.S $(GCC_PASSES) $(CONFIG_H)
$(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(CRTSTUFF_T_CFLAGS) \
$(MULTILIB_CFLAGS) -DCRT_INIT -finhibit-size-directive -fno-inline-functions \
-g0 -c $(srcdir)/config/or32/initfini.c -o $(T)crtinit.o
$(MULTILIB_CFLAGS) -finhibit-size-directive -fno-inline-functions \
-g0 -c $< -o $@
 
$(T)crtfini.o: $(srcdir)/config/or32/initfini.c $(GCC_PASSES) $(CONFIG_H)
$(T)crtn.o: $(srcdir)/config/or32/crtn.S $(GCC_PASSES) $(CONFIG_H)
$(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(CRTSTUFF_T_CFLAGS) \
-DCRT_FINI $(MULTILIB_CFLAGS) -finhibit-size-directive -fno-inline-functions \
-g0 -c $(srcdir)/config/or32/initfini.c -o $(T)crtfini.o
$(MULTILIB_CFLAGS) -finhibit-size-directive -fno-inline-functions \
-g0 -c $< -o $@
 
#MULTILIB_OPTIONS =
#MULTILIB_DIRNAMES = be
#EXTRA_MULTILIB_PARTS = crtinit.o crtfini.o
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.opt
1,4 → 1,21
; Options for the OR32 port of the compiler
; This file is part of GCC.
;
; Copyright (C) 2010 Embecosm Limited
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
; for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3. If not see
; <http://www.gnu.org/licenses/>.
 
mhard-float
Target RejectNegative Mask(HARD_FLOAT)
28,10 → 45,6
Target RejectNegative InverseMask(HARD_MUL)
Do not use hardware multiplication
 
maj
Target Mask(MASK_ALIGNED_JUMPS)
Use aligned jumps
 
msext
Target Mask(MASK_SEXT)
Use sign-extending instructions
41,7 → 54,7
Use conditional move instructions
 
mlogue
Target Mask(MASK_SCHED_LOGUE)
Target Mask(SCHED_LOGUE)
Schedule prologue/epilogue
 
mror
48,10 → 61,6
Target Mask(MASK_ROR)
Emit ROR instructions
 
msibcall
Target Mask(MASK_SIBCALL)
Enable sibcall optimization
 
mor32-newlib
Target RejectNegative
Link with the OR32 newlib library
59,3 → 68,11
mor32-newlib-uart
Target RejectNegative
Link with the OR32 newlib UART library
 
;; provide struct padding as in previous releases.
;; Note that this will only affect STRUCTURE_SIZE_BOUNDARY, in particular
;; make 2 byte structs 4-byte alignned and sized.
;; We still use ROUND_TYPE_ALIGN to increase alignment of larger structs.
mpadstruct
Target Report RejectNegative Mask(PADSTRUCT)
Make structs a multiple of 4 bytes (warning: ABI altered)
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.c
5,7 → 5,8
 
Contributed by Damjan Lampret <damjanl@bsemi.com> in 1999.
Major optimizations by Matjaz Breskvar <matjazb@bsemi.com> in 2005.
Updated for GCC 4.5 by Jeremy Bennett <jeremy.bennett@embecoms.com> in 2010
Updated for GCC 4.5 by Jeremy Bennett <jeremy.bennett@embecoms.com>
and Joern Rennecke <joern.rennecke@embecosm.com> in 2010.
 
This file is part of GNU CC.
 
101,7 → 102,6
/* ========================================================================== */
/* Local (i.e. static) utility functions */
 
 
/* -------------------------------------------------------------------------- */
/*!Must the current function save a register?
 
123,7 → 123,7
 
/* We need to save the old frame pointer before setting up a new
one. */
if (regno == FRAME_POINTER_REGNUM && frame_pointer_needed)
if (regno == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed)
return true;
 
/* We need to save the incoming return address if it is ever clobbered
135,6 → 135,14
 
} /* or32_save_reg_p () */
 
bool
or32_save_reg_p_cached (int regno)
{
return (frame_info.mask & ((HOST_WIDE_INT) 1 << regno)) != 0;
}
 
/* N.B. contrary to the ISA documentation, the stack includes the outgoing
arguments. */
/* -------------------------------------------------------------------------- */
/*!Compute full frame size and layout.
 
150,6 → 158,7
HOST_WIDE_INT args_size;
HOST_WIDE_INT vars_size;
HOST_WIDE_INT stack_offset;
bool interrupt_p = false;
 
int regno;
 
165,24 → 174,24
if (vars_size == 0 && current_function_is_leaf)
args_size = 0;
 
stack_offset = args_size;
stack_offset = 0;
 
/* Save link register right after possible outgoing arguments. */
/* Save link register right at the bottom. */
if (or32_save_reg_p (LINK_REGNUM))
{
stack_offset = stack_offset - UNITS_PER_WORD;
frame_info.lr_save_offset = stack_offset;
frame_info.save_lr_p = true;
stack_offset = stack_offset + UNITS_PER_WORD;
}
else
frame_info.save_lr_p = false;
 
/* Save frame pointer right after possible link register. */
if (or32_save_reg_p (FRAME_POINTER_REGNUM))
if (frame_pointer_needed)
{
stack_offset = stack_offset - UNITS_PER_WORD;
frame_info.fp_save_offset = stack_offset;
frame_info.save_fp_p = true;
stack_offset = stack_offset + UNITS_PER_WORD;
}
else
frame_info.save_fp_p = false;
189,11 → 198,11
 
frame_info.gpr_size = 0;
frame_info.mask = 0;
frame_info.gpr_offset = stack_offset;
 
for (regno = 0; regno <= OR32_LAST_INT_REG; regno++)
for (regno = 0; regno <= OR32_LAST_ACTUAL_REG; regno++)
{
if (regno == LINK_REGNUM || regno == FRAME_POINTER_REGNUM)
if (regno == LINK_REGNUM
|| (frame_pointer_needed && regno == HARD_FRAME_POINTER_REGNUM))
/* These have already been saved if so needed. */
continue;
 
200,7 → 209,7
if (or32_save_reg_p (regno))
{
frame_info.gpr_size += UNITS_PER_WORD;
frame_info.mask |= (1 << regno);
frame_info.mask |= ((HOST_WIDE_INT) 1 << regno);
}
}
 
207,7 → 216,21
frame_info.total_size = ((frame_info.save_fp_p ? UNITS_PER_WORD : 0)
+ (frame_info.save_lr_p ? UNITS_PER_WORD : 0)
+ args_size + frame_info.gpr_size + vars_size);
gcc_assert (PROLOGUE_TMP != STATIC_CHAIN_REGNUM);
if (frame_info.total_size > 32767 && interrupt_p)
{
int n_extra
= (!!(~frame_info.mask && 1 << PROLOGUE_TMP)
+ !!(~frame_info.mask & 1 << EPILOGUE_TMP)) * UNITS_PER_WORD;
 
frame_info.gpr_size += n_extra;
frame_info.total_size += n_extra;
frame_info.mask |= (1 << PROLOGUE_TMP) | (1 << EPILOGUE_TMP);
}
 
stack_offset -= frame_info.gpr_size;
frame_info.gpr_offset = stack_offset;
 
return frame_info.total_size;
 
} /* or32_compute_frame_size () */
235,25 → 258,20
 
 
/* -------------------------------------------------------------------------- */
/*!Generate the RTX for an indexed memory access
/* Generate a RTX for the indexed memory address based on stack_pointer_rtx
and a displacement
 
Generate a RTX for the indexed memory address based on a base address and a
displacement
 
@param[in] base The base address RTX
@param[in] disp The displacement
 
@return The RTX for the generated address. */
/* -------------------------------------------------------------------------- */
static rtx
indexed_memory (rtx base,
HOST_WIDE_INT disp)
stack_disp_mem (HOST_WIDE_INT disp)
{
return gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, base, GEN_INT (disp)));
return gen_frame_mem (Pmode, plus_constant (stack_pointer_rtx, disp));
}
 
} /* indexed_memory () */
 
 
/* -------------------------------------------------------------------------- */
/*!Generate insn patterns to do an integer compare of operands.
 
491,7 → 509,7
 
@return RTX for the move. */
/* -------------------------------------------------------------------------- */
rtx
static rtx
or32_emit_move (rtx dest, rtx src)
{
return (can_create_pseudo_p ()
596,47 → 614,26
or32_expand_prologue (void)
{
int total_size = or32_compute_frame_size (get_frame_size ());
rtx sp_rtx;
rtx value_rtx;
rtx insn;
 
if (!total_size)
/* No frame needed. */
return;
 
sp_rtx = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
 
if (total_size > 32767)
{
value_rtx = gen_rtx_REG (Pmode, GP_ARG_RETURN);
emit_frame_insn (gen_rtx_SET (Pmode, value_rtx, GEN_INT (total_size)));
}
else
value_rtx = GEN_INT (total_size);
 
/* Update the stack pointer to reflect frame size. */
emit_frame_insn
(gen_rtx_SET (Pmode, stack_pointer_rtx,
gen_rtx_MINUS (Pmode, stack_pointer_rtx, value_rtx)));
 
if (frame_info.save_fp_p)
{
emit_frame_insn
(gen_rtx_SET (Pmode,
indexed_memory (stack_pointer_rtx,
frame_info.fp_save_offset),
frame_pointer_rtx));
emit_frame_insn (gen_rtx_SET (Pmode,
stack_disp_mem (frame_info.fp_save_offset),
hard_frame_pointer_rtx));
 
emit_frame_insn
(gen_rtx_SET (Pmode, frame_pointer_rtx,
gen_rtx_PLUS (Pmode, frame_pointer_rtx, value_rtx)));
(gen_add3_insn (hard_frame_pointer_rtx, stack_pointer_rtx, const0_rtx));
}
if (frame_info.save_lr_p)
{
 
emit_frame_insn
(gen_rtx_SET (Pmode,
indexed_memory (stack_pointer_rtx,
frame_info.lr_save_offset),
(gen_rtx_SET (Pmode, stack_disp_mem (frame_info.lr_save_offset),
gen_rtx_REG (Pmode, LINK_REGNUM)));
}
if (frame_info.gpr_size)
644,20 → 641,33
int offset = 0;
int regno;
 
for (regno = 0; regno <= OR32_LAST_INT_REG; regno++)
for (regno = 0; regno <= OR32_LAST_ACTUAL_REG; regno++)
{
HOST_WIDE_INT disp = frame_info.gpr_offset + offset;
 
if (!(frame_info.mask & (1 << regno)))
if (!(frame_info.mask & ((HOST_WIDE_INT) 1 << regno)))
continue;
 
emit_frame_insn
(gen_rtx_SET (Pmode,
indexed_memory (stack_pointer_rtx, disp),
stack_disp_mem (frame_info.gpr_offset + offset),
gen_rtx_REG (Pmode, regno)));
offset = offset + UNITS_PER_WORD;
}
}
 
/* Update the stack pointer to reflect frame size. */
insn = gen_add2_insn (stack_pointer_rtx, GEN_INT (-total_size));
if (total_size > 32767)
{
rtx note = insn;
rtx value_rtx = gen_rtx_REG (Pmode, PROLOGUE_TMP);
 
or32_emit_set_const32 (value_rtx, GEN_INT (-total_size));
insn = emit_frame_insn (gen_add2_insn (stack_pointer_rtx, value_rtx));
add_reg_note (insn, REG_FRAME_RELATED_EXPR, note);
}
else
emit_frame_insn (insn);
 
} /* or32_expand_prologue () */
 
 
674,39 → 684,60
For the OR32 this is currently controlled by the -mlogue option. It should
be the default, once it is proved to work.
 
@param[in] sibcall Non-zero (TRUE) if this is a sibcall return, which can
benefit from tail call optimization. Zero (FALSE)
otherwise. */
@param[in] sibcall The sibcall epilogue insn if this is a sibcall return,
NULL_RTX otherwise. */
/* -------------------------------------------------------------------------- */
void
or32_expand_epilogue (int sibcall)
or32_expand_epilogue (rtx sibcall)
{
int total_size = or32_compute_frame_size (get_frame_size ());
rtx value_rtx;
int sibcall_regno = FIRST_PSEUDO_REGISTER;
 
if (total_size > 32767)
if (sibcall)
{
value_rtx = gen_rtx_REG (Pmode, 3);
 
emit_insn (gen_rtx_SET (Pmode, value_rtx, GEN_INT (total_size)));
sibcall = next_nonnote_insn (sibcall);
gcc_assert (CALL_P (sibcall) && SIBLING_CALL_P (sibcall));
sibcall = XVECEXP (PATTERN (sibcall), 0, 0);
if (GET_CODE (sibcall) == SET)
sibcall = SET_SRC (sibcall);
gcc_assert (GET_CODE (sibcall) == CALL);
sibcall = XEXP (sibcall, 0);
gcc_assert (MEM_P (sibcall));
sibcall = XEXP (sibcall, 0);
if (REG_P (sibcall))
sibcall_regno = REGNO (sibcall);
else
gcc_assert (CONSTANT_P (sibcall));
}
if (frame_info.save_fp_p)
{
emit_insn
(gen_add3_insn (stack_pointer_rtx, hard_frame_pointer_rtx, const0_rtx));
emit_insn
(gen_rtx_SET (Pmode, hard_frame_pointer_rtx,
stack_disp_mem (frame_info.fp_save_offset)));
}
else
value_rtx = GEN_INT (total_size);
{
rtx value_rtx;
 
if (total_size > 32767)
{
value_rtx = gen_rtx_REG (Pmode, EPILOGUE_TMP);
or32_emit_set_const32 (value_rtx, GEN_INT (total_size));
}
else
value_rtx = GEN_INT (total_size);
if (total_size)
emit_insn (gen_add2_insn (stack_pointer_rtx, value_rtx));
}
 
if (frame_info.save_lr_p)
{
emit_insn
(gen_rtx_SET (Pmode, gen_rtx_REG (Pmode, LINK_REGNUM),
indexed_memory (stack_pointer_rtx,
frame_info.lr_save_offset)));
stack_disp_mem (frame_info.lr_save_offset)));
}
if (frame_info.save_fp_p)
{
emit_insn
(gen_rtx_SET (Pmode, gen_rtx_REG (Pmode, FRAME_POINTER_REGNUM),
indexed_memory (stack_pointer_rtx,
frame_info.fp_save_offset)));
}
 
if (frame_info.gpr_size)
{
713,33 → 744,48
int offset = 0;
int regno;
 
for (regno = 0; regno <= OR32_LAST_INT_REG; regno++)
for (regno = 0; regno <= OR32_LAST_ACTUAL_REG; regno++)
{
HOST_WIDE_INT disp = frame_info.gpr_offset + offset;
 
if (!(frame_info.mask & (1 << regno)))
if (!(frame_info.mask & ((HOST_WIDE_INT) 1 << regno)))
continue;
 
emit_insn
(gen_rtx_SET (Pmode, gen_rtx_REG (Pmode, regno),
indexed_memory (stack_pointer_rtx, disp)));
if (regno != sibcall_regno)
emit_insn
(gen_rtx_SET (Pmode, gen_rtx_REG (Pmode, regno),
stack_disp_mem (frame_info.gpr_offset + offset)));
offset = offset + UNITS_PER_WORD;
}
}
 
if (total_size)
{
emit_insn (gen_rtx_SET (Pmode, stack_pointer_rtx,
gen_rtx_PLUS (Pmode,
stack_pointer_rtx, value_rtx)));
}
 
if (!sibcall)
emit_jump_insn (gen_return_internal (gen_rtx_REG( Pmode, 9)));
emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode, 9)));
 
} /* or32_expand_epilogue () */
 
/* We are outputting a jump which needs JUMP_ADDRESS, which is the
register it uses as jump destination, restored,
e.g. a sibcall using a callee-saved register.
Emit the register restore as delay slot insn. */
void
or32_print_jump_restore (rtx jump_address)
{
int regno, jump_regno;
HOST_WIDE_INT offset = frame_info.gpr_offset;
 
gcc_assert (REG_P (jump_address));
jump_regno = REGNO (jump_address);
for (regno = 0; regno != jump_regno; regno++)
{
gcc_assert (regno <= OR32_LAST_ACTUAL_REG);
if (!(frame_info.mask & ((HOST_WIDE_INT) 1 << regno)))
continue;
offset = offset + UNITS_PER_WORD;
}
asm_fprintf (asm_out_file, "\n\tl.lwz\tr%d,"HOST_WIDE_INT_PRINT_DEC"(r1)\n",
jump_regno, offset);
}
 
 
/* -------------------------------------------------------------------------- */
/*!Generate assembler code for a movdi/movdf pattern
 
983,20 → 1029,10
mode_calc = SELECT_CC_MODE (code, or32_compare_op0, or32_compare_op1);
mode_got = GET_MODE (operands[2]);
 
if (!TARGET_MASK_ALIGNED_JUMPS)
{
if (mode_calc != mode_got)
return "l.bnf\t%l0%(";
else
return "l.bf\t%l0%(";
}
if (mode_calc != mode_got)
return "l.bnf\t%l0%(";
else
{
if (mode_calc != mode_got)
return ".balignl\t0x8,0x15000015,0x4\n\tl.bnf\t%l0%(";
else
return ".balignl 0x8,0x15000015,0x4;\n\tl.bf\t%l0%(";
}
return "l.bf\t%l0%(";
} /* or32_output_bf () */
 
 
1176,7 → 1212,7
 
JPB 30-Aug-10: Surely that is not correct. If this option is set, we
should never even be called! */
if (TARGET_MASK_SCHED_LOGUE)
if (TARGET_SCHED_LOGUE)
return;
 
if (size < 0)
1227,19 → 1263,19
int offset = OR32_ALIGN (crtl->outgoing_args_size, 4) + lr_save_area;
 
fprintf (file, "\tl.sw\t%d(r%d),r%d\n", offset,
STACK_POINTER_REGNUM, FRAME_POINTER_REGNUM);
STACK_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM);
 
if (stack_size >= 0x8000)
fprintf (file, "\tl.add\tr%d,r%d,r%d\n", FRAME_POINTER_REGNUM,
fprintf (file, "\tl.add\tr%d,r%d,r%d\n", HARD_FRAME_POINTER_REGNUM,
STACK_POINTER_REGNUM, GP_ARG_RETURN);
else
fprintf (file, "\tl.addi\tr%d,r%d,%d\n", FRAME_POINTER_REGNUM,
fprintf (file, "\tl.addi\tr%d,r%d,%d\n", HARD_FRAME_POINTER_REGNUM,
STACK_POINTER_REGNUM, stack_size);
 
/* The CFA is already pointing at the start of our frame (i.e. the new
FP). The old FP has been saved relative to the SP, so we need to use
stack_size to work out where. */
dwarf2out_reg_save (l, FRAME_POINTER_REGNUM, offset - stack_size);
dwarf2out_reg_save (l, HARD_FRAME_POINTER_REGNUM, offset - stack_size);
}
 
/* Save the return address if necessary */
1254,7 → 1290,7
/* The CFA is already pointing at the start of our frame (i.e. the new
FP). The LR has been saved relative to the SP, so we need to use
stack_size to work out where. */
dwarf2out_reg_save (l, FRAME_POINTER_REGNUM, offset - stack_size);
dwarf2out_reg_save (l, HARD_FRAME_POINTER_REGNUM, offset - stack_size);
}
 
save_area = (OR32_ALIGN (crtl->outgoing_args_size, 4)
1273,7 → 1309,8
/* The CFA is already pointing at the start of our frame (i.e. the
new FP). The register has been saved relative to the SP, so we
need to use stack_size to work out where. */
dwarf2out_reg_save (l, FRAME_POINTER_REGNUM, save_area - stack_size);
dwarf2out_reg_save (l, HARD_FRAME_POINTER_REGNUM,
save_area - stack_size);
save_area += 4;
}
}
1345,7 → 1382,7
 
JPB 30-Aug-10: Surely that is not correct. If this option is set, we
should never even be called! */
if (TARGET_MASK_SCHED_LOGUE)
if (TARGET_SCHED_LOGUE)
return;
 
/* Work out the frame size */
1363,7 → 1400,7
/* Restore the frame pointer if necessary */
if (fp_save_area)
{
fprintf (file, "\tl.lwz\tr%d,%d(r%d)\n", FRAME_POINTER_REGNUM,
fprintf (file, "\tl.lwz\tr%d,%d(r%d)\n", HARD_FRAME_POINTER_REGNUM,
OR32_ALIGN (crtl->outgoing_args_size, 4)
+ lr_save_area, STACK_POINTER_REGNUM);
}
1388,13 → 1425,7
fprintf (file, "\tl.movhi\tr3,hi(%d)\n", stack_size);
fprintf (file, "\tl.ori\tr3,r3,lo(%d)\n", stack_size);
 
if (!TARGET_MASK_ALIGNED_JUMPS)
fprintf (file, "\tl.jr\tr%d\n", LINK_REGNUM);
else
{
fprintf (file, "\t.balignl\t0x8,0x15000015,0x4\n");
fprintf (file, "\tl.jr\tr%d\n", LINK_REGNUM);
}
fprintf (file, "\tl.jr\tr%d\n", LINK_REGNUM);
 
fprintf (file, "\tl.add\tr%d,r%d,r3\n", STACK_POINTER_REGNUM,
STACK_POINTER_REGNUM);
1401,13 → 1432,7
}
else if (stack_size > 0)
{
if (!TARGET_MASK_ALIGNED_JUMPS)
fprintf (file, "\tl.jr\tr%d\n", LINK_REGNUM);
else
{
fprintf (file, "\t.balignl 0x8,0x15000015,0x4\n");
fprintf (file, "\tl.jr\tr%d\n", LINK_REGNUM);
}
fprintf (file, "\tl.jr\tr%d\n", LINK_REGNUM);
 
fprintf (file, "\tl.addi\tr%d,r%d,%d\n", STACK_POINTER_REGNUM,
STACK_POINTER_REGNUM, stack_size);
1414,13 → 1439,7
}
else
{
if (!TARGET_MASK_ALIGNED_JUMPS)
fprintf (file, "\tl.jr\tr%d\n", LINK_REGNUM);
else
{
fprintf (file, "\t.balignl\t0x8,0x15000015,0x4\n");
fprintf (file, "\tl.jr\tr%d\n", LINK_REGNUM);
}
fprintf (file, "\tl.jr\tr%d\n", LINK_REGNUM);
 
fprintf (file, "\tl.nop\n"); /* Delay slot */
}
1505,11 → 1524,9
successful sibling call optimization may vary greatly between different
architectures.
 
For the OR32, we currently allow sibcall optimization if the -msibcall
argument is passed.
For the OR32, we currently allow sibcall optimization whenever
-foptimize-sibling-calls is enabled.
 
JPB 30-Aug-10: Surely we should always allow this?
 
@param[in] decl The function for which we may optimize
@param[in] exp The call expression which is candidate for optimization.
 
1520,8 → 1537,7
or32_function_ok_for_sibcall (tree decl ATTRIBUTE_UNUSED,
tree exp ATTRIBUTE_UNUSED)
{
return TARGET_MASK_SIBCALL;
 
return true;
} /* or32_function_ok_for_sibcall () */
 
 
1560,6 → 1576,7
} /* or32_pass_by_reference () */
 
 
#if 0
/* -------------------------------------------------------------------------- */
/*!Is a frame pointer required?
 
1600,8 → 1617,19
return 1;
 
} /* or32_frame_pointer_required () */
#endif
 
int
or32_initial_elimination_offset(int from, int to)
{
if (from == ARG_POINTER_REGNUM && to == HARD_FRAME_POINTER_REGNUM)
return 0;
or32_compute_frame_size (get_frame_size ());
return ((from == FRAME_POINTER_REGNUM ? frame_info.gpr_offset : 0)
+ (to == STACK_POINTER_REGNUM ? frame_info.total_size : 0));
}
 
 
/* -------------------------------------------------------------------------- */
/*!How many bytes at the beginning of an argument must be put into registers.
 
1849,14 → 1877,14
initializing the trampoline proper.
 
For the OR32, no static chain register is used. We choose to use the return
value (rv) register. The rvh register is used as a temporary. The code is
based on that for MIPS. The trampoline code is:
value (rv) register. The code is based on that for MIPS.
The trampoline code is:
 
l.movhi r12,hi(end_addr)
l.ori r12,lo(end_addr)
l.lwz r13,4(r12)
l.movhi r11,hi(end_addr)
l.ori r11,lo(end_addr)
l.lwz r13,4(r11)
l.jr r13
l.lwz r11,0(r12)
l.lwz r11,0(r11)
end_addr:
.word <static chain>
.word <nested_function>
1903,11 → 1931,11
 
/* Build up the code in TRAMPOLINE.
 
l.movhi r12,hi(end_addr)
l.ori r12,lo(end_addr)
l.lwz r13,4(r12)
l.movhi r11,hi(end_addr)
l.ori r11,lo(end_addr)
l.lwz r13,4(r11)
l.jr r13
l.lwz r11,0(r12)
l.lwz r11,0(r11)
end_addr:
*/
 
1920,13 → 1948,13
 
/* Emit the l.movhi, adding an operation to OR in the high bits from the
RTX. */
opcode = gen_int_mode (OR32_MOVHI (12, 0), SImode);
opcode = gen_int_mode (OR32_MOVHI (11, 0), SImode);
trampoline[i++] = expand_simple_binop (SImode, IOR, opcode, high, NULL,
false, OPTAB_WIDEN);
/* Emit the l.ori, adding an operations to OR in the low bits from the
RTX. */
opcode = gen_int_mode (OR32_ORI (12, 12, 0), SImode);
opcode = gen_int_mode (OR32_ORI (11, 11, 0), SImode);
trampoline[i++] = expand_simple_binop (SImode, IOR, opcode, low, NULL,
false, OPTAB_WIDEN);
 
1933,7 → 1961,7
/* Emit the l.lwz of the function address. No bits to OR in here, so we can
do the opcode directly. */
trampoline[i++] =
gen_int_mode (OR32_LWZ (13, 12, target_function_offset - end_addr_offset),
gen_int_mode (OR32_LWZ (13, 11, target_function_offset - end_addr_offset),
SImode);
 
/* Emit the l.jr of the function. No bits to OR in here, so we can do the
1943,7 → 1971,7
/* Emit the l.lwz of the static chain. No bits to OR in here, so we can
do the opcode directly. */
trampoline[i++] =
gen_int_mode (OR32_LWZ (STATIC_CHAIN_REGNUM, 12,
gen_int_mode (OR32_LWZ (STATIC_CHAIN_REGNUM, 11,
static_chain_offset - end_addr_offset), SImode);
 
/* Copy the trampoline code. Leave any padding uninitialized. */
1993,7 → 2021,86
 
} /* or32_dwarf_calling_convention () */
 
/* If DELTA doesn't fit into a 16 bit signed number, emit instructions to
add the highpart to DST; return the signed-16-bit lowpart of DELTA.
TMP_REGNO is a register that may be used to load a constant. */
static HOST_WIDE_INT
or32_output_highadd (FILE *file,
const char *dst, int tmp_regno, HOST_WIDE_INT delta)
{
if (delta < -32768 || delta > 32767)
{
if (delta >= -65536 && delta < 65534)
{
asm_fprintf (file, "\tl.addi\t%s,%s,%d\n",
dst, dst, (int) (delta + 1) >> 1);
delta >>= 1;
}
else
{
const char *tmp = reg_names[tmp_regno];
HOST_WIDE_INT high = (delta + 0x8000) >> 16;
 
gcc_assert (call_used_regs[tmp_regno]);
asm_fprintf (file, "\tl.movhi\t%s,%d\n" "\tl.add\t%s,%s,%s\n",
tmp, (int) high,
dst, dst, tmp);
delta -= high << 16;
}
}
return delta;
}
 
/* Output a tailcall to FUNCTION. The caller will fill in the delay slot. */
void
or32_output_tailcall (FILE *file, tree function)
{
/* We'll need to add more code if we want to fully support PIC. */
gcc_assert (!flag_pic || (*targetm.binds_local_p) (function));
 
fputs ("\tl.j\t", file);
assemble_name (file, XSTR (XEXP (DECL_RTL (function), 0), 0));
fputc ('\n', file);
}
 
static void
or32_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
tree function)
{
int this_regno
= aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function) ? 4 : 3;
const char *this_name = reg_names[this_regno];
 
 
delta = or32_output_highadd (file, this_name, PROLOGUE_TMP, delta);
if (!vcall_offset)
or32_output_tailcall (file, function);
if (delta || !vcall_offset)
asm_fprintf (file, "\tl.addi\t%s,%s,%d\n",
this_name, this_name, (int) delta);
 
/* If needed, add *(*THIS + VCALL_OFFSET) to THIS. */
if (vcall_offset != 0)
{
const char *tmp_name = reg_names[PROLOGUE_TMP];
 
/* l.lwz tmp,0(this) --> tmp = *this
l.lwz tmp,vcall_offset(tmp) --> tmp = *(*this + vcall_offset)
add this,this,tmp --> this += *(*this + vcall_offset) */
 
asm_fprintf (file, "\tl.lwz\t%s,0(%s)\n",
tmp_name, this_name);
vcall_offset = or32_output_highadd (file, tmp_name,
STATIC_CHAIN_REGNUM, vcall_offset);
asm_fprintf (file, "\tl.lwz\t%s,%d(%s)\n",
tmp_name, (int) vcall_offset, tmp_name);
or32_output_tailcall (file, function);
asm_fprintf (file, "\tl.add\t%s,%s,%s\n", this_name, this_name, tmp_name);
}
}
 
 
/* ========================================================================== */
/* Target hook initialization.
 
2009,7 → 2116,7
 
/* Default target_flags if no switches specified. */
#undef TARGET_DEFAULT_TARGET_FLAGS
#define TARGET_DEFAULT_TARGET_FLAGS (MASK_HARD_MUL)
#define TARGET_DEFAULT_TARGET_FLAGS (MASK_HARD_MUL | MASK_SCHED_LOGUE)
 
/* Output assembly directives to switch to section name. The section should
have attributes as specified by flags, which is a bit mask of the SECTION_*
2035,9 → 2142,6
#undef TARGET_PASS_BY_REFERENCE
#define TARGET_PASS_BY_REFERENCE or32_pass_by_reference
 
#undef TARGET_FRAME_POINTER_REQUIRED
#define TARGET_FRAME_POINTER_REQUIRED or32_frame_pointer_required
 
#undef TARGET_ARG_PARTIAL_BYTES
#define TARGET_ARG_PARTIAL_BYTES or32_arg_partial_bytes
 
2065,6 → 2169,12
#undef TARGET_DWARF_CALLING_CONVENTION
#define TARGET_DWARF_CALLING_CONVENTION or32_dwarf_calling_convention
 
#undef TARGET_ASM_OUTPUT_MI_THUNK
#define TARGET_ASM_OUTPUT_MI_THUNK or32_output_mi_thunk
 
#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
#define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_const_tree_hwi_hwi_const_tree_true
 
/* Trampoline stubs are yet to be written. */
/* #define TARGET_ASM_TRAMPOLINE_TEMPLATE */
/* #define TARGET_TRAMPOLINE_INIT */
2071,3 → 2181,61
 
/* Initialize the GCC target structure. */
struct gcc_target targetm = TARGET_INITIALIZER;
 
/* Lay out structs with increased alignment so that they can be accessed
more efficiently. But don't increase the size of one or two byte
structs. */
int
or32_struct_alignment (tree t)
{
unsigned HOST_WIDE_INT total = 0;
tree field;
unsigned max_align
= maximum_field_alignment ? maximum_field_alignment : BIGGEST_ALIGNMENT;
bool struct_p;
 
switch (TREE_CODE (t))
{
case RECORD_TYPE:
struct_p = true; break;
case UNION_TYPE: case QUAL_UNION_TYPE:
struct_p = false; break;
default: gcc_unreachable ();
}
/* Skip all non field decls */
for (field = TYPE_FIELDS (t); field; field = TREE_CHAIN (field))
{
unsigned HOST_WIDE_INT field_size;
 
if (TREE_CODE (field) != FIELD_DECL)
continue;
if (!host_integerp (DECL_SIZE (field), 1))
return max_align;
field_size = tree_low_cst (DECL_SIZE (field), 1);
if (field_size >= BIGGEST_ALIGNMENT)
return max_align;
if (struct_p)
total += field_size;
else
total = MAX (total, field_size);
}
 
return total < max_align ? (1U << ceil_log2 (total)) : max_align;
}
 
/* Increase the alignment of objects so that they are easier to copy.
Note that this can cause more struct copies to be inlined, so code
size might increase, but so should perfromance. */
int
or32_data_alignment (tree t, int align)
{
if (align < FASTEST_ALIGNMENT && TREE_CODE (t) == ARRAY_TYPE)
{
int size = int_size_in_bytes (t);
 
return (size > 0 && size < FASTEST_ALIGNMENT / BITS_PER_UNIT
? (1 << floor_log2 (size)) * BITS_PER_UNIT
: FASTEST_ALIGNMENT);
}
return align;
}
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/default.h
1,5 → 1,6
/* Definitions of target machine for GNU compiler for OR32.
Copyright (C) 1996, 1997, 1998, 2005 Free Software Foundation, Inc.
Copyright (C) 2010 Embecosm Limited
Contributed by Damjan Lampret <damjanl@bsemi.com> in 1999.
Based upon the rs6000 port.
70,4 → 71,4
#endif
 
#undef JUMP_TABLES_IN_TEXT_SECTION
#define JUMP_TABLES_IN_TEXT_SECTION 0
#define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/or32.h
1,6 → 1,7
/* Definitions of target machine for GNU compiler. OpenRISC 1000 version.
Copyright (C) 1987, 1988, 1992, 1995, 1996, 1999, 2000, 2001, 2002,
2003, 2004, 2005 Free Software Foundation, Inc.
Copyright (C) 2010 Embecosm Limited
Contributed by Damjan Lampret <damjanl@bsemi.com> in 1999.
Major optimizations by Matjaz Breskvar <matjazb@bsemi.com> in 2005.
 
46,13 → 47,13
#undef CPP_SPEC
#define CPP_SPEC "%{mor32-newlib*:-idirafter %(target_prefix)/newlib-include}"
 
/* Make sure we pick up the crtinit.o and crtfini.o files. */
/* Make sure we pick up the or32-crtbegin.o and or32-crtend.o files. */
#undef STARTFILE_SPEC
#define STARTFILE_SPEC "%{!shared:%{mor32-newlib*:%(target_prefix)/newlib/crt0.o} \
%{!mor32-newlib*:crt0.o%s} crtinit.o%s}"
%{!mor32-newlib*:crt0.o%s} crti.o%s crtbegin.o%s}"
 
#undef ENDFILE_SPEC
#define ENDFILE_SPEC "crtfini.o%s"
#define ENDFILE_SPEC "crtend.o%s crtn.o%s"
 
/* Specify the newlib library path if necessary */
#undef LINK_SPEC
121,7 → 122,7
#define EMPTY_FIELD_BOUNDARY 8
 
/* Every structure's size must be a multiple of this. */
#define STRUCTURE_SIZE_BOUNDARY 32
#define STRUCTURE_SIZE_BOUNDARY (TARGET_PADSTRUCT ? 32 : 8)
 
/* A bitfield declared as `int' forces `int' alignment for the struct. */
#define PCC_BITFIELD_TYPE_MATTERS 1
132,6 → 133,15
/* The best alignment to use in cases where we have a choice. */
#define FASTEST_ALIGNMENT 32
 
#define ROUND_TYPE_ALIGN(STRUCT, COMPUTED, SPECIFIED) \
((TREE_CODE (STRUCT) == RECORD_TYPE \
|| TREE_CODE (STRUCT) == UNION_TYPE \
|| TREE_CODE (STRUCT) == QUAL_UNION_TYPE) \
&& !TYPE_PACKED (STRUCT) \
&& TYPE_FIELDS (STRUCT) != 0 \
? MAX (MAX ((COMPUTED), (SPECIFIED)), or32_struct_alignment (STRUCT)) \
: MAX ((COMPUTED), (SPECIFIED))) \
 
/* Make strings word-aligned so strcpy from constants will be faster. */
/*
#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
151,7 → 161,14
|| TREE_CODE (TYPE) == UNION_TYPE \
|| TREE_CODE (TYPE) == RECORD_TYPE)) ? FASTEST_ALIGNMENT : (ALIGN))
*/ /* CHECK - btw code gets bigger with this one */
#define DATA_ALIGNMENT(TYPE, ALIGN) \
((ALIGN) < FASTEST_ALIGNMENT \
? or32_data_alignment ((TYPE), (ALIGN)) : (ALIGN))
 
#define LOCAL_ALIGNMENT(TYPE, ALIGN) \
((ALIGN) < FASTEST_ALIGNMENT \
? or32_data_alignment ((TYPE), (ALIGN)) : (ALIGN))
 
/* Define this if move instructions will actually fail to work
when given unaligned data. */
#define STRICT_ALIGNMENT 1 /* CHECK */
198,13 → 215,13
The hardware registers are assigned numbers for the compiler
from 0 to just below FIRST_PSEUDO_REGISTER.
All registers that the compiler knows about must be given numbers,
even those that are not normally considered general registers.
even those that are not normally considered general registers. */
 
JPB 1-Sep-10: I think the old stuff was incorrect. Regs 0-31 are the GPRs,
reg 32 is the CC register, all the rest are pseudo. I think
OR32_LAST_INT_REG should be 31, not 32. */
#define OR32_LAST_INT_REG 32
#define OR32_FLAGS_REG (OR32_LAST_INT_REG + 0)
#define OR32_LAST_ACTUAL_REG 31
#define ARG_POINTER_REGNUM (OR32_LAST_ACTUAL_REG + 1)
#define FRAME_POINTER_REGNUM (ARG_POINTER_REGNUM + 1)
#define OR32_LAST_INT_REG FRAME_POINTER_REGNUM
#define OR32_FLAGS_REG (OR32_LAST_INT_REG + 1)
#define FIRST_PSEUDO_REGISTER (OR32_FLAGS_REG + 1)
 
/* 1 for registers that have pervasive standard uses
213,10 → 230,10
r2 as frame/arg pointer. r9 is link register, r0
is zero, r10 is linux thread */
#define FIXED_REGISTERS { \
1, 1, 1, 0, 0, 0, 0, 0, \
1, 1, 0, 0, 0, 0, 0, 0, \
0, 1, 1, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 1}
0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1 }
/* 1 for registers not available across function calls.
These must include the FIXED_REGISTERS and also any
registers that can be used without being saved.
224,13 → 241,13
and the register where structure-value addresses are passed.
Aside from that, you can include as many other registers as you like. */
#define CALL_USED_REGISTERS { \
1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 0, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 0, 1, 0, 1, \
0, 1, 0, 1, 0, 1, 0, 1, \
0, 1, 0, 1, 0, 1, 0, 1, 1}
0, 1, 0, 1, 0, 1, 0, 1, 1, 1, 1}
 
/* stack pointer: must be FIXED and CALL_USED */
/* frame pointer: must be FIXED and CALL_USED */
/* hard frame pointer: must be FIXED and CALL_USED */
 
/* Return number of consecutive hard regs needed starting at reg REGNO
to hold something of mode MODE.
322,7 → 339,7
#define STACK_POINTER_REGNUM 1
 
/* Base register for access to local variables of the function. */
#define FRAME_POINTER_REGNUM 2
#define HARD_FRAME_POINTER_REGNUM 2
 
/* Link register. */
#define LINK_REGNUM 9
358,16 → 375,13
+ OR32_ALIGN (get_frame_size(), 4); \
}
 
/* Base register for access to arguments of the function. */
#define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
/* Register in which static-chain is passed to a function. */
 
/* Register in which static-chain is passed to a function.
 
JPB 4-Sep-10: r0 was the wrong thing to use here. I'll take a punt at
using r11 (return value reg). This is a change to the
ABI, which needs documenting. */
#define STATIC_CHAIN_REGNUM 11
 
#define PROLOGUE_TMP 13
#define EPILOGUE_TMP 3
 
/* Register in which address to store a structure value
is passed to a function. */
/*#define STRUCT_VALUE_REGNUM 0*/
440,8 → 454,8
#define REG_CLASS_CONTENTS \
{ \
{ 0x00000000, 0x00000000 }, /* NO_REGS */ \
{ 0xffffffff, 0x00000001 }, /* GENERAL_REGS */ \
{ 0xffffffff, 0x00000000 } /* ALL_REGS */ \
{ 0xffffffff, 0x00000003 }, /* GENERAL_REGS */ \
{ 0xffffffff, 0x00000007 } /* ALL_REGS */ \
}
 
/* The same information, inverted:
449,10 → 463,9
Return the class number of the smallest class containing reg number REGNO.
This could be a conditional expression or could index an array.
 
For the OR32, so long as the reg is r1-r31, we are in GENERAL_REGS, if we
are > 32, then we are in NO_REGS, otherwise we are in ALL_REGS. */
??? 0 is not really a register, but a constant. */
#define REGNO_REG_CLASS(regno) \
((0 == regno) ? ALL_REGS : ((1 <= regno) && (regno <= 31)) \
((0 == regno) ? ALL_REGS : ((1 <= regno) && (regno <= OR32_LAST_INT_REG)) \
? GENERAL_REGS : NO_REGS)
 
/* The class value for index registers, and the one for base regs. */
459,35 → 472,6
#define INDEX_REG_CLASS GENERAL_REGS
#define BASE_REG_CLASS GENERAL_REGS
 
/* Get reg_class from a letter such as appears in the machine description. */
/* JPB 29 Aug 10: Obsolete, need to be replaced. */
#define REG_CLASS_FROM_LETTER(C) NO_REGS
 
/* A C expression that defines the machine-dependent operand constraint
letters ('I', 'J', 'K', . . . 'P') that specify particular ranges of
integer values. If "c" is one of those letters, the expression should check
that value, an integer, is in the appropriate range and return 1 if so, 0
otherwise. If "c" is not one of those letters, the value should be 0
regardless of value.
 
For OR32, I don't believe we use J, O or P, so these should return 0.
 
JPB 29 Aug 10: Obsolete, need to be replaced. */
#define CONST_OK_FOR_LETTER_P(value, c) \
( (c) == 'I' ? ((value) >= -32768 && (value) <= 32767) \
: (c) == 'J' ? ((value) == 0) \
: (c) == 'K' ? ((value) >=0 && (value) <= 65535) \
: (c) == 'L' ? ((value) >=0 && (value) <= 31) \
: (c) == 'M' ? (((value) & 0xffff) == 0) \
: (c) == 'N' ? ((value) >= -33554432 && (value) <= 33554431) \
: (c) == 'O' ? ((value) == 0) \
: 0 )
 
/* Similar, but for floating constants, and defining letters G and H.
Here "value" is the CONST_DOUBLE rtx itself. */
/* JPB 29 Aug 10: Obsolete, need to be replaced. */
#define CONST_DOUBLE_OK_FOR_LETTER_P(value, C) 1
 
/* Given an rtx X being reloaded into a reg required to be in class CLASS,
return the class of reg to actually use. In general this is just CLASS;
but on some machines in some cases it is preferable to use a more
554,6 → 538,15
This is the approached used by OR32. */
#define ACCUMULATE_OUTGOING_ARGS 1
 
#define ELIMINABLE_REGS \
{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{ ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{ FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
 
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
(OFFSET) = or32_initial_elimination_offset ((FROM), (TO))
 
/* A C expression that should indicate the number of bytes of its own
arguments that a function pops on returning, or 0 if the function pops no
arguments and the caller must therefore pop them all after the function
780,9 → 773,12
prologue. This RTL is either a REG, indicating that the return
value is saved in REG, or a MEM representing a location in
the stack. */
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, GP_ARG_RETURN)
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, LINK_REGNUM)
 
#define RETURN_ADDR_RTX(COUNT, FP) \
((COUNT) ? NULL_RTX : get_hard_reg_initial_val (Pmode, LINK_REGNUM))
 
 
/* Addressing modes, and classification of registers for them. */
 
/* #define HAVE_POST_INCREMENT */
963,7 → 959,7
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
"r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \
"cc-flag"}
"argp", "frame", "cc-flag"}
 
 
/* -------------------------------------------------------------------------- */
1136,8 → 1132,12
 
/* This is how to output an element of a case-vector that is relative. */
#define ASM_OUTPUT_ADDR_DIFF_ELT(stream, body, value, rel) \
fprintf (stream, "\t.wordt.L%d-.L%d\n", value, rel)
fprintf (stream, "\t.word\t.L%d-.L%d\n", value, rel)
 
#define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
/* ??? If we were serious about PIC, we should also use l.jal to get
the table start address. */
 
/* This is how to output an assembler line that says to advance the location
counter to a multiple of 2**log bytes. */
#define ASM_OUTPUT_ALIGN(stream, log) \
1286,6 → 1286,8
else \
abort (); \
} \
else if (code == 'J') \
or32_print_jump_restore (x); \
else if (GET_CODE (x) == REG) \
fprintf (stream, "%s", reg_names[REGNO (x)]); \
else if (GET_CODE (x) == MEM) \
1337,7 → 1339,7
/* The size of the trampoline in bytes. This is a block of code followed by
two words specifying the function address and static chain pointer. */
#define TRAMPOLINE_SIZE \
(or32_trampoline_code_size + GET_MODE_SIZE (ptr_mode) * 2)
(or32_trampoline_code_size () + GET_MODE_SIZE (ptr_mode) * 2)
 
/* Alignment required for trampolines, in bits.
 
/openrisc/trunk/gnu-src/gcc-4.5.1/gcc/config/or32/elf.h
26,12 → 26,6
#undef OBJECT_FORMAT_ELF
#define OBJECT_FORMAT_ELF
 
/* use SDB debugging info and make it default */
#undef DBX_DEBUGGING_INFO
#define DBX_DEBUGGING_INFO
 
#undef PREFERRED_DEBUGGING_TYPE
#define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
 
#undef PUT_SDB_DEF
#define PUT_SDB_DEF
/* or32 debug info support is controlled by tm.h header files we include:
dbxelf.h enables optional stabs debug info.
elfos.h sets PREFERRED_DEBUGGING_TYPE to DWARF2_DEBUG . */
/openrisc/trunk/gnu-src/gdb-7.2/sim/or32/wrapper.c
114,7 → 114,7
static SIM_DESC static_sd = NULL;
 
#ifdef OR32_SIM_DEBUG
printf ("sim_open called\n");
printf ("sim_open called\n", (int) kind);
#endif
 
/* If static_sd is not yet allocated, we allocate it and mark the simulator
364,7 → 364,7
int res = or1ksim_read_mem (mem, buf, len);
 
#ifdef OR32_SIM_DEBUG
printf ("Reading %d bytes from 0x%08p\n", len, mem);
printf ("Reading %d bytes from 0x%8p\n", len, (void *) mem);
#endif
 
return res;
390,7 → 390,7
int len)
{
#ifdef OR32_SIM_DEBUG
printf ("Writing %d bytes to 0x%08p\n", len, mem);
printf ("Writing %d bytes to 0x%8p\n", len, (void *) mem);
#endif
 
return or1ksim_write_mem ((unsigned int) mem, buf, len);
433,7 → 433,7
#endif
if (4 != len)
{
fprintf (stderr, "Invalid register length %d\n");
fprintf (stderr, "Invalid register length %d\n", len);
return 0;
}
 
499,7 → 499,7
 
if (4 != len)
{
fprintf (stderr, "Invalid register length %d\n");
fprintf (stderr, "Invalid register length %d\n", len);
return 0;
}
 
588,6 → 588,7
 
unsigned long int retval; /* Return value on Or1ksim exit */
 
unsigned long int cycles; /* Length of run in cycles */
int res; /* Result of a run. */
 
#ifdef OR32_SIM_DEBUG
634,6 → 635,9
(void) or1ksim_write_reg (OR32_NPC_REGNUM, sd->resume_npc);
}
 
/* Set a time point */
or1ksim_set_time_point ();
 
/* Unstall and run */
or1ksim_set_stall_state (0);
res = or1ksim_run (-1.0);
648,6 → 652,9
(void) or1ksim_read_reg (OR32_FIRST_ARG_REGNUM, &retval);
sd->last_rc = (unsigned int) retval;
sd->resume_npc = OR32_RESET_EXCEPTION;
cycles = (long int) (or1ksim_get_time_period ()
* (double) or1ksim_clock_rate());
printf ("%ld cycles: Exiting (%u)\n", cycles, sd->last_rc);
break;
 
case OR1KSIM_RC_BRKPT:
757,6 → 764,10
sim_do_command (SIM_DESC sd ATTRIBUTE_UNUSED,
char *cmd ATTRIBUTE_UNUSED)
{
#ifdef OR32_SIM_DEBUG
printf ("sim_do_command called\n");
#endif
 
} /* sim_do_command () */
 
 
772,6 → 783,10
void
sim_set_callbacks (struct host_callback_struct *ptr ATTRIBUTE_UNUSED)
{
#ifdef OR32_SIM_DEBUG
printf ("sim_set_callbacks called\n");
#endif
 
} /* sim_set_callbacks () */
 
 
787,6 → 802,10
void
sim_size (int size ATTRIBUTE_UNUSED)
{
#ifdef OR32_SIM_DEBUG
printf ("sim_size called\n");
#endif
 
} /* sim_size () */
 
 
802,4 → 821,8
void
sim_trace (SIM_DESC sd ATTRIBUTE_UNUSED)
{
#ifdef OR32_SIM_DEBUG
printf ("sim_trace called\n");
#endif
 
} /* sim_trace () */
/openrisc/trunk/gnu-src/gdb-7.2/sim/or32/ChangeLog
1,3 → 1,9
2010-09-20 Jeremy Bennett <jeremy.bennett@embecosm.com>
 
* wrapper.c (sim_read, sim_write). Corrected pointer print format.
(sim_fetch_register, sim_store_register): Added missing arg "len"
to debug printf statements.
 
2010-09-01 Jeremy Bennett <jeremy.bennett@embecosm.com>
 
* wrapper.c (sim_write). Buffer changed to const char.
/openrisc/trunk/gnu-src/newlib-1.18.0/newlib/ChangeLog
1,3 → 1,8
2010-10-29 Joern Rennecke <joern.rennecke@embecosm.com>
 
* libc/machine/or32/setjmp.S, libc/machine/or32/longjmp.S:
Rename _setjmp / _longjmp to setjmp / longjmp.
 
2010-07-07 Jeremy Bennett <jeremy.bennett@embecosm.com>
 
* testsuite/lib/newlibprocs.exp: Renamed from newlib.exp, since
/openrisc/trunk/gnu-src/newlib-1.18.0/newlib/libc/machine/or32/setjmp.S
25,11 → 25,11
 
/* -------------------------------------------------------------------------- */
/*!_setjmp
/*!setjmp
 
All processor state is saved in the buffer provided. We need not save r0
(it will always be zero) and we need not save r11 (it will always be
overridden here, and in _longjmp).
overridden here, and in longjmp).
 
@todo We should prefer to save and restore the status register, but this is
not directly possible in user code. There is some merit in code to
41,9 → 41,9
@return zero.
/* -------------------------------------------------------------------------- */
.align 4
.global _setjmp
.type _setjmp,@function
_setjmp:
.global setjmp
.type setjmp,@function
setjmp:
l.sw 4(r3),r1 /* Slot 0 saved for flag in future */
l.sw 8(r3),r2
l.sw 12(r3),r3
78,4 → 78,4
l.jr r9
l.addi r11,r0,0 /* Zero result */
 
.size _setjmp, .-_setjmp
.size setjmp, .-setjmp
/openrisc/trunk/gnu-src/newlib-1.18.0/newlib/libc/machine/or32/longjmp.S
47,9 → 47,9
@return val, unless val is zero, in which case 1 is returned.
/* -------------------------------------------------------------------------- */
.align 4
.global _longjmp
.type _longjmp,@function
_longjmp:
.global longjmp
.type longjmp,@function
longjmp:
/* Sort out the return value */
l.sfne r4,r0
l.bf 1f
93,9 → 93,9
l.lwz r3,12(r3) /* Now safe */
/* Result is already in r11. Having restored r9, it will appear as
though we have returned from the earlier call to _setjmp. The
though we have returned from the earlier call to setjmp. The
non-zero result gives it away though. */
l.jr r9
l.nop
 
.size _longjmp, .-_longjmp
.size longjmp, .-longjmp
/openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/ChangeLog.or32
1,3 → 1,22
2010-10-29 Joern Rennecke <joern.rennecke@embecosm.com>
 
* or32/crt0.S (_start): After main, call exit.
 
* or32/crt0.S: Rename implementation symbols to reside in the
implementation namespace.
* or32/read-uart.c, or32/write-uart.c, or32/uart-dummy.c: Likewise.
* or32/uart.c, or32/uart.h: Likewise.
 
* or32/crt0.S (UNHANDLED_EXCEPTION): Call exit.
 
2010-10-28 Joern Rennecke <joern.rennecke@embecosm.com>
 
* or32/crt0.S (_start): Rename fini to __fini.
 
2010-09-13 Joern Rennecke <joern.rennecke@embecosm.com>
 
* or32/crt0.S (_start): Rename init to __init.
 
2010-08-19 Jeremy Bennett <jeremy.bennett@embecosm.com>
 
* or32/crt0.S (_start): Remove all leading underscores from
/openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/read-uart.c
64,9 → 64,9
 
for (i = 0; i < len; i++)
{
buf[i] = _uart_getc ();
buf[i] = __uart_getc ();
#ifdef UART_AUTO_ECHO
_uart_putc (buf[i]);
__uart_putc (buf[i]);
#endif
/* Return partial buffer if we get EOL */
if ('\n' == buf[i])
/openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/crt0.S
60,7 → 60,7
l.sw 8(r1),r5 ;\
;\
l.ori r3,r0,0xffff /* Failure RC */ ;\
l.jal _exit ;\
l.jal exit ;\
l.nop ;\
;\
l.rfe /* Never executed we hope */
110,7 → 110,7
 
/* 0x100: RESET exception */
.org 0x100
_reset:
__reset:
/* Jump to program initialisation code */
l.j _start
l.nop
124,16 → 124,16
 
We use registers we know will not interfere in this case. */
.org 0x200
_buserr:
__buserr:
l.nop /* Will be overwritten */
l.nop
l.nop
l.nop
 
_buserr_std:
__buserr_std:
UNHANDLED_EXCEPTION (.L200)
 
_buserr_special:
__buserr_special:
l.mfspr r24,r0,SPR_EPCR_BASE
l.addi r24,r24,4 /* Return one instruction on */
l.mtspr r0,r24,SPR_EPCR_BASE
272,12 → 272,12
_start:
/* Finding the end of stack means we need to handle the bus
error. Patch in some special handler code. */
l.movhi r30,hi(_buserr) /* Where to copy to */
l.ori r30,r30,lo(_buserr)
l.movhi r28,hi(_buserr_std) /* Where to stop copying */
l.ori r28,r28,lo(_buserr_std)
l.movhi r26,hi(_buserr_special) /* Where to copy from */
l.ori r26,r26,lo(_buserr_special)
l.movhi r30,hi(__buserr) /* Where to copy to */
l.ori r30,r30,lo(__buserr)
l.movhi r28,hi(__buserr_std) /* Where to stop copying */
l.ori r28,r28,lo(__buserr_std)
l.movhi r26,hi(__buserr_special)/* Where to copy from */
l.ori r26,r26,lo(__buserr_special)
 
.L11: l.sfeq r28,r30
l.bf .L12
325,10 → 325,10
l.add r2,r30,r0
 
/* Clear out the bus error vector special code. */
l.movhi r30,hi(_buserr)
l.ori r30,r30,lo(_buserr)
l.movhi r28,hi(_buserr_std)
l.ori r28,r28,lo(_buserr_std)
l.movhi r30,hi(__buserr)
l.ori r30,r30,lo(__buserr)
l.movhi r28,hi(__buserr_std)
l.ori r28,r28,lo(__buserr_std)
l.movhi r26,0x1500 /* l.nop 0 */
l.ori r26,r26,0x0000
 
453,17 → 453,17
l.addi r28,r28,4 /* Delay slot */
 
/* Call global and static constructors */
l.jal init
l.jal __init
l.nop
/* Set up destructors to be called from exit if main never returns */
l.movhi r3,hi(fini)
l.movhi r3,hi(__fini)
l.jal atexit
l.ori r3,r3,lo(fini) /* Delay slot */
l.ori r3,r3,lo(__fini) /* Delay slot */
 
/* Initialise UART in a C function. If the UART isn't present, we'll */
/* link against a dummy function. */
l.jal _uart_init
l.jal __uart_init
l.nop
 
/* Jump to main program entry point (argc = argv = envp = 0) */
473,7 → 473,7
l.or r5,r0,r0 /* Delay slot */
 
/* If program exits, call exit routine */
l.jal _exit
l.jal exit
l.addi r3,r11,0 /* Delay slot */
 
/* Loop forever */
/openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/write-uart.c
47,7 → 47,7
static void
outbyte (char c)
{
_uart_putc (c);
__uart_putc (c);
 
} /* outbyte () */
 
/openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/uart-dummy.c
40,6 → 40,6
It does nothing!
/* -------------------------------------------------------------------------- */
void
_uart_init ()
__uart_init ()
{
} /* _uart_init () */
} /* __uart_init () */
/openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/uart.c
69,7 → 69,7
/*!Initialize the UART */
/* -------------------------------------------------------------------------- */
void
_uart_init ()
__uart_init ()
{
int divisor;
 
93,7 → 93,7
UREG8 (UART_DLM) = (divisor >> 8) & 0x000000ff;
UREG8 (UART_LCR) &= ~(UART_LCR_DLAB);
 
} /* _uart_init () */
} /* __uart_init () */
 
 
/* -------------------------------------------------------------------------- */
101,7 → 101,7
 
@param[in] c The character to output */
/* -------------------------------------------------------------------------- */
void _uart_putc (char c)
void __uart_putc (char c)
{
unsigned char lsr;
 
112,7 → 112,7
UREG8 (UART_TX) = c;
WAIT_FOR_XMITR;
 
} /* _uart_putc () */
} /* __uart_putc () */
 
 
/* -------------------------------------------------------------------------- */
121,7 → 121,7
@reurn The character read. */
/* -------------------------------------------------------------------------- */
char
_uart_getc ()
__uart_getc ()
{
unsigned char lsr;
char c;
131,4 → 131,4
 
return UREG8 (UART_RX);
 
} /* _uart_getc () */
} /* __uart_getc () */
/openrisc/trunk/gnu-src/newlib-1.18.0/libgloss/or32/uart.h
149,8 → 149,8
#define UART_EFR_ENI 0x10 /* Enhanced Interrupt */
 
/* The library functions defined here, avoiding namespace polution. */
extern void _uart_init ();
extern void _uart_putc (char c);
extern char _uart_getc ();
extern void __uart_init ();
extern void __uart_putc (char c);
extern char __uart_getc ();
 
#endif /* UART__H */
/openrisc/trunk/gnu-src/binutils-2.20.1/bfd/elf32-or32.c
1,8 → 1,10
/* OR32-specific support for 32-bit ELF
Copyright 2002, 2004, 2005, 2007 Free Software Foundation, Inc.
Copyright (C) 2010 Embecosm Limited
Contributed by Ivan Guzvinec <ivang@opencores.org>
Modified by Gyorgy Jeney <nog@sdf.lonestar.org> and
Balint Cristian <rezso@rdsor.ro>
Changed from Rel to Rela by Joern Rennecke <joern.rennecke@embecosm.com>.
 
This file is part of BFD, the Binary File Descriptor library.
 
29,9 → 31,13
#include "elf/common.h"
#include "libiberty.h"
 
/* We need RELA in order to handle highpart relocations independent of
the presence and/or location and/or value of a lowpart relocation. */
#if 0
/* Try to minimize the amount of space occupied by relocation tables
on the ROM (not that the ROM won't be swamped by other ELF overhead). */
#define USE_REL 1
#endif
 
/* Set the right machine number for an OR32 ELF file. */
 
59,6 → 65,7
elf_elfheader (abfd)->e_flags &=~ EF_OR32_MACH;
}
 
#if 0 /* Not needed for RELA. */
static bfd_reloc_status_type
or32_elf_generic_reloc (bfd *abfd,
arelent *reloc_entry,
220,6 → 227,7
input_section, output_bfd,
error_message);
}
#endif
 
 
static reloc_howto_type elf_or32_howto_table[] =
247,10 → 255,10
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
bfd_elf_generic_reloc, /* special_function */
"R_OR32_32", /* name */
TRUE, /* partial_inplace */
0xffffffff, /* src_mask */
FALSE, /* partial_inplace */
0, /* src_mask */
0xffffffff, /* dst_mask */
FALSE), /* pcrel_offset */
 
262,10 → 270,10
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
bfd_elf_generic_reloc, /* special_function */
"R_OR32_16", /* name */
TRUE, /* partial_inplace */
0x0000ffff, /* src_mask */
FALSE, /* partial_inplace */
0, /* src_mask */
0x0000ffff, /* dst_mask */
FALSE), /* pcrel_offset */
 
277,10 → 285,10
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
bfd_elf_generic_reloc, /* special_function */
"R_OR32_8", /* name */
TRUE, /* partial_inplace */
0x000000ff, /* src_mask */
FALSE, /* partial_inplace */
0, /* src_mask */
0x000000ff, /* dst_mask */
FALSE), /* pcrel_offset */
 
292,10 → 300,10
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
or32_elf_const_reloc, /* special_function */
bfd_elf_generic_reloc, /* special_function */
"R_OR32_CONST", /* name */
TRUE, /* partial_inplace */
0x0000ffff, /* src_mask */
FALSE, /* partial_inplace */
0, /* src_mask */
0x0000ffff, /* dst_mask */
FALSE), /* pcrel_offset */
 
307,10 → 315,10
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
or32_elf_consth_reloc, /* special_function */
bfd_elf_generic_reloc, /* special_function */
"R_OR32_CONSTH", /* name */
TRUE, /* partial_inplace */
0x0000ffff, /* src_mask */
FALSE, /* partial_inplace */
0, /* src_mask */
0x0000ffff, /* dst_mask */
FALSE), /* pcrel_offset */
 
322,12 → 330,12
TRUE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
or32_elf_generic_reloc,/* special_function */
bfd_elf_generic_reloc, /* special_function */
"R_OR32_JUMPTARG", /* name */
TRUE, /* partial_inplace */
0x03ffffff, /* src_mask */
FALSE, /* partial_inplace */
0, /* src_mask */
0x03ffffff, /* dst_mask */
TRUE), /* pcrel_offset */
FALSE), /* pcrel_offset */
 
/* GNU extension to record C++ vtable hierarchy. */
HOWTO (R_OR32_GNU_VTINHERIT, /* type */
360,6 → 368,104
FALSE), /* pcrel_offset */
};
 
static bfd_boolean
or32_relocate_section (bfd * output_bfd,
struct bfd_link_info *info,
bfd * input_bfd,
asection * input_section,
bfd_byte * contents,
Elf_Internal_Rela * relocs,
Elf_Internal_Sym * local_syms,
asection ** local_sections)
{
Elf_Internal_Shdr *symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
struct elf_link_hash_entry **sym_hashes = elf_sym_hashes (input_bfd);
Elf_Internal_Rela *rel= rel = relocs;
Elf_Internal_Rela *relend = relocs + input_section->reloc_count;
 
for (; rel < relend; rel++)
{
int r_type = ELF32_R_TYPE (rel->r_info);
reloc_howto_type *howto;
unsigned long r_symndx;
struct elf_link_hash_entry *h = NULL;
Elf_Internal_Sym *sym = NULL;
asection *sec = NULL;
bfd_vma relocation = 0;
bfd_reloc_status_type r;
const char *name = NULL;
 
if ((unsigned) r_type >= ARRAY_SIZE (elf_or32_howto_table))
{
bfd_set_error (bfd_error_bad_value);
return FALSE;
}
 
if (r_type == R_OR32_GNU_VTENTRY
|| r_type == R_OR32_GNU_VTINHERIT)
continue;
 
howto = &elf_or32_howto_table[r_type];
r_symndx = ELF32_R_SYM (rel->r_info);
 
if (r_symndx < symtab_hdr->sh_info)
{
sym = local_syms + r_symndx;
sec = local_sections[r_symndx];
relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
 
name = bfd_elf_string_from_elf_section
(input_bfd, symtab_hdr->sh_link, sym->st_name);
name = (name == NULL) ? bfd_section_name (input_bfd, sec) : name;
}
else
{
bfd_boolean unresolved_reloc, warned;
 
RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
r_symndx, symtab_hdr, sym_hashes,
h, sec, relocation,
unresolved_reloc, warned);
}
 
if (sec != NULL && elf_discarded_section (sec))
{
/* For relocs against symbols from removed linkonce sections,
or sections discarded by a linker script, we just want the
section contents zeroed. Avoid any special processing. */
_bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
rel->r_info = 0;
rel->r_addend = 0;
continue;
}
 
if (info->relocatable)
continue;
 
r = _bfd_final_link_relocate (howto, input_bfd, input_section, contents,
rel->r_offset, relocation, rel->r_addend);
if (r != bfd_reloc_ok)
{
const char *msg = NULL;
 
switch (r)
{
/* FIXME: give useful messages for possible errors. */
default:
msg = _("internal error: unknown error");
break;
}
if (msg)
r = info->callbacks->warning
(info, msg, name, input_bfd, input_section, rel->r_offset);
 
if (!r)
return FALSE;
}
}
return TRUE;
}
 
/* Map BFD reloc types to OR32 ELF reloc types. */
 
struct or32_reloc_map
442,5 → 548,7
#define elf_backend_object_p or32_elf_object_p
#define elf_backend_final_write_processing \
or32_elf_final_write_processing
#define elf_backend_rela_normal 1
#define elf_backend_relocate_section or32_relocate_section
 
#include "elf32-target.h"
/openrisc/trunk/gnu-src/bld.sh
26,6 → 26,8
# binutils, so is built on its own.
component_dirs='binutils-2.20.1 newlib-1.18.0 gcc-4.5.1'
gdb_dir='gdb-7.2'
linux_dir='linux-2.6.35'
uclibc_dir='uclibc-0.9.31'
unified_src=srcw
build_dir=bld-or32
gdb_build_dir=bld-gdb
282,7 → 284,7
--with-or1ksim=${or1ksim_dir} \
${newlibconfigure} \
--enable-fast-install=N/A --disable-libssp \
--enable-languages=c --prefix=${install_dir}
--enable-languages=c,c++ --prefix=${install_dir}
 
if [ $? != 0 ]
then
316,18 → 318,18
exit 1
fi
 
make all-target-libgcc all-target-libstdc++-v3 ${newlibmake}
make all-target-libgcc ${newlibmake}
if [ $? != 0 ]
then
echo "make (libraries) failed."
echo "make (libgcc and Newlib) failed."
exit 1
fi
 
# GDB has to be built separately at present.
# GDB and simulator have to be built separately at present.
cd ..
cd ${gdb_build_dir}
 
make all-build all-gdb
make all-build all-sim all-gdb
if [ $? != 0 ]
then
echo "make (GDB) failed."
346,8 → 348,7
cd {build_dir}
 
for tool_check in check-binutils check-gas check-ld check-gcc \
check-target-libgcc check-target-libstdc++-v3 \
${newlibcheck}
check-target-libgcc ${newlibcheck}
do
make ${tool_check}
 
361,7 → 362,7
cd ..
cd ${gdb_build_dir}
 
make check-gdb
make check-sim check-gdb
 
if [ $? != 0 ];
then
378,7 → 379,7
cd ${build_dir}
 
make install-binutils install-gas install-ld install-gcc \
install-target-libgcc install-target-libstdc++-v3 ${newlibinstall}
install-target-libgcc ${newlibinstall}
 
if [ $? != 0 ];
then
390,7 → 391,7
cd ..
cd ${gdb_build_dir}
 
make install-gdb
make install-sim install-gdb
 
if [ $? != 0 ];
then
435,5 → 436,3
mv ${install_dir}/or32-elf/lib/crt0.o ${install_dir}/or32-elf/newlib
fi
fi
 
# uClibc could be safely built and installed now
/openrisc/trunk/gnu-src/boards/or32-sim.exp
12,8 → 12,8
setup_sim or32
 
# Options for the simulator
set cfg_file [lookfor_file ${srcdir} libgloss/or32/sim.cfg]
set_board_info sim,options "-a \"-f ${cfg_file}\""
# set cfg_file [lookfor_file ${srcdir} libgloss/or32/sim.cfg]
# set_board_info sim,options "-a \"-f ${cfg_file}\""
 
# No multilib options needed by default.
process_multilib_options ""
42,7 → 42,7
set_board_info ldscript ""
 
# This simulator isn't slow.
set_board_info slow_simulator 0
set_board_info slow_simulator 1
 
# Can't pass arguments to programs on this target..
set_board_info noargs 1

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