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URL https://opencores.org/ocsvn/hpdmc/hpdmc/trunk

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Rev 4 → Rev 5

/trunk/test/tb_hpdmc.v
288,6 → 288,38
end
endtask
 
task wbwriteburst;
input [31:0] address;
integer i;
begin
wb_adr_i = address;
wb_cyc_i = 1'b1;
wb_stb_i = 1'b1;
wb_we_i = 1'b1;
wb_sel_i = 8'hff;
wb_dat_i = {$random, $random};
wb_cti_i = 3'b010;
i = 0;
#1;
while(~wb_ack_o) begin
i = i+1;
waitclock;
end
$display("Memory Write : %x=%x acked in %d clocks", address, wb_dat_i, i);
for(i=0;i<3;i=i+1) begin
wb_dat_i = {$random, $random};
waitclock;
$display("(burst continuing) %x", wb_dat_i);
end
wb_cti_i = 3'b000;
wb_cyc_i = 1'b0;
wb_stb_i = 1'b0;
wb_we_i = 1'b0;
waitclock;
end
endtask
 
always begin
$dumpfile("hpdmc.vcd");
 
417,9 → 449,13
wb_nextadr_valid = 1'b0;
wbreadburst(32'h60);*/
wbwrite(32'h00000000, 64'h1111222233334444);
//wbwrite(32'h00000000, 64'h1111222233334444);
wbwriteburst(32'h00);
waitnclock(10);
wbreadburst(32'h00);
//wbreadburst(32'h00);
//waitnclock(10);
$finish;
end
/trunk/test/ddr.v
165,12 → 165,12
`endif
 
// added by lekernel: for testing reads before testing writes
integer fillmem_i;
/*integer fillmem_i;
initial begin
for(fillmem_i=0;fillmem_i<100;fillmem_i=fillmem_i+1) begin
mem_array[fillmem_i] = $random;
end
end
end*/
 
// Dqs edge checking
integer i;
/trunk/rtl/hpdmc_ddrio.v
61,29 → 61,25
reg [1:0] wfifo_consume;
 
/* Writes to the Write FIFO */
always @(posedge rst, posedge clk) begin
if(rst)
wfifo_produce <= 2'b00;
else begin
if(buffer_w_nextburst) begin
wfifo_produce <= 2'b00;
wfifomask1[0] <= 4'b1111;
wfifomask1[1] <= 4'b1111;
wfifomask1[2] <= 4'b1111;
wfifomask1[3] <= 4'b1111;
wfifomask0[0] <= 4'b1111;
wfifomask0[1] <= 4'b1111;
wfifomask0[2] <= 4'b1111;
wfifomask0[3] <= 4'b1111;
end else if(buffer_w_next)
wfifo_produce <= wfifo_produce + 1;
if(buffer_w_next) begin
$display("Pushing into Write FIFO Mask %h", buffer_w_mask);
wfifomask1[wfifo_produce] <= buffer_w_mask[7:4];
wfifomask0[wfifo_produce] <= buffer_w_mask[3:0];
wfifo1[wfifo_produce] <= buffer_w_dat[63:32];
wfifo0[wfifo_produce] <= buffer_w_dat[31:0];
end
always @(posedge clk) begin
if(buffer_w_nextburst) begin
wfifomask1[0] <= buffer_w_mask[7:4];
wfifomask1[1] <= 4'b1111;
wfifomask1[2] <= 4'b1111;
wfifomask1[3] <= 4'b1111;
wfifomask0[0] <= buffer_w_mask[3:0];
wfifomask0[1] <= 4'b1111;
wfifomask0[2] <= 4'b1111;
wfifomask0[3] <= 4'b1111;
wfifo1[0] <= buffer_w_dat[63:32];
wfifo0[0] <= buffer_w_dat[31:0];
wfifo_produce <= 2'b01;
end else if(buffer_w_next) begin
wfifo_produce <= wfifo_produce + 1;
wfifomask1[wfifo_produce] <= buffer_w_mask[7:4];
wfifomask0[wfifo_produce] <= buffer_w_mask[3:0];
wfifo1[wfifo_produce] <= buffer_w_dat[63:32];
wfifo0[wfifo_produce] <= buffer_w_dat[31:0];
end
end
 
99,6 → 95,8
wfifo_consume <= wfifo_consume + 1;
wfifo_outmask <= wfifomask0[wfifo_consume];
wfifo_out <= wfifo0[wfifo_consume];
if(wfifo_enable)
$display("Read from LOW Write FIFO(%d) Mask %h", wfifo_consume, wfifomask0[wfifo_consume]);
end else begin
wfifo_outmask <= wfifomask1[wfifo_consume];
wfifo_out <= wfifo1[wfifo_consume];
/trunk/rtl/hpdmc_scheduler.v
127,8 → 127,10
fetched_address_valid <= address_valid & ~address_we;
write_valid <= address_valid & address_we;
fetched_address <= address;
end else if(fq_clearfetch)
end else if(fq_clearfetch) begin
fetched_address_valid <= 1'b0;
write_valid <= 1'b0;
end
if(fq_next) begin
next_address_valid <= 1'b0;
next_address_we <= 1'b0;
579,12 → 581,12
case(wstate)
WIDLE: begin
buffer_r_nextburst = 1'b1;
buffer_w_nextburst = 1'b1;
buffer_r_nextburst = 1'b1;
if(wb_cyc_i & wb_stb_i) begin
if(wb_we_i)
if(wb_we_i) begin
next_wstate = WPROCESS_WRITE;
else
end else
next_wstate = WPROCESS_READ;
end
end
612,8 → 614,8
end
WPROCESS_WRITE: begin
fq_clearfetch = 1'b1;
if(write_valid) begin
fq_clearfetch = 1'b1;
wb_ack_o = 1'b1;
buffer_w_next = 1'b1;
reload_maxburst_counter = 1'b1;

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