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URL https://opencores.org/ocsvn/lcd1/lcd1/trunk

Subversion Repositories lcd1

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  • This comparison shows the changes necessary to convert path
    /
    from Rev 4 to Rev 5
    Reverse comparison

Rev 4 → Rev 5

/trunk/src/asci_types.vhd
25,13 → 25,13
("00000000", "00000001", "00000010", "00000011",
"00000100", "00000101", "00000110", "00000111",
"00001000", "00001001", "00001010", "00001011",
"00001100", "00001101", "00001110", "00001111",
"00001100", "00001101", "10010001", "00001111",
"00010000", "00010001", "00010010", "00010011",
"00010100", "00010101", "00010110", "00010111",
"00011000", "00011001", "00011010", "00011011",
"10110110", "01011111", "00010110", "00010111",
"11011110", "11100000", "11010000", "11100001",
"00011100", "00011101", "00011110", "00011111",
"00100000", "00100001", "00100010", "00100011",
"00100100", "00100101", "00100110", "00100111",
"10100010", "00100101", "00100110", "00100111",
"00101000", "00101001", "00101010", "00101011",
"00101100", "00101101", "00101110", "00101111",
"00110000", "00110001", "00110010", "00110011",
38,22 → 38,22
"00110100", "00110101", "00110110", "00110111",
"00111000", "00111001", "00111010", "00111011",
"00111100", "00111101", "00111110", "00111111",
"01000000", "01000001", "01000010", "01000011",
"10100000", "01000001", "01000010", "01000011",
"01000100", "01000101", "01000110", "01000111",
"01001000", "01001001", "01001010", "01001011",
"01001100", "01001101", "01001110", "01001111",
"01010000", "01010001", "01010010", "01010011",
"01010100", "01010101", "01010110", "01010111",
"01011000", "01011001", "01011010", "01011011",
"01011100", "01011101", "01011110", "01011111",
"01100000", "01100001", "01100010", "01100011",
"01011000", "01011001", "01011010", "11111010",
"11111011", "11111100", "00011101", "11000100",
"00100111", "01100001", "01100010", "01100011",
"01100100", "01100101", "01100110", "01100111",
"01101000", "01101001", "01101010", "01101011",
"01101100", "01101101", "01101110", "01101111",
"01110000", "01110001", "01110010", "01110011",
"01110100", "01110101", "01110110", "01110111",
"01111000", "01111001", "01111010", "01111011",
"01111100", "01111101", "01111110", "01111111");
"01111000", "01111001", "01111010", "11111101",
"11111110", "11111111", "11001110", "10110000");
END asci_types;
/trunk/xst/work/hdpdeps.ref
1,26 → 1,34
V3 17
V3 22
FL /export/jack/dimo/opencores/CVS/lcd1/src/asci_types.vhd 2008/06/17.14:43:53 J.40
PH work/asci_types 1213706716 \
FL /export/jack/dimo/opencores/CVS/lcd1/src/asci_types.vhd \
PB ieee/std_logic_1164 1192821031
FL /export/jack/dimo/opencores/CVS/lcd1/src/components.vhd 2008/06/17.12:48:06 J.40
PH work/components 1213706717 \
FL /export/jack/dimo/opencores/CVS/lcd1/src/components.vhd \
PB ieee/std_logic_1164 1192821031 CD generic_freq_div CD lcd1
FL /export/jack/dimo/opencores/CVS/lcd1/src/generic_freq_div.vhd 2008/06/17.12:48:06 J.40
EN work/generic_freq_div 1213706718 \
FL /export/jack/dimo/opencores/CVS/lcd1/src/generic_freq_div.vhd \
PB ieee/std_logic_1164 1192821031 PH ieee/NUMERIC_STD 1192821033
AR work/generic_freq_div/behavioral 1213706719 \
FL /export/jack/dimo/opencores/CVS/lcd1/src/generic_freq_div.vhd \
EN work/generic_freq_div 1213706718
FL /export/jack/dimo/opencores/CVS/lcd1/src/lcd1.vhd 2008/06/17.12:48:06 J.40
EN work/lcd1 1213706720 FL /export/jack/dimo/opencores/CVS/lcd1/src/lcd1.vhd \
PB ieee/std_logic_1164 1192821031 PH ieee/NUMERIC_STD 1192821033 \
PH work/asci_types 1213706716
AR work/lcd1/behavioral 1213706721 \
FL /export/jack/dimo/opencores/CVS/lcd1/src/lcd1.vhd EN work/lcd1 1213706720
FL /export/jack/dimo/opencores/CVS/lcd1/src/topEntity.vhd 2008/06/17.12:48:06 J.40
EN work/topEntity 1213706722 \
FL /export/jack/dimo/opencores/CVS/lcd1/src/topEntity.vhd \
PB ieee/std_logic_1164 1192821031 PH work/components 1213706717
AR work/topEntity/structural 1213706723 \
FL /export/jack/dimo/opencores/CVS/lcd1/src/topEntity.vhd EN work/topEntity 1213706722 \
CP generic_freq_div CP lcd1
FL /export/jack/dimo/vhdl/lcd/src/asci_types.vhd 2008/06/16.12:38:20 J.40
PH work/asci_types 1213627949 FL /export/jack/dimo/vhdl/lcd/src/asci_types.vhd \
PB ieee/std_logic_1164 1192821031
FL /export/jack/dimo/vhdl/lcd/src/components.vhd 2008/06/16.12:39:38 J.40
PH work/components 1213627950 FL /export/jack/dimo/vhdl/lcd/src/components.vhd \
PB ieee/std_logic_1164 1192821031 CD generic_freq_div CD lcd1
FL /export/jack/dimo/vhdl/lcd/src/generic_freq_div.vhd 2008/06/16.12:51:57 J.40
EN work/generic_freq_div 1213627951 \
FL /export/jack/dimo/vhdl/lcd/src/generic_freq_div.vhd \
PB ieee/std_logic_1164 1192821031 PH ieee/NUMERIC_STD 1192821033
AR work/generic_freq_div/behavioral 1213627952 \
FL /export/jack/dimo/vhdl/lcd/src/generic_freq_div.vhd \
EN work/generic_freq_div 1213627951
FL /export/jack/dimo/vhdl/lcd/src/lcd1.vhd 2008/06/16.16:51:04 J.40
EN work/lcd1 1213627953 FL /export/jack/dimo/vhdl/lcd/src/lcd1.vhd \
PB ieee/std_logic_1164 1192821031 PH ieee/NUMERIC_STD 1192821033 \
PH work/asci_types 1213627949
AR work/lcd1/behavioral 1213627954 \
FL /export/jack/dimo/vhdl/lcd/src/lcd1.vhd EN work/lcd1 1213627953
FL /export/jack/dimo/vhdl/lcd/src/topEntity.vhd 2008/06/16.12:53:58 J.40
EN work/topEntity 1213627955 FL /export/jack/dimo/vhdl/lcd/src/topEntity.vhd \
PB ieee/std_logic_1164 1192821031 PH work/components 1213627950
AR work/topEntity/structural 1213627956 \
FL /export/jack/dimo/vhdl/lcd/src/topEntity.vhd EN work/topEntity 1213627955 \
CP generic_freq_div CP lcd1
/trunk/xst/work/hdllib.ref
1,8 → 1,8
AR generic_freq_div behavioral /export/jack/dimo/vhdl/lcd/src/generic_freq_div.vhd sub00/vhpl03 1213627952
AR lcd1 behavioral /export/jack/dimo/vhdl/lcd/src/lcd1.vhd sub00/vhpl05 1213627954
EN topentity NULL /export/jack/dimo/vhdl/lcd/src/topEntity.vhd sub00/vhpl06 1213627955
PH asci_types NULL /export/jack/dimo/vhdl/lcd/src/asci_types.vhd sub00/vhpl00 1213627949
EN generic_freq_div NULL /export/jack/dimo/vhdl/lcd/src/generic_freq_div.vhd sub00/vhpl02 1213627951
PH components NULL /export/jack/dimo/vhdl/lcd/src/components.vhd sub00/vhpl01 1213627950
EN lcd1 NULL /export/jack/dimo/vhdl/lcd/src/lcd1.vhd sub00/vhpl04 1213627953
AR topentity structural /export/jack/dimo/vhdl/lcd/src/topEntity.vhd sub00/vhpl07 1213627956
AR generic_freq_div behavioral /export/jack/dimo/opencores/CVS/lcd1/src/generic_freq_div.vhd sub00/vhpl03 1213706719
AR lcd1 behavioral /export/jack/dimo/opencores/CVS/lcd1/src/lcd1.vhd sub00/vhpl05 1213706721
EN topentity NULL /export/jack/dimo/opencores/CVS/lcd1/src/topEntity.vhd sub00/vhpl06 1213706722
PH asci_types NULL /export/jack/dimo/opencores/CVS/lcd1/src/asci_types.vhd sub00/vhpl00 1213706716
EN generic_freq_div NULL /export/jack/dimo/opencores/CVS/lcd1/src/generic_freq_div.vhd sub00/vhpl02 1213706718
PH components NULL /export/jack/dimo/opencores/CVS/lcd1/src/components.vhd sub00/vhpl01 1213706717
EN lcd1 NULL /export/jack/dimo/opencores/CVS/lcd1/src/lcd1.vhd sub00/vhpl04 1213706720
AR topentity structural /export/jack/dimo/opencores/CVS/lcd1/src/topEntity.vhd sub00/vhpl07 1213706723
/trunk/xst/work/sub00/vhpl00.vho
1,10 → 1,10
 
 
qYA)!$(,0489xmxYF :Qti1|q qXxA-nulY-sohY-stxY-etxY-eotY-enqY-ackY-belY-bsY-htY -lfY qYA)!$(,04896i: lcd_matrix :Qv>9&F wIB!>9: -lcd_matrixF Y qq@U'Q2QY]y@Uv[UeIveIaa]yi1|meI:char_std_matrix i1vmMtwxqm:char_std_matrixtvx|qs00000000[ts00000001[ts00000010[ts00000011[ts00000100[ts00000101[ts00000110[ts00000111[ts00001000[ts00001001[ts00001010[ts00001011[ts00001100[ts00001101[ts00001110[ts00001111[ts00010000[ts00010001[ts00010010[ts00010011[ts00010100[ts00010101[ts00010110[ts00010111[ts00011000[ts00011001[ts00011010[ts00011011[ts00011100[ts00011101[ts00011110[ts00011111[ts00100000[ts00100001[ts00100010[ts00100011[ts00100100[ts00100101[ts00100110[ts00100111[ts00101000[ts00101001[ts00101010[ts00101011[ts00101100[ts00101101[ts00101110[ts00101111[ts00110000[ts00110001[ts00110010[ts00110011[ts00110100[ts00110101[ts00110110[ts00110111[ts00111000[ts00111001[ts00111010[ts00111011[ts00111100[ts00111101[ts00111110[ts00111111[ts01000000[ts01000001[ts01000010[ts01000011[ts01000100[ts01000101[ts01000110[ts01000111[ts01001000[ts01001001[ts01001010[ts01001011[ts01001100[ts01001101[ts01001110[ts01001111[ts01010000[ts01010001[ts01010010[ts01010011[ts01010100[ts01010101[ts01010110[ts01010111[ts01011000[ts01011001[ts01011010[ts01011011[ts01011100[ts01011101[ts01011110[ts01011111[ts01100000[ts01100001[ts01100010[ts01100011[ts01100100[ts01100101[ts01100110[ts01100111[ts01101000[ts01101001[ts01101010[ts01101011[ts01101100[ts01101101[ts01101110[ts01101111[ts01110000[ts01110001[ts01110010[ts01110011[ts01110100[ts01110101[ts01110110[ts01110111[ts01111000[ts01111001[ts01111010[ts01111011[ts01111100[ts01111101[ts01111110[ts01111111[t|YA)iQ9! ƩʑyaI1qYA)   $i(Q,90!4 7;?CGKyOaSIW1[_bfjnrvqzY~A)iQ9! đyaI1qYA) +lcd_matrixF Y qq@U'Q2QY]y@Uv[UeIveIaa]yi1|meI:char_std_matrix i1vmMtwxqm:char_std_matrixtvx|qs00000000[ts00000001[ts00000010[ts00000011[ts00000100[ts00000101[ts00000110[ts00000111[ts00001000[ts00001001[ts00001010[ts00001011[ts00001100[ts00001101[ts10010001[ts00001111[ts00010000[ts00010001[ts00010010[ts00010011[ts10110110[ts01011111[ts00010110[ts00010111[ts11011110[ts11100000[ts11010000[ts11100001[ts00011100[ts00011101[ts00011110[ts00011111[ts00100000[ts00100001[ts00100010[ts00100011[ts10100010[ts00100101[ts00100110[ts00100111[ts00101000[ts00101001[ts00101010[ts00101011[ts00101100[ts00101101[ts00101110[ts00101111[ts00110000[ts00110001[ts00110010[ts00110011[ts00110100[ts00110101[ts00110110[ts00110111[ts00111000[ts00111001[ts00111010[ts00111011[ts00111100[ts00111101[ts00111110[ts00111111[ts10100000[ts01000001[ts01000010[ts01000011[ts01000100[ts01000101[ts01000110[ts01000111[ts01001000[ts01001001[ts01001010[ts01001011[ts01001100[ts01001101[ts01001110[ts01001111[ts01010000[ts01010001[ts01010010[ts01010011[ts01010100[ts01010101[ts01010110[ts01010111[ts01011000[ts01011001[ts01011010[ts11111010[ts11111011[ts11111100[ts00011101[ts11000100[ts00100111[ts01100001[ts01100010[ts01100011[ts01100100[ts01100101[ts01100110[ts01100111[ts01101000[ts01101001[ts01101010[ts01101011[ts01101100[ts01101101[ts01101110[ts01101111[ts01110000[ts01110001[ts01110010[ts01110011[ts01110100[ts01110101[ts01110110[ts01110111[ts01111000[ts01111001[ts01111010[ts11111101[ts11111110[ts11111111[ts11001110[ts10110000[t|YA)iQ9! ƩʑyaI1qYA)   $i(Q,90!4 7;?CGKyOaSIW1[_bfjnrvqzY~A)iQ9! đyaI1qYA) i"Q&9*!. 159=AEyIaMIQ1UY\`dhlpq|q:char2std|q!x|t Yt At @@ -135,6 +135,6 @@ et ht lt - qptP% q|)-/export/jack/dimo/vhdl/lcd/src/asci_types.vhdxA + qptP% q|)7/export/jack/dimo/opencores/CVS/lcd1/src/asci_types.vhdxA asci_typeswork asci_typesworkstandardstdstd_logic_1164ieee \ No newline at end of file

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