URL
https://opencores.org/ocsvn/simple_pic/simple_pic/trunk
Subversion Repositories simple_pic
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- This comparison shows the changes necessary to convert path
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- from Rev 4 to Rev 5
- ↔ Reverse comparison
Rev 4 → Rev 5
/trunk/rtl/simple_pic.v
34,10 → 34,10
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// CVS Log |
// |
// $Id: simple_pic.v,v 1.2 2002-12-22 16:11:03 rherveille Exp $ |
// $Id: simple_pic.v,v 1.3 2002-12-24 10:26:51 rherveille Exp $ |
// |
// $Date: 2002-12-22 16:11:03 $ |
// $Revision: 1.2 $ |
// $Date: 2002-12-24 10:26:51 $ |
// $Revision: 1.3 $ |
// $Author: rherveille $ |
// $Locker: $ |
// $State: Exp $ |
44,7 → 44,10
// |
// Change History: |
// $Log: not supported by cvs2svn $ |
// Revision 1.2 2002/12/22 16:11:03 rherveille |
// *** empty log message *** |
// |
// |
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62,13 → 65,13
// 0x00: EdgeEnable Register |
// bits 7:0 R/W Edge Enable '1' = edge triggered interrupt source |
// '0' = level triggered interrupt source |
// 0x02: PolarityRegister |
// 0x01: PolarityRegister |
// bits 7:0 R/W Polarity '1' = high level / rising edge |
// '0' = low level / falling edge |
// 0x03: MaskRegister |
// 0x02: MaskRegister |
// bits 7:0 R/W Mask '1' = interrupt masked (disabled) |
// '0' = interrupt not masked (enabled) |
// 0x04: PendingRegister |
// 0x03: PendingRegister |
// bits 7:0 R/W Pending '1' = interrupt pending |
// '0' = no interrupt pending |
// |