URL
https://opencores.org/ocsvn/usb_phy/usb_phy/trunk
Subversion Repositories usb_phy
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 4 to Rev 5
- ↔ Reverse comparison
Rev 4 → Rev 5
/trunk/doc/README.txt
21,7 → 21,13
to follow the UTMI interface specification from USB 2.0 with one exception: |
I have not added any error checking in the RX PHY, hence the RxError pin |
is permanently tide to ground. |
'phy_mode' selects between single ended and differential tx_phy output. See |
Philips ISP 1105 transceiver data sheet for an explanation of it's MODE |
select pin. |
Currently this PHY only operates in Full-Speed mode. Required clock frequency |
is 48MHz, from which the 12MHz USB transmit and receive clocks are derived. |
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Misc |
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The USB 1.1 Phy Project Page is: |
38,7 → 44,7
+-doc Documentation |
| |
+-bench--+ Test Bench |
| +- verilog Verilog Sources |
| +-verilog Verilog Sources |
| +-vhdl VHDL Sources |
| |
+-rtl----+ Core RTL Sources |