URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Subversion Repositories or1k
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 416 to Rev 417
- ↔ Reverse comparison
Rev 416 → Rev 417
/trunk/or1ksim/testbench/mmu.c
184,7 → 184,7
itlb_miss_ea = ea; |
|
/* Whatever access is in progress, translated address have to point to physical RAM */ |
ta = (ea & ((FLASH_SIZE/2) - 1)) + TEXT_END_ADD; |
ta = (ea & ((RAM_SIZE/2) - 1)) + DATA_END_ADD; |
tlbtr = (ta & SPR_ITLBTR_PPN) | (itlb_val & TLB_PR_MASK); |
printf("ta = %.8lx\n", ta); |
|
550,11 → 550,11
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/* Perform jumps to address, that is not in ITLB */ |
for (i = 0; i < ITLB_WAYS; i++) { |
TEST_JUMP(FLASH_START + FLASH_SIZE + (i*ITLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE)); |
TEST_JUMP(RAM_START + RAM_SIZE + (i*ITLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE)); |
|
/* Check if there was ITLB miss */ |
ASSERT(itlb_miss_count == (i + 1)); |
ASSERT(itlb_miss_ea == (FLASH_START + FLASH_SIZE + (i*ITLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE))); |
ASSERT(itlb_miss_ea == (RAM_START + RAM_SIZE + (i*ITLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE))); |
} |
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/* Reset ITLB miss counter and EA */ |
563,7 → 563,7
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/* Perform jumps to address, that is now in ITLB */ |
for (i = 0; i < ITLB_WAYS; i++) { |
TEST_JUMP(FLASH_START + FLASH_SIZE + (i*ITLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE)); |
TEST_JUMP(RAM_START + RAM_SIZE + (i*ITLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE)); |
|
/* Check if there was ITLB miss */ |
ASSERT(itlb_miss_count == 0); |
576,11 → 576,11
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/* Perform jumps to address, that is now in ITLB but is invalid */ |
for (i = 0; i < ITLB_WAYS; i++) { |
TEST_JUMP(FLASH_START + FLASH_SIZE + (i*ITLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE)); |
TEST_JUMP(RAM_START + RAM_SIZE + (i*ITLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE)); |
|
/* Check if there was ITLB miss */ |
ASSERT(itlb_miss_count == (i + 1)); |
ASSERT(itlb_miss_ea == (FLASH_START + FLASH_SIZE + (i*ITLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE))); |
ASSERT(itlb_miss_ea == (RAM_START + RAM_SIZE + (i*ITLB_SETS*PAGE_SIZE) + (set*PAGE_SIZE))); |
} |
|
return 0; |
596,7 → 596,7
/* Register illegal insn handler */ |
excpt_illinsn = (unsigned long)ill_insn_handler; |
|
#if 0 |
#if 1 |
/* Translation test */ |
dtlb_translation_test (); |
|
611,11 → 611,13
dtlb_valid_bit_test (DTLB_SETS - i); |
#endif |
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#if 1 |
/* Enable IMMU */ |
immu_enable(); |
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/* Translation test */ |
itlb_valid_bit_test (DTLB_SETS - 2); |
#endif |
|
report (0xdeaddead); |
exit (0); |