URL
https://opencores.org/ocsvn/m1_core/m1_core/trunk
Subversion Repositories m1_core
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 42 to Rev 43
- ↔ Reverse comparison
Rev 42 → Rev 43
/trunk/hdl/filelist.dc
2,12 → 2,16
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# Analyze |
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analyze -format verilog ~/m1_core/hdl/rtl/m1_cpu/m1_alu.v |
analyze -format verilog ~/m1_core/hdl/rtl/m1_cpu/m1_cpu.v |
analyze -format verilog ~/m1_core/hdl/rtl/m1_core/m1_alu.v |
analyze -format verilog ~/m1_core/hdl/rtl/m1_core/m1_mul.v |
analyze -format verilog ~/m1_core/hdl/rtl/m1_core/m1_div.v |
analyze -format verilog ~/m1_core/hdl/rtl/m1_core/m1_cpu.v |
analyze -format verilog ~/m1_core/hdl/rtl/m1_core/m1_mmu.v |
analyze -format verilog ~/m1_core/hdl/rtl/m1_core/m1_core.v |
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# Technology-independent elaboration and linking |
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set active_design m1_cpu |
set active_design m1_core |
elaborate $active_design |
current_design $active_design |
link |
/trunk/hdl/filelist.icarus
1,7 → 1,36
$(M1_ROOT)/hdl/rtl/m1_cpu/m1_alu.v |
$(M1_ROOT)/hdl/rtl/m1_cpu/m1_cpu.v |
$(M1_ROOT)/hdl/behav/xilinx_unisim/BUFG.v |
$(M1_ROOT)/hdl/behav/xilinx_unisim/DCM_SP.v |
$(M1_ROOT)/hdl/behav/xilinx_unisim/FDDRRSE.v |
$(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/async_fifo.v |
$(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/ddr_clkgen.v |
$(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/ddr_ctrl.v |
$(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/ddr_include.v |
$(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/ddr_init.v |
$(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/ddr_pulse78.v |
$(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/ddr_rpath.v |
$(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/ddr_wpath.v |
$(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/dpram.v |
$(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/gray_counter.v |
$(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/rotary.v |
$(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/wb_ddr.v |
$(M1_ROOT)/hdl/rtl/wb_ps2_keyboard/ps2_translation_table.v |
$(M1_ROOT)/hdl/rtl/wb_ps2_keyboard/ps2_wb_if.v |
$(M1_ROOT)/hdl/rtl/wb_ps2_keyboard/ps2_io_ctrl.v |
$(M1_ROOT)/hdl/rtl/wb_ps2_keyboard/ps2_keyboard.v |
$(M1_ROOT)/hdl/rtl/wb_ps2_keyboard/ps2_top.v |
$(M1_ROOT)/hdl/rtl/wb_text_vga/fontmap_rom.v |
$(M1_ROOT)/hdl/rtl/wb_text_vga/video_ram.v |
$(M1_ROOT)/hdl/rtl/wb_text_vga/wb_text_vga.v |
$(M1_ROOT)/hdl/rtl/wb_int_ctrl/wb_int_ctrl.v |
$(M1_ROOT)/hdl/rtl/m1_core/m1_alu.v |
$(M1_ROOT)/hdl/rtl/m1_core/m1_mul.v |
$(M1_ROOT)/hdl/rtl/m1_core/m1_div.v |
$(M1_ROOT)/hdl/rtl/m1_core/m1_cpu.v |
$(M1_ROOT)/hdl/rtl/m1_core/m1_mmu.v |
$(M1_ROOT)/hdl/rtl/m1_core/m1_core.v |
$(M1_ROOT)/hdl/rtl/spartan3esk_top/spartan3esk_top.v |
$(M1_ROOT)/hdl/behav/ddr_model/ddr.v |
$(M1_ROOT)/hdl/behav/ps2_keyboard_model/ps2_keyboard_model.v |
$(M1_ROOT)/hdl/behav/testbench/testbench.v |
+incdir+$(M1_ROOT)/hdl/rtl/m1_cpu |
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+incdir+$(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/ |
+incdir+$(M1_ROOT)/hdl/rtl/m1_core/ |
/trunk/hdl/filelist.xst
1,2 → 1,28
verilog work ~/m1_core/hdl/rtl/m1_cpu/m1_alu.v |
verilog work ~/m1_core/hdl/rtl/m1_cpu/m1_cpu.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/async_fifo.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/ddr_clkgen.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/ddr_ctrl.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/ddr_include.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/ddr_init.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/ddr_pulse78.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/ddr_rpath.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/ddr_wpath.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/dpram.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/gray_counter.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/rotary.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_ddr_ctrl/wb_ddr.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_ps2_keyboard/ps2_translation_table.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_ps2_keyboard/ps2_wb_if.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_ps2_keyboard/ps2_io_ctrl.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_ps2_keyboard/ps2_keyboard.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_ps2_keyboard/ps2_top.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_text_vga/fontmap_rom.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_text_vga/video_ram.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_text_vga/wb_text_vga.v |
verilog work $(M1_ROOT)/hdl/rtl/wb_int_ctrl/wb_int_ctrl.v |
verilog work $(M1_ROOT)/hdl/rtl/m1_core/m1_alu.v |
verilog work $(M1_ROOT)/hdl/rtl/m1_core/m1_mul.v |
verilog work $(M1_ROOT)/hdl/rtl/m1_core/m1_div.v |
verilog work $(M1_ROOT)/hdl/rtl/m1_core/m1_cpu.v |
verilog work $(M1_ROOT)/hdl/rtl/m1_core/m1_mmu.v |
verilog work $(M1_ROOT)/hdl/rtl/m1_core/m1_core.v |
verilog work $(M1_ROOT)/hdl/rtl/spartan3esk_top/spartan3esk_top.v |