OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

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  • This comparison shows the changes necessary to convert path 
    /
    from Rev 423 to Rev 424
    ↔ Reverse comparison
  •

Rev 423 → Rev 424

/trunk/or1ksim/sim-config.h
21,9 → 21,11
 
/* Simulator configuration macros. Eventually this one will be a lot bigger. */
 
#define NR_UARTS 4 /* Number of UARTs simulated */
#define NR_DMAS 1 /* Number of DMA controllers */
#define NR_ETHERNETS 2 /* Number of Ethernet MACs */
#define MAX_UARTS 4 /* Max. number of UARTs simulated */
#define MAX_DMAS 4 /* Max. number of DMA controllers */
#define MAX_ETHERNETS 4 /* Max. number of Ethernet MACs */
#define MAX_MEMORIES 16 /* Max. number of memory devices attached */
 
#define NONE 0
#define VIRTUAL 1
#define PHYSICAL 2
56,7 → 58,7
int irq; /* IRQ of this device */
unsigned long vapi_id; /* VAPI id for this instance */
int uart16550; /* Whether this device is uart 16450 or 16550 */
} uarts[NR_UARTS];
} uarts[MAX_UARTS];
int ndmas;
int dmas_enabled;
64,7 → 66,7
unsigned long baseaddr;
int irq; /* IRQ of this device */
unsigned long vapi_id; /* VAPI id for this instance */
} dmas[NR_DMAS];
} dmas[MAX_DMAS];
int nethernets;
int ethernets_enabled;
76,7 → 78,7
char rxfile[STR_SIZE]; /* Filename for RX */
char txfile[STR_SIZE]; /* File for TX */
unsigned long vapi_id; /* VAPI id for this instance */
} ethernets[NR_ETHERNETS];
} ethernets[MAX_ETHERNETS];
struct {
int enabled; /* is MC enabled? */
85,7 → 87,6
} mc;
struct {
char memory_table_file[STR_SIZE]; /* Memory table filename */
int pattern; /* A user specified memory initialization pattern */
int random_seed; /* Initialize the memory with random values, starting with seed */
enum {
93,8 → 94,18
MT_PATTERN,
MT_RANDOM
} type;
int nmemories; /* Number of attached memories */
struct {
int ce; /* Which ce this memory is associated with */
unsigned long baseaddr; /* Start address of the memory */
unsigned long size; /* Memory size */
char name[STR_SIZE]; /* Memory type string */
char log[STR_SIZE]; /* Memory log filename */
int delayr; /* Read cycles */
int delayw; /* Write cycles */
} table[MAX_MEMORIES];
} memory;
 
struct {
unsigned long upr; /* Unit present register */
unsigned long ver, rev; /* Version register */
129,7 → 140,7
int enabled; /* Whether is VAPI module enabled */
int server_port; /* A user specified port number for services */
int log_enabled; /* Whether to log the vapi requests */
int log_device_id; /* Whether to log device ID for each request */
int log_device_id; /* Whether to log device ID for each request */
char vapi_fn[STR_SIZE]; /* vapi log filename */
} vapi;
};
142,6 → 153,12
int script_file_specified;/* Whether script file was already loaded */
char *filename; /* Original Command Simulator file (CZ) */
} sim;
struct {
struct {
FILE *log; /* Log file for this device */
} table[MAX_MEMORIES];
} memory;
 
struct { /* Verification API, part of Advanced Core Verification */
FILE *vapi_file; /* vapi file */
/trunk/or1ksim/sim.cfg
55,19 → 55,6
This section specifies how is initial memory generated and which blocks
it consist of.
memory_table_file = "<filename>"
loads memory table from filename. If filename does not exists in the
current directory, it is loaded from ~/.or1k/<filename>.
Memory table file structure is as follows:
>start_address1 length1 type1 [ce1 [delayr1 [delayw1]]]
>start_address2 length2 type2 [ce2 [delayr2 [delayw2]]]
>start_address3 length3 type3 [ce3 [delayr3 [delayw3]]]
(each line start with '>')
Example:
>00000100 00001F00 flash 3 100
>80000000 00010000 RAM
type = random/unknown/pattern
specifies the initial memory values. 'random' parameter generate
random memory using seed 'random_seed' parameter. 'pattern' parameter
79,14 → 66,60
pattern = <value>
pattern to fill memory, used if type = pattern
nmemories = <value>
number of memory instances connected
instance specific:
baseaddr = <hex_value>
memory start address
size = <hex_value>
memory size
 
name = "<string>"
memory block name
ce = <value>
chip enable index of the memory instance
 
delayr = <value>
cycles, required for read access, -1 if instance does not support reading
delayw = <value>
cycles, required for write access, -1 if instance does not support writing
16550 = 0/1
0, if this device is uart 16450 and 1, if it is 16550
log = "<filename>"
filename, where to log memory accesses to, no log, if log command is not specified
*/
 
section memory
memory_table_file = "simmem.cfg"
/*random_seed = 12345
type = random*/
pattern = 0x00
type = unknown /* Fastest */
nmemories = 2
device 0
name = "RAM"
ce = 0
baseaddr = 0x00000000
size = 0x00100000
delayr = 10
delayw = -1
enddevice
device 1
name = "FLASH"
ce = 1
baseaddr = 0x40000000
size = 0x00100000
delayr = 2
delayw = 4
enddevice
end
 
 
/trunk/or1ksim/cpu/common/abstract.c
180,7 → 180,7
fprintf (stderr, "\taddr & %08x == %08x to %08x, size %08x, gran %iB\n", addr_mask, addr_compare, addr_compare | bit_mask (size), size, granularity);
}
found_error = 1;
printf ("and\taddr & %08x == %08x to %08x, size %08x, gran %iB\n", (*pptmp)->addr_mask, (*pptmp)->addr_compare,
fprintf (stderr, "and\taddr & %08x == %08x to %08x, size %08x, gran %iB\n", (*pptmp)->addr_mask, (*pptmp)->addr_compare,
(*pptmp)->addr_compare | (*pptmp)->size_mask, (*pptmp)->size, (*pptmp)->granularity);
}
549,56 → 549,49
simmem[cur_area->misc + (addr & cur_area->size_mask)].data = (unsigned char)value;
}
 
/* Initialize memory table from a file. Syntax:
start_address1 length1 type1 [ce1 [delayr1 [delayw1]]]
start_address2 length2 type2 [ce2 [delayr2 [delayw2]]]
start_address3 length3 type3 [ce3 [delayr3 [delayw3]]]
Example:
00000100 00001F00 flash 3 100
80000000 00010000 RAM
*/
void sim_read_memory_table (char *filename)
unsigned long simmem_read_zero(unsigned long addr) {
if (config.sim.verbose)
fprintf (stderr, "WARNING: memory read from non-read memory area 0x%08x.\n", addr);
return 0;
}
 
void simmem_write_null(unsigned long addr, unsigned long value) {
if (config.sim.verbose)
fprintf (stderr, "WARNING: memory write to 0x%08x, non-write memory area (value 0x%08x).\n", addr, value);
}
 
/* Initialize memory table from a config struct */
 
void init_memory_table ()
{
FILE *f;
unsigned long memory_needed = 0;
char *home = getenv("HOME");
char ctmp[256];
int local = 1;
int gce = -1;
sprintf(ctmp, "%s/.or1k/%s", home, filename);
if ((f = fopen (filename, "rt")) != NULL
|| home != NULL && !(local = 0) && (f = fopen (ctmp, "rt")) != NULL) {
unsigned long start, length;
char type[100];
int nparam;
int rd, wd, ce;
if (config.sim.verbose)
printf ("Reading memory table from '%s':\n", local ? filename : ctmp);
while ((nparam = fscanf (f, ">%08x %08x %s %i %i %i\n", &start, &length, &type, &ce, &rd, &wd)) >= 3 && nparam <= 6) {
if (nparam < 4)
ce = gce + 1;
if (nparam < 5)
rd = 1;
if (nparam < 6)
wd = 1;
 
gce = ce;
printf ("%08X %08X (%i KB): %s (activated by CE%i; read delay = %icyc, write delay = %icyc)\n",
start, length, length >> 10, type, ce, rd, wd);
/* If nothing was defined, use default memory block */
if (config.memory.nmemories) {
int i;
for (i = 0; i < config.memory.nmemories; i++) {
unsigned long start = config.memory.table[i].baseaddr;
unsigned long length = config.memory.table[i].size;
char *type = config.memory.table[i].name;
int rd = config.memory.table[i].delayr;
int wd = config.memory.table[i].delayw;
int ce = config.memory.table[i].ce;
if (config.sim.verbose)
debug (1, "%08X %08X (%i KB): %s (activated by CE%i; read delay = %icyc, write delay = %icyc)\n",
start, length, length >> 10, type, ce, rd, wd);
register_memoryarea(start, length, 1, &simmem_read_byte, &simmem_write_byte);
cur_area->misc = memory_needed;
cur_area->delayw = wd;
cur_area->delayr = rd;
memory_needed += cur_area->size;
}
fclose (f);
printf ("\n");
} else {
if (config.sim.verbose)
fprintf (stderr, "WARNING: Cannot read memory table from '%s',\nneither '%s', assuming standard configuration.\n", filename, ctmp);
fprintf (stderr, "WARNING: Memory not defined, assuming standard configuration.\n");
register_memoryarea(DEFAULT_MEMORY_START, DEFAULT_MEMORY_LEN, 1, &simmem_read_byte, &simmem_write_byte);
memory_needed += cur_area->size;
}
 
simmem = (struct mem_entry *) malloc (sizeof (struct mem_entry) * memory_needed);
if (!simmem) {
fprintf (stderr, "Failed to allocate sim memory. Aborting\n");
605,3 → 598,18
exit (-1);
}
}
 
/* Changes read/write memory in read/write only */
 
void lock_memory_table ()
{
struct dev_memarea *ptmp;
 
/* Check list of registered devices. */
for(ptmp = dev_list; ptmp; ptmp = ptmp->next) {
if (ptmp->delayr < 0 && ptmp->readfunc == &simmem_read_byte)
ptmp->readfunc = &simmem_read_zero;
if (ptmp->delayw < 0 && ptmp->writefunc == &simmem_write_byte)
ptmp->writefunc = &simmem_write_null;
}
}
/trunk/or1ksim/cpu/common/abstract.h
56,6 → 56,8
unsigned long size;
unsigned long size_mask; /* Address mask, calculated out of size */
unsigned long granularity; /* how many bytes read/write accepts: 1/2/4 */
int delayr; /* Read delay */
int delayw; /* Write delay */
int chip_select; /* Needed by memory controller; specifies chip select number for this memory area. */
 
84,8 → 86,11
void setsim_mem16(unsigned long,unsigned short);
void setsim_mem8(unsigned long,unsigned char);
 
void sim_read_memory_table (char *filename);
void init_memory_table ();
 
/* Changes read/write memory in read/write only */
void lock_memory_table ();
 
/* Register read and write function for a memory area.
addr is inside the area, if addr & addr_mask == addr_compare
(used also by peripheral devices like 16450 UART etc.) */
/trunk/or1ksim/testbench/defaultmem.cfg File deleted
trunk/or1ksim/testbench/defaultmem.cfg Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: trunk/or1ksim/testbench/basic.s =================================================================== --- trunk/or1ksim/testbench/basic.s (revision 423) +++ trunk/or1ksim/testbench/basic.s (nonexistent) @@ -1,446 +0,0 @@ -/* Basic instruction set test */ -#include "spr_defs.h" - -#define 2 2 - - .section .except - .org 0x100 -_reset: - l.nop - l.movhi r1,hi(_regs) - l.ori r1,r1,lo(_regs) - l.jr r1 - l.nop - - .section .text -_regs: - l.addi r1,r0,0x1 - l.addi r2,r1,0x2 - l.addi r3,r2,0x4 - l.addi r4,r3,0x8 - l.addi r5,r4,0x10 - l.addi r6,r5,0x20 - l.addi r7,r6,0x40 - l.addi r8,r7,0x80 - l.addi r9,r8,0x100 - l.addi r10,r9,0x200 - l.addi r11,r10,0x400 - l.addi r12,r11,0x800 - l.addi r13,r12,0x1000 - l.addi r14,r13,0x2000 - l.addi r15,r14,0x4000 - l.addi r16,r15,0x8000 - - l.sub r31,r0,r1 - l.sub r30,r31,r2 - l.sub r29,r30,r3 - l.sub r28,r29,r4 - l.sub r27,r28,r5 - l.sub r26,r27,r6 - l.sub r25,r26,r7 - l.sub r24,r25,r8 - l.sub r23,r24,r9 - l.sub r22,r23,r10 - l.sub r21,r22,r11 - l.sub r20,r21,r12 - l.sub r19,r20,r13 - l.sub r18,r19,r14 - l.sub r17,r18,r15 - l.sub r16,r17,r16 - - l.mtspr r0,r16,0x1234 /* Should be 0xffff0012 */ - - l.sw 0(r0),r16 - -_mem: l.movhi r3,0x1234 - l.ori r3,r3,0x5678 - - l.sw 4(r0),r3 - - l.lbz r4,4(r0) - l.add r8,r8,r4 - l.sb 11(r0),r4 - l.lbz r4,5(r0) - l.add r8,r8,r4 - l.sb 10(r0),r4 - l.lbz r4,6(r0) - l.add r8,r8,r4 - l.sb 9(r0),r4 - l.lbz r4,7(r0) - l.add r8,r8,r4 - l.sb 8(r0),r4 - - l.lbs r4,8(r0) - l.add r8,r8,r4 - l.sb 7(r0),r4 - l.lbs r4,9(r0) - l.add r8,r8,r4 - l.sb 6(r0),r4 - l.lbs r4,10(r0) - l.add r8,r8,r4 - l.sb 5(r0),r4 - l.lbs r4,11(r0) - l.add r8,r8,r4 - l.sb 4(r0),r4 - - l.lhz r4,4(r0) - l.add r8,r8,r4 - l.sh 10(r0),r4 - l.lhz r4,6(r0) - l.add r8,r8,r4 - l.sh 8(r0),r4 - - l.lhs r4,8(r0) - l.add r8,r8,r4 - l.sh 6(r0),r4 - l.lhs r4,10(r0) - l.add r8,r8,r4 - l.sh 4(r0),r4 - - l.lwz r4,4(r0) - l.add r8,r8,r4 - - l.mtspr r0,r8,0x1234 /* Should be 0x12352af7 */ - - l.lwz r9,0(r0) - l.add r8,r9,r8 - l.sw 0(r0),r8 - -_arith: - l.addi r3,r0,1 - l.addi r4,r0,2 - l.addi r5,r0,-1 - l.addi r6,r0,-1 - l.addi r8,r0,0 - - l.sub r7,r5,r3 - l.sub r8,r3,r5 - l.add r8,r8,r7 - - l.div r7,r7,r4 - l.add r9,r3,r4 - l.mul r7,r9,r7 - l.divu r7,r7,r4 - l.add r8,r8,r7 - - l.mtspr r0,r8,0x1234 /* Should be 0x7ffffffe */ - - l.lwz r9,0(r0) - l.add r8,r9,r8 - l.sw 0(r0),r8 - -_log: - l.addi r3,r0,1 - l.addi r4,r0,2 - l.addi r5,r0,-1 - l.addi r6,r0,-1 - l.addi r8,r0,0 - - l.andi r8,r8,1 - l.and r8,r8,r3 - - l.xori r8,r5,0xa5a5 - l.xor r8,r8,r5 - - l.ori r8,r8,2 - l.or r8,r8,r4 - - l.mtspr r0,r8,0x1234 /* Should be 0xffffa5a7 */ - - l.lwz r9,0(r0) - l.add r8,r9,r8 - l.sw 0(r0),r8 - -_shift: - l.addi r3,r0,1 - l.addi r4,r0,2 - l.addi r5,r0,-1 - l.addi r6,r0,-1 - l.addi r8,r0,0 - - l.slli r8,r5,6 - l.sll r8,r8,r4 - - l.srli r8,r8,6 - l.srl r8,r8,r4 - - l.srai r8,r8,2 - l.sra r8,r8,r4 - - l.mtspr r0,r8,0x1234 /* Should be 0x000fffff */ - - l.lwz r9,0(r0) - l.add r8,r9,r8 - l.sw 0(r0),r8 - -_flag: - l.addi r3,r0,1 - l.addi r4,r0,-2 - l.addi r8,r0,0 - - l.sfeq r3,r3 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfeq r3,r4 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfeqi r3,1 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfeqi r3,-2 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfne r3,r3 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfne r3,r4 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfnei r3,1 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfnei r3,-2 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfgtu r3,r3 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfgtu r3,r4 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfgtui r3,1 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfgtui r3,-2 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfgeu r3,r3 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfgeu r3,r4 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfgeui r3,1 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfgeui r3,-2 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfltu r3,r3 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfltu r3,r4 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfltui r3,1 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfltui r3,-2 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfleu r3,r3 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfleu r3,r4 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfleui r3,1 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfleui r3,-2 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfgts r3,r3 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfgts r3,r4 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfgtsi r3,1 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfgtsi r3,-2 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfges r3,r3 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfges r3,r4 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfgesi r3,1 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfgesi r3,-2 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sflts r3,r3 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sflts r3,r4 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfltsi r3,1 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfltsi r3,-2 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfles r3,r3 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sfles r3,r4 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sflesi r3,1 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.sflesi r3,-2 - l.mfspr r5,r0,17 - l.andi r4,r5,0x200 - l.add r8,r8,r4 - - l.mtspr r0,r8,0x1234 /* Should be 0x00002800 */ - - l.lwz r9,0(r0) - l.add r8,r9,r8 - l.sw 0(r0),r8 - -_jump: - l.addi r8,r0,0 - - l.j _T1 - l.addi r8,r8,1 - -_T2: l.jalr r9 - l.addi r8,r8,1 - -_T1: l.jal _T2 - l.addi r8,r8,1 - - l.sfeqi r0,0 - l.bf _T3 - l.addi r8,r8,1 - -_T3: l.sfeqi r0,1 - l.bf _T4 - l.addi r8,r8,1 - - l.addi r8,r8,1 - -_T4: l.sfeqi r0,0 - l.bnf _T5 - l.addi r8,r8,1 - - l.addi r8,r8,1 - -_T5: l.sfeqi r0,1 - l.bnf _T6 - l.addi r8,r8,1 - - l.addi r8,r8,1 - -_T6: l.movhi r3,hi(_T7) - l.ori r3,r0,lo(_T7) - l.mtspr r0,r3,32 - l.mfspr r5,r0,17 - l.mtspr r0,r5,64 - l.rfe - l.addi r8,r8,1 - - l.addi r8,r8,1 - -_T7: l.mtspr r0,r8,0x1234 /* Should be 0x00000000a */ - - l.lwz r9,0(r0) - l.add r8,r9,r8 - l.sw 0(r0),r8 - - l.lwz r9,0(r0) - l.movhi r3,0x4c69 - l.ori r3,r3,0xe5f6 - l.add r8,r8,r3 - - l.mtspr r0,r8,0x1234 /* Should be 0xdeaddead */ - - l.addi r3,r0,0 - l.sys 203 -
trunk/or1ksim/testbench/basic.s Property changes : Deleted: svn:executable ## -1 +0,0 ## -* \ No newline at end of property Index: trunk/or1ksim/testbench/Makefile.in =================================================================== --- trunk/or1ksim/testbench/Makefile.in (revision 423) +++ trunk/or1ksim/testbench/Makefile.in (revision 424) @@ -116,7 +116,7 @@ ################################################ ##### Platform Dependent Tests - not OR1K ##### -@OR1K_EXCEPT_TRUE@basic_SOURCES = basic.s spr_defs.h +@OR1K_EXCEPT_TRUE@basic_SOURCES = basic.S spr_defs.h @OR1K_EXCEPT_FALSE@basic_SOURCES = @OR1K_EXCEPT_TRUE@basic_LDFLAGS = @OR1K_EXCEPT_TRUE@basic_LDADD =
/trunk/or1ksim/testbench/default.cfg
18,11 → 18,29
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
section memory
memory_table_file = "defaultmem.cfg"
/*random_seed = 12345
type = random*/
pattern = 0x00
type = unknown /* Fastest */
nmemories = 2
device 0
name = "RAM"
ce = 0
baseaddr = 0x00000000
size = 0x00200000
delayr = 10
delayw = -1
enddevice
device 1
name = "FLASH"
ce = 1
baseaddr = 0x40000000
size = 0x00200000
delayr = 2
delayw = 4
enddevice
end
 
section cpu
/trunk/or1ksim/testbench/dmatest.cfg
4,6 → 4,25
type = random*/
pattern = 0x00
type = unknown /* Fastest */
nmemories = 2
device 0
name = "RAM"
ce = 0
baseaddr = 0x00000000
size = 0x00200000
delayr = 10
delayw = -1
enddevice
device 1
name = "FLASH"
ce = 1
baseaddr = 0x40000000
size = 0x00200000
delayr = 2
delayw = 4
enddevice
end
 
section dma
/trunk/or1ksim/testbench/functest.c
29,8 → 29,8
else
gk = j;
}
if (gk == 18)
report (gk);
if (gk == 20)
report(0xdeaddead);
return (gk != 18);
return (gk != 20);
}
 
/trunk/or1ksim/testbench/eth.cfg
4,6 → 4,25
type = random*/
pattern = 0x00
type = unknown /* Fastest */
nmemories = 2
device 0
name = "RAM"
ce = 0
baseaddr = 0x00000000
size = 0x00200000
delayr = 10
delayw = -1
enddevice
device 1
name = "FLASH"
ce = 1
baseaddr = 0x40000000
size = 0x00200000
delayr = 2
delayw = 4
enddevice
end
 
section sim
/trunk/or1ksim/testbench/excpt.S
1,6 → 1,8
/* Test sys exceptions */
#include "support/spr_defs.h"
 
#define MEM_RAM 0x40000000
 
.section .except
.org 0x100
_reset:
63,8 → 65,8
l.mtspr r0,r4,0x1234
l.add r3,r3,r4
 
l.movhi r4,hi(0xdeadde8a)
l.ori r4,r4,lo(0xdeadde8a)
l.movhi r4,hi(0xdeadde8b)
l.ori r4,r4,lo(0xdeadde8b)
l.add r3,r3,r4
l.mtspr r0,r3,0x1234
 
/trunk/or1ksim/testbench/cache.c
2,6 → 2,8
#include "support.h"
#include "spr_defs.h"
 
#define MEM_RAM 0x40000000
 
/* Number of IC sets (power of 2) */
#define IC_SETS 512
#define DC_SETS 512
/trunk/or1ksim/testbench/acv_uart.cfg
1,9 → 1,27
section memory
memory_table_file = "defaultmem.cfg"
/*random_seed = 12345
type = random*/
pattern = 0x00
type = unknown /* Fastest */
nmemories = 2
device 0
name = "RAM"
ce = 0
baseaddr = 0x00000000
size = 0x00200000
delayr = 10
delayw = -1
enddevice
device 1
name = "FLASH"
ce = 1
baseaddr = 0x40000000
size = 0x00200000
delayr = 2
delayw = 4
enddevice
end
 
section cpu
/trunk/or1ksim/testbench/Makefile.am
46,7 → 46,7
if OR1K_EXCEPT
 
####### Platform Dependent Tests - OR1K ########
basic_SOURCES = basic.s spr_defs.h
basic_SOURCES = basic.S spr_defs.h
basic_LDFLAGS =
basic_LDADD =
cache_SOURCES = $(OR1K_SUPPORT_S) support.h cache.c
/trunk/or1ksim/peripheral/dma.c
32,7 → 32,7
#include "fields.h"
 
/* The representation of the DMA controllers */
static struct dma_controller dmas[NR_DMAS];
static struct dma_controller dmas[MAX_DMAS];
 
static unsigned long dma_read32( unsigned long addr );
static void dma_write32( unsigned long addr, unsigned long value );
117,7 → 117,7
unsigned i;
struct dma_controller *dma = NULL;
 
for ( i = 0; i < NR_DMAS && dma == NULL; ++ i ) {
for ( i = 0; i < MAX_DMAS && dma == NULL; ++ i ) {
if ( addr >= dmas[i].baseaddr && addr < dmas[i].baseaddr + DMA_ADDR_SPACE )
dma = &(dmas[i]);
}
191,7 → 191,7
struct dma_controller *dma = NULL;
 
/* Find which controller this is */
for ( i = 0; i < NR_DMAS && dma == NULL; ++ i ) {
for ( i = 0; i < MAX_DMAS && dma == NULL; ++ i ) {
if ( (addr >= dmas[i].baseaddr) && (addr < dmas[i].baseaddr + DMA_ADDR_SPACE) )
dma = &(dmas[i]);
}
295,7 → 295,7
void dma_clock()
{
unsigned i;
for ( i = 0; i < NR_DMAS; ++ i ) {
for ( i = 0; i < MAX_DMAS; ++ i ) {
if ( dmas[i].baseaddr != 0 )
dma_controller_clock( &(dmas[i]) );
}
/trunk/or1ksim/peripheral/ethernet.c
37,7 → 37,7
#include "crc32.h"
 
 
static struct eth_device eths[NR_ETHERNETS];
static struct eth_device eths[MAX_ETHERNETS];
 
static void eth_write32( unsigned long addr, unsigned long value );
static unsigned long eth_read32( unsigned long addr );
80,7 → 80,7
first_time = 0;
}
for ( i = 0; i < NR_ETHERNETS; ++ i ) {
for ( i = 0; i < MAX_ETHERNETS; ++ i ) {
struct eth_device *eth = &(eths[i]);
 
eth->eth_number = i;
141,7 → 141,7
{
unsigned i;
for ( i = 0; i < NR_ETHERNETS; ++ i ) {
for ( i = 0; i < MAX_ETHERNETS; ++ i ) {
struct eth_device *eth = &(eths[i]);
if ( eth->baseaddr == 0 )
178,7 → 178,7
unsigned i;
*eth = NULL;
 
for ( i = 0; i < NR_ETHERNETS && *eth == NULL; ++ i ) {
for ( i = 0; i < MAX_ETHERNETS && *eth == NULL; ++ i ) {
if ( (addr >= eths[i].baseaddr) && (addr < eths[i].baseaddr + ETH_ADDR_SPACE) )
*eth = &(eths[i]);
}
412,7 → 412,7
{
unsigned i;
for ( i = 0; i < NR_ETHERNETS; ++ i ) {
for ( i = 0; i < MAX_ETHERNETS; ++ i ) {
eth_controller_tx_clock( &(eths[i]) );
eth_controller_rx_clock( &(eths[i]) );
}
/trunk/or1ksim/peripheral/16450.c
39,7 → 39,7
 
#define MIN(a,b) ((a) < (b) ? (a) : (b))
 
static struct dev_16450 uarts[NR_UARTS];
static struct dev_16450 uarts[MAX_UARTS];
static int thre_int;
 
/* Number of clock cycles (one clock cycle is one call to the uart_clock())
73,10 → 73,10
debug(4, "uart_write_byte(%x,%02x)\n", addr, (unsigned)value);
 
for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
for(chipsel = 0; chipsel < MAX_UARTS; chipsel++)
if ((addr & ~(UART_ADDR_SPACE-1)) == config.uarts[chipsel].baseaddr)
break;
if (chipsel >= NR_UARTS) return;
if (chipsel >= MAX_UARTS) return;
 
if (uarts[chipsel].regs.lcr & UART_LCR_DLAB) {
switch (addr % UART_ADDR_SPACE) {
148,11 → 148,11
debug(4, "uart_read_byte(%x)", addr);
for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
for(chipsel = 0; chipsel < MAX_UARTS; chipsel++)
if ((addr & ~(UART_ADDR_SPACE-1)) == config.uarts[chipsel].baseaddr)
break;
 
if (chipsel >= NR_UARTS)
if (chipsel >= MAX_UARTS)
return 0;
 
if (uarts[chipsel].regs.lcr & UART_LCR_DLAB) {
/trunk/or1ksim/toplevel.c
52,7 → 52,7
#include "gdbcomm.h"
 
/* CVS revision number. */
const char rcsrev[] = "$Revision: 1.48 $";
const char rcsrev[] = "$Revision: 1.49 $";
 
/* Continuos run versus single step tracing switch. */
int cont_run;
154,6 → 154,7
/* Initalizes all devices and sim */
void sim_init ()
{
init_memory_table ();
init_labels();
init_breakpoints();
initstats();
243,6 → 244,7
if (config.sim.verbose)
printf ("VAPI started, waiting for clients.\n");
}
lock_memory_table ();
uart_reset();
dma_reset();
252,7 → 254,7
pic_reset();
mc_reset();
reset();
/* Wait till all test are connected. */
if (config.vapi.enabled) {
int numu = vapi_num_unconnected (0);
333,6 → 335,8
/* Read configuration file. */
if (!runtime.sim.script_file_specified)
read_script_file ("sim.cfg");
if (!runtime.sim.script_file_specified && config.sim.verbose)
fprintf (stderr, "WARNING: No config file read, assuming default configuration.\n");
print_config();
sim_init ();
signal(SIGINT, ctrl_c);
/trunk/or1ksim/sim-config.c
1,708 → 1,806
/* config.c -- Simulator configuration
Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
 
This file is part of OpenRISC 1000 Architectural Simulator.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
/* Simulator configuration. Eventually this one will be a lot bigger. */
 
#include <stdlib.h>
#include "sim-config.h"
#include "abstract.h"
#include "spr_defs.h"
#include "pic.h"
 
#define WARNING(s) fprintf (stderr, "WARNING: config.%s: %s\n", sections[section], s)
#define ERROR(s) {fprintf (stderr, "ERROR: %s\n", s); if (runtime.sim.init) exit (1);}
 
struct config config;
struct runtime runtime;
 
int section = 0;
extern struct section {
char *name;
int flags;
} sections[];
 
void init_defconfig()
{
unsigned long val;
memset(&config, 0, sizeof(config));
memset(&runtime, 0, sizeof(runtime));
/* Sim */
config.sim.exe_log = 0;
runtime.sim.fexe_log = NULL;
strcpy (config.sim.exe_log_fn, "executed.log");
config.sim.debug = 0;
config.sim.verbose = 1;
config.sim.iprompt = 0;
config.sim.profile = 0;
runtime.sim.fprof = NULL;
strcpy (config.sim.prof_fn, "sim.profile");
runtime.sim.init = 1;
runtime.sim.script_file_specified = 0;
/* Memory */
config.memory.type = MT_PATTERN;
config.memory.pattern = 0;
config.memory.random_seed = -1; /* Generate new seed */
strcpy(config.memory.memory_table_file, "simmem.cfg");
/* Memory Controller */
config.mc.enabled = 0;
/* Uarts */
config.nuarts = 0;
config.uarts_enabled = 0;
/* DMAs */
config.ndmas = 0;
config.dmas_enabled = 0;
/* CPU */
config.cpu.superscalar = 0;
config.sim.history = 0;
config.cpu.hazards = 0;
config.cpu.dependstats = 0;
config.cpu.slp = 0;
config.cpu.upr = SPR_UPR_UP | SPR_UPR_DCP | SPR_UPR_ICP | SPR_UPR_DMP
| SPR_UPR_IMP | SPR_UPR_OB32P | SPR_UPR_DUP | SPR_UPR_PICP
| SPR_UPR_PMP | SPR_UPR_TTP;
 
/* Debug */
config.debug.enabled = 0;
config.debug.gdb_enabled = 0;
config.debug.server_port = 0;
/* VAPI */
config.vapi.enabled = 0;
strcpy (config.vapi.vapi_fn, "vapi.log");
runtime.vapi.vapi_file = NULL;
/* Ethernet */
config.ethernets_enabled = 0;
/* Tick timer */
config.tick.enabled = 0;
 
/* Old */
config.dc.tagtype = PHYSICAL/*VIRTUAL*/;
config.ic.tagtype = PHYSICAL/*VIRTUAL*/;
config.clkcycle_ns = 4; /* 4 for 4ns (250MHz) */
}
 
int parse_args(int argc, char *argv[])
{
unsigned long val;
argv++; argc--;
while (argc) {
if (argc && (*argv[0] != '-')) {
runtime.sim.filename = argv[0];
argc--;
argv++;
} else
if (strcmp(*argv, "-f") == 0 || strcmp(*argv, "--file") == 0) {
argv++; argc--;
read_script_file(argv[0]);
argv++; argc--;
} else
if (strcmp(*argv, "--nosrv") == 0) { /* (CZ) */
config.debug.gdb_enabled = 0;
argv++; argc--;
} else
if (strcmp(*argv, "--srv") == 0) { /* (CZ) */
char *s;
if(!--argc)
return 1;
config.debug.enabled = 1;
config.debug.gdb_enabled = 0;
config.debug.server_port = strtol(*(++argv),&s,10);
if(*s)
return 1;
argv++; argc--;
} else
if (strcmp(*argv, "-i") == 0) {
config.sim.iprompt = 1;
argv++; argc--;
} else
if (strcmp(*argv, "-v") == 0) {
version();
exit(0);
} else
if (strcmp(*argv, "--profile") == 0) {
config.sim.profile = 1;
argv++; argc--;
} else {
printf("Unknown option: %s\n", *argv);
return 1;
}
}
if (!argc)
return 0;
return 0;
}
 
#define CNV(x) ((isblank(x) || (x) == 0) ? ' ' : (x))
 
/* Substitute for less powerful fscanf */
int fscanf_ex (FILE *f, char *fmt, void *buf, char *str) {
char tmp[STR_SIZE];
char ch;
int i = 0;
while (*fmt) {
switch (*fmt) {
case '%':
while(*fmt != 0 && !isalpha (*fmt))
tmp[i++] = *(fmt++);
tmp[i++] = *(fmt++);
if (tmp[i - 1] == 's') {
char *cbuf = (char *)buf;
i = 0;
while (ch = (f ? fgetc (f) : *str++), isblank(ch))
if (f ? feof (f) : *str) return 1;
if (f)
ungetc (ch, f);
else
str--;
while ((*(cbuf++) = ch = (f ? fgetc (f) : *str++), CNV(ch) ) != *fmt) {
if ((f ? feof (f) : *str)) return 1;
if (++i >= STR_SIZE) {
fprintf (stderr, "ERROR: string too long.\n");
return 1;
}
}
*(--cbuf) = 0;
fmt++;
} else {
tmp[i++] = 0;
if (f)
fscanf (f, tmp, buf);
else
sscanf (str, tmp, buf);
}
break;
default:
while ((ch = (f ? fgetc (f) : *str++)) != *fmt) {
if (!isblank (ch)) {
char tmp[200];
sprintf (tmp, "unexpected char '%c' (expecting '%c')\n", ch, *fmt);
WARNING(tmp);
}
if ((f ? feof (f) : *str)) return 1;
}
fmt++;
break;
}
}
return 0;
}
 
void print_config()
{
if (config.sim.verbose) {
printf("Verbose on, ");
if (config.sim.debug)
printf("simdebug on, ");
else
printf("simdebug off, ");
if (config.sim.iprompt)
printf("interactive prompt on\n");
else
printf("interactive prompt off\n");
printf("Machine initialization...\n");
printf("Clock cycle: %d ns\n", config.clkcycle_ns);
if (testsprbits(SPR_UPR, SPR_UPR_DCP))
printf("Data cache tag: %s\n", config.dc.tagtype == VIRTUAL ? "virtual" : "physical");
else
printf("No data cache.\n");
if (testsprbits(SPR_UPR, SPR_UPR_ICP))
printf("Insn cache tag: %s\n", config.ic.tagtype == VIRTUAL ? "virtual" : "physical");
else
printf("No instruction cache.\n");
if (config.cpu.bpb)
printf("BPB simulation on.\n");
else
printf("BPB simulation off.\n");
if (config.cpu.btic)
printf("BTIC simulation on.\n");
else
printf("BTIC simulation off.\n");
}
}
 
void change_device ();
void end_device ();
void uart_baseaddr ();
void uart_rxfile ();
void uart_txfile ();
void uart_jitter ();
void uart_irq ();
void uart_16550 ();
void uart_vapi_id ();
void dma_baseaddr ();
void dma_irq ();
void dma_vapi_id ();
void memory_type ();
void eth_baseaddr ();
void eth_dma ();
void eth_rx_channel ();
void eth_tx_channel ();
void eth_rxfile ();
void eth_txfile ();
void eth_vapi_id ();
 
unsigned long tempL;
unsigned long tempUL;
char tempS[STR_SIZE];
 
#define CPF_SUBSECTION 1
#define CPF_SUBFIELD 2
 
struct section sections[] = {
{"?", 0}, /* 0 */
{"mc", 0},
{"uart", 0},
{"dma", 0},
{"memory", 0},
{"cpu", 0},
{"sim", 0},
{"debug", 0},
{"VAPI", 0},
{"ethernet",0},
{"tick", 0} /* 10 */
};
 
/* *INDENT-OFF* */
 
/* Parameter definitions */
struct config_params {
int section;
int attr;
char *name;
char *type;
void (*func)();
void *addr;
} config_params[] = {
{1, 0, "enabled", "=%i", NULL, (void *)(&config.mc.enabled)},
{1, 0, "baseaddr", "=0x%x", NULL, (void *)(&config.mc.baseaddr)},
{1, 0, "POC", "=0x%x", NULL, (void *)(&config.mc.POC)},
 
{2, 0, "enabled", "=%i", NULL, (void *)(&config.uarts_enabled)},
{2, 0, "nuarts", "=%i", NULL, (void *)(&config.nuarts)},
{2, 0, "device", "%i", change_device, (void *)(&tempL)},
{2, 0, "enddevice", "", end_device, NULL},
{2, 0, "baseaddr", "=0x%x", uart_baseaddr, (void *)(&tempUL)},
{2, 0, "irq", "=%i", uart_irq, (void *)(&tempL)},
{2, 0, "16550", "=%i", uart_16550, (void *)(&tempL)},
{2, 0, "jitter", "=%i", uart_jitter, (void *)(&tempL)},
{2, 0, "rxfile", "=\"%s\"", uart_rxfile, (void *)(&tempS[0])},
{2, 0, "txfile", "=\"%s\"", uart_txfile, (void *)(&tempS[0])},
{2, 0, "vapi_id", "=0x%x", uart_vapi_id, (void *)(&tempUL)},
 
{3, 0, "enabled", "=%i", NULL, (void *)(&config.dmas_enabled)},
{3, 0, "ndmas", "=%i", NULL, (void *)(&config.ndmas)},
{3, 0, "device", "%i", change_device, (void *)(&tempL)},
{3, 0, "enddevice", "", end_device, NULL},
{3, 0, "baseaddr", "=0x%x", dma_baseaddr, (void *)(&tempUL)},
{3, 0, "irq", "=%i", dma_baseaddr, (void *)(&tempL)},
{3, 0, "vapi_id", "=0x%x", dma_vapi_id, (void *)(&tempUL)},
 
{4, 0, "memory_table_file", "=\"%s\"", NULL, (void *)(&config.memory.memory_table_file[0])},
{4, 0, "random_seed", "=%i", NULL, (void *)(&config.memory.random_seed)},
{4, 0, "pattern", "=%i", NULL, (void *)(&config.memory.pattern)},
{4, 0, "type", "=%s ", memory_type, (void *)(&tempS[0])},
 
{5, 0, "ver", "=0x%x", NULL, (void *)(&config.cpu.ver)},
{5, 0, "rev", "=0x%x", NULL, (void *)(&config.cpu.rev)},
{5, 0, "upr", "=0x%x", NULL, (void *)(&config.cpu.upr)},
{5, 0, "hazards", "=%i", NULL, (void *)(&config.cpu.hazards)},
{5, 0, "superscalar", "=%i", NULL, (void *)(&config.cpu.superscalar)},
{5, 0, "dependstats", "=%i", NULL, (void *)(&config.cpu.dependstats)},
{5, 0, "slp", "=%i", NULL, (void *)(&config.cpu.slp)},
{5, 0, "bpb", "=%i", NULL, (void *)(&config.cpu.bpb)},
{5, 0, "btic", "=%i", NULL, (void *)(&config.cpu.btic)},
 
{6, 0, "debug", "=%i", NULL, (void *)(&config.sim.debug)},
{6, 0, "iprompt", "=%i", NULL, (void *)(&config.sim.iprompt)},
{6, 0, "verbose", "=%i", NULL, (void *)(&config.sim.verbose)},
{6, 0, "profile", "=%i", NULL, (void *)(&config.sim.profile)},
{6, 0, "prof_fn", "=\"%s\"", NULL, (void *)(&config.sim.prof_fn[0])},
{6, 0, "history", "=%i", NULL, (void *)(&config.sim.history)},
{6, 0, "exe_log", "=%i", NULL, (void *)(&config.sim.exe_log)},
{6, 0, "exe_log_fn", "=\"%s\"", NULL, (void *)(&config.sim.exe_log_fn[0])},
 
{7, 0, "enabled", "=%i", NULL, (void *)(&config.debug.enabled)},
{7, 0, "gdb_enabled", "=%i", NULL, (void *)(&config.debug.gdb_enabled)},
{7, 0, "server_port", "=%i", NULL, (void *)(&config.debug.server_port)},
 
{8, 0, "enabled", "=%i", NULL, (void *)(&config.vapi.enabled)},
{8, 0, "server_port", "=%i", NULL, (void *)(&config.vapi.server_port)},
{8, 0, "log_enabled", "=%i", NULL, (void *)(&config.vapi.log_enabled)},
{8, 0, "log_device_id", "=%i", NULL, (void *)(&config.vapi.log_device_id)},
{8, 0, "vapi_log_fn", "=\"%s\"", NULL, (void *)(&config.vapi.vapi_fn[0])},
 
{9, 0, "enabled", "=%i", NULL, (void *)(&config.ethernets_enabled)},
{9, 0, "nethernets", "=%i", NULL, (void *)(&config.nethernets)},
{9, 0, "device", "%i", change_device, (void *)(&tempL)},
{9, 0, "enddevice", "", end_device, NULL},
{9, 0, "baseaddr", "=0x%x", eth_baseaddr, (void *)(&tempUL)},
{9, 0, "dma", "=%i", eth_dma, (void *)(&tempL)},
{9, 0, "rx_channel", "=%i", eth_rx_channel,(void *)(&tempL)},
{9, 0, "tx_channel", "=%i", eth_tx_channel,(void *)(&tempL)},
{9, 0, "rxfile", "=\"%s\"", eth_rxfile, (void *)(&tempS[0])},
{9, 0, "txfile", "=\"%s\"", eth_txfile, (void *)(&tempS[0])},
{9, 0, "vapi_id", "=0x%x", eth_vapi_id, (void *)(&tempUL)},
 
{10,0, "enabled", "=%i", NULL, (void *)(&config.tick.enabled)},
{10,0, "irq", "=%i", NULL, (void *)(&config.tick.irq)},
};
 
/* *INDENT-ON* */
 
int current_device = -1;
void change_device () {
current_device = tempL;
}
 
void end_device () {
current_device = -1;
}
 
void uart_baseaddr () {
if (current_device >= 0 && current_device < config.nuarts)
config.uarts[current_device].baseaddr = tempUL;
else
ERROR("invalid device number.");
}
 
void uart_jitter () {
if (current_device >= 0 && current_device < config.nuarts)
config.uarts[current_device].jitter = tempL;
else
ERROR("invalid device number.");
}
 
void uart_irq () {
if (current_device >= 0 && current_device < config.nuarts)
config.uarts[current_device].irq = tempL;
else
ERROR("invalid device number.");
}
 
void uart_16550 () {
if (current_device >= 0 && current_device < config.nuarts)
config.uarts[current_device].uart16550 = tempL;
else
ERROR("invalid device number.");
}
 
void uart_rxfile () {
if (current_device >= 0 && current_device < config.nuarts)
strcpy (config.uarts[current_device].rxfile, tempS);
else
ERROR("invalid device number.");
}
 
void uart_txfile () {
if (current_device >= 0 && current_device < config.nuarts)
strcpy (config.uarts[current_device].txfile, tempS);
else
ERROR("invalid device number.");
}
 
void uart_vapi_id () {
if (current_device >= 0 && current_device < config.nuarts)
config.uarts[current_device].vapi_id = tempUL;
else
ERROR("invalid device number.");
}
 
void dma_baseaddr () {
if (current_device >= 0 && current_device < config.ndmas)
config.dmas[current_device].baseaddr = tempUL;
else
ERROR("invalid device number.");
}
 
void dma_irq () {
if (current_device >= 0 && current_device < config.ndmas)
config.dmas[current_device].irq = tempL;
else
ERROR("invalid device number.");
}
 
void dma_vapi_id () {
if (current_device >= 0 && current_device < config.ndmas)
config.dmas[current_device].vapi_id = tempUL;
else
ERROR("invalid device number.");
}
 
void memory_type () {
if (strcmp (tempS, "unknown") == 0)
config.memory.type = MT_UNKNOWN;
else if (strcmp (tempS, "random") == 0)
config.memory.type = MT_RANDOM;
else if (strcmp (tempS, "pattern") == 0)
config.memory.type = MT_PATTERN;
else if (strcmp (tempS, "zero") == 0) {
config.memory.type = MT_PATTERN;
config.memory.pattern = 0;
} else {
char tmp[200];
sprintf (tmp, "invalid memory type '%s'.\n", tempS);
ERROR(tmp);
}
}
 
void eth_baseaddr () {
if (current_device >= 0 && current_device < config.nethernets)
config.ethernets[current_device].baseaddr = tempUL;
else
ERROR("invalid device number.");
}
 
void eth_dma () {
if (current_device >= 0 && current_device < config.nethernets)
config.ethernets[current_device].dma = tempL;
else
ERROR("invalid device number.");
}
 
void eth_rx_channel () {
if (current_device >= 0 && current_device < config.nethernets)
config.ethernets[current_device].rx_channel = tempL;
else
ERROR("invalid device number.");
}
 
void eth_tx_channel () {
if (current_device >= 0 && current_device < config.nethernets)
config.ethernets[current_device].rx_channel = tempL;
else
ERROR("invalid device number.");
}
 
void eth_rxfile () {
if (current_device >= 0 && current_device < config.nethernets)
strcpy (config.ethernets[current_device].rxfile, tempS);
else
ERROR("invalid device number.");
}
 
void eth_txfile () {
if (current_device >= 0 && current_device < config.nethernets)
strcpy (config.ethernets[current_device].txfile, tempS);
else
ERROR("invalid device number.");
}
 
void eth_vapi_id () {
if (current_device >= 0 && current_device < config.nethernets)
config.ethernets[current_device].vapi_id = tempUL;
else
ERROR("nvalid device number.");
}
 
 
 
/* Read environment from a script file. Does not fail - assumes defaukt configuration instead.
The syntax of script file is:
param = value
section x
data
param = value
end
Example:
section mc
memory_table_file = sim.mem
enable = 1
POC = 0x47892344
end
*/
void read_script_file (char *filename)
{
FILE *f;
unsigned long memory_needed = 0;
char *home = getenv("HOME");
char ctmp[STR_SIZE];
int local = 1;
section = 0;
sprintf(ctmp, "%s/.or1k/%s", home, filename);
if ((f = fopen (filename, "rt")) != NULL
|| home != NULL && !(local = 0) && (f = fopen (ctmp, "rt")) != NULL) {
unsigned long start, length;
char type[STR_SIZE];
int nparam;
int rd, wd;
if (config.sim.verbose)
printf ("Reading script file from '%s':\n", local ? filename : ctmp);
while (!feof(f)) {
char param[STR_SIZE];
if (fscanf(f, "%s ", &param) != 1) break;
/* Is this a sections? */
if (strcmp (param, "section") == 0) {
int i;
section = 0;
if (fscanf (f, "%s\n", &param) != 1) {
fprintf (stderr, "%s: ERROR: Section name required.\n", local ? filename : ctmp);
exit (1);
}
for (i = 1; i < sizeof(sections) / sizeof(struct section); i++)
if (strcmp (sections[i].name, param) == 0) {
section = i;
break;
}
if (!section) {
char tmp[200];
sprintf (tmp, "Unknown section: %s; ignoring.", param);
WARNING(tmp);
/* just skip section */
while (fscanf (f, "%s\n", &param) != 1 && strcmp (param, "end"));
}
} else if (strcmp (param, "end") == 0) {
section = 0;
} else if (strncmp (param, "/*", 2) == 0) {
char c0 = 0, c1 = 0;
while (c0 != '*' || c1 != '/') {
c0 = c1;
c1 = fgetc(f);
if (feof(f)) {
fprintf (stderr, "%s: ERROR: Comment reached EOF.\n", local ? filename : ctmp);
exit (1);
}
}
} else {
int i, found = -1;
for (i = 0; i < sizeof(config_params)/sizeof(struct config_params); i++)
if (config_params[i].section == section && strcmp (config_params[i].name, param) == 0) {
found = i;
break;
}
if (found < 0) {
char tmp[200];
sprintf (tmp, "Invalid parameter: %s; ignoring.\n", param);
WARNING(tmp);
while (fgetc(f) != '\n' || feof(f));
continue;
}
 
/* Parse parameter value */
{
if (config_params[found].type[0])
if(fscanf_ex (f, config_params[found].type, config_params[found].addr, 0))
exit (1);
}
if (config_params[found].func)
config_params[found].func();
}
}
fclose (f);
} else
if (config.sim.verbose)
fprintf (stderr, "WARNING: Cannot read script file from '%s',\nneither '%s'; assuming standard configuration.\n", filename, ctmp);
 
/* Initialize memory table. */
sim_read_memory_table (config.memory.memory_table_file);
runtime.sim.script_file_specified = 1;
}
 
/* Utility for execution of set sim command. */
static int set_config (char *s)
{
char *sec, *item, *params;
int noparams = 0, i, noitem = 0;
while (*s && isblank (*s)) s++;
sec = s;
printf ("s:%s\n", s);
while (*s && *s != ' ') s++;
if (!(*s)) noitem = 1;
*s = 0;
printf ("sec:%s\n", sec);
section = 0;
for (i = 1; i < sizeof(sections) / sizeof(struct section); i++)
if (strcmp (sections[i].name, sec) == 0) {
section = i;
break;
}
 
if (!section) return 1;
if (noitem) return 2;
item = ++s;
 
while (*s && *s != ' ') s++;
if (!(*s)) {
noparams = 1;
params = "";
} else
params = s + 1;
*s = 0;
printf ("item:%s\n", item);
printf ("params:%s\n", params);
{
int i, found = -1;
for (i = 0; i < sizeof(config_params)/sizeof(struct config_params); i++)
if (config_params[i].section == section && strcmp (config_params[i].name, item) == 0) {
found = i;
break;
}
if (found < 0) return 2;
/* Parse parameter value */
if (config_params[found].type[0])
if(fscanf_ex (0, config_params[found].type, config_params[found].addr, params))
return 3;
if (config_params[found].func)
config_params[found].func();
}
return 0;
}
 
/* Executes set sim command, displays error. */
void set_config_command(char *s)
{
int i;
switch (set_config (s)) {
case 1:
printf ("Invalid or missing section name. One of valid sections must be specified:\n");
for (i = 1; i < sizeof(sections) / sizeof(struct section); i++)
printf ("%s ", sections[i].name);
printf ("\n");
break;
case 2:
printf ("Invalid or missing item name. One of valid items must be specified:\n");
for (i = 0; i < sizeof(config_params)/sizeof(struct config_params); i++)
if (config_params[i].section == section)
printf ("%s ", config_params[i].name);
printf ("\n");
break;
case 3:
printf ("Invalid parameters specified.\n");
break;
}
}
/* config.c -- Simulator configuration
Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
 
This file is part of OpenRISC 1000 Architectural Simulator.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
/* Simulator configuration. Eventually this one will be a lot bigger. */
 
#include <stdlib.h>
#include "sim-config.h"
#include "abstract.h"
#include "spr_defs.h"
#include "pic.h"
 
#define WARNING(s) fprintf (stderr, "WARNING: config.%s: %s\n", sections[section], s)
#define ERROR(s) {fprintf (stderr, "ERROR: %s\n", s); if (runtime.sim.init) exit (1);}
 
struct config config;
struct runtime runtime;
 
int section = 0;
extern struct section {
char *name;
int flags;
} sections[];
 
void init_defconfig()
{
int i;
memset(&config, 0, sizeof(config));
memset(&runtime, 0, sizeof(runtime));
/* Sim */
config.sim.exe_log = 0;
runtime.sim.fexe_log = NULL;
strcpy (config.sim.exe_log_fn, "executed.log");
config.sim.debug = 0;
config.sim.verbose = 1;
config.sim.iprompt = 0;
config.sim.profile = 0;
runtime.sim.fprof = NULL;
strcpy (config.sim.prof_fn, "sim.profile");
runtime.sim.init = 1;
runtime.sim.script_file_specified = 0;
/* Memory */
config.memory.type = MT_PATTERN;
config.memory.pattern = 0;
config.memory.random_seed = -1; /* Generate new seed */
for (i = 0; i < MAX_MEMORIES; i++) {
config.memory.table[i].ce = -1; /* memory is disabled by default */
runtime.memory.table[i].log = NULL;
}
/* Memory Controller */
config.mc.enabled = 0;
/* Uarts */
config.nuarts = 0;
config.uarts_enabled = 0;
/* DMAs */
config.ndmas = 0;
config.dmas_enabled = 0;
/* CPU */
config.cpu.superscalar = 0;
config.sim.history = 0;
config.cpu.hazards = 0;
config.cpu.dependstats = 0;
config.cpu.slp = 0;
config.cpu.upr = SPR_UPR_UP | SPR_UPR_DCP | SPR_UPR_ICP | SPR_UPR_DMP
| SPR_UPR_IMP | SPR_UPR_OB32P | SPR_UPR_DUP | SPR_UPR_PICP
| SPR_UPR_PMP | SPR_UPR_TTP;
 
/* Debug */
config.debug.enabled = 0;
config.debug.gdb_enabled = 0;
config.debug.server_port = 0;
/* VAPI */
config.vapi.enabled = 0;
strcpy (config.vapi.vapi_fn, "vapi.log");
runtime.vapi.vapi_file = NULL;
/* Ethernet */
config.ethernets_enabled = 0;
/* Tick timer */
config.tick.enabled = 0;
 
/* Old */
config.dc.tagtype = PHYSICAL/*VIRTUAL*/;
config.ic.tagtype = PHYSICAL/*VIRTUAL*/;
config.clkcycle_ns = 4; /* 4 for 4ns (250MHz) */
}
 
int parse_args(int argc, char *argv[])
{
unsigned long val;
argv++; argc--;
while (argc) {
if (argc && (*argv[0] != '-')) {
runtime.sim.filename = argv[0];
argc--;
argv++;
} else
if (strcmp(*argv, "-f") == 0 || strcmp(*argv, "--file") == 0) {
argv++; argc--;
read_script_file(argv[0]);
argv++; argc--;
} else
if (strcmp(*argv, "--nosrv") == 0) { /* (CZ) */
config.debug.gdb_enabled = 0;
argv++; argc--;
} else
if (strcmp(*argv, "--srv") == 0) { /* (CZ) */
char *s;
if(!--argc)
return 1;
config.debug.enabled = 1;
config.debug.gdb_enabled = 0;
config.debug.server_port = strtol(*(++argv),&s,10);
if(*s)
return 1;
argv++; argc--;
} else
if (strcmp(*argv, "-i") == 0) {
config.sim.iprompt = 1;
argv++; argc--;
} else
if (strcmp(*argv, "-v") == 0) {
version();
exit(0);
} else
if (strcmp(*argv, "--profile") == 0) {
config.sim.profile = 1;
argv++; argc--;
} else {
printf("Unknown option: %s\n", *argv);
return 1;
}
}
if (!argc)
return 0;
return 0;
}
 
#define CNV(x) ((isblank(x) || (x) == 0) ? ' ' : (x))
 
/* Substitute for less powerful fscanf */
int fscanf_ex (FILE *f, char *fmt, void *buf, char *str) {
char tmp[STR_SIZE];
char ch;
int i = 0;
while (*fmt) {
switch (*fmt) {
case '%':
while(*fmt != 0 && !isalpha (*fmt))
tmp[i++] = *(fmt++);
tmp[i++] = *(fmt++);
if (tmp[i - 1] == 's') {
char *cbuf = (char *)buf;
i = 0;
while (ch = (f ? fgetc (f) : *str++), isblank(ch))
if (f ? feof (f) : *str) return 1;
if (f)
ungetc (ch, f);
else
str--;
while ((*(cbuf++) = ch = (f ? fgetc (f) : *str++), CNV(ch) ) != *fmt) {
if ((f ? feof (f) : *str)) return 1;
if (++i >= STR_SIZE) {
fprintf (stderr, "ERROR: string too long.\n");
return 1;
}
}
*(--cbuf) = 0;
fmt++;
} else {
tmp[i++] = 0;
if (f)
fscanf (f, tmp, buf);
else
sscanf (str, tmp, buf);
}
break;
default:
while ((ch = (f ? fgetc (f) : *str++)) != *fmt) {
if (!isblank (ch)) {
char tmp[200];
sprintf (tmp, "unexpected char '%c' (expecting '%c')\n", ch, *fmt);
WARNING(tmp);
}
if ((f ? feof (f) : *str)) return 1;
}
fmt++;
break;
}
}
return 0;
}
 
void print_config()
{
if (config.sim.verbose) {
printf("Verbose on, ");
if (config.sim.debug)
printf("simdebug on, ");
else
printf("simdebug off, ");
if (config.sim.iprompt)
printf("interactive prompt on\n");
else
printf("interactive prompt off\n");
printf("Machine initialization...\n");
printf("Clock cycle: %d ns\n", config.clkcycle_ns);
if (testsprbits(SPR_UPR, SPR_UPR_DCP))
printf("Data cache tag: %s\n", config.dc.tagtype == VIRTUAL ? "virtual" : "physical");
else
printf("No data cache.\n");
if (testsprbits(SPR_UPR, SPR_UPR_ICP))
printf("Insn cache tag: %s\n", config.ic.tagtype == VIRTUAL ? "virtual" : "physical");
else
printf("No instruction cache.\n");
if (config.cpu.bpb)
printf("BPB simulation on.\n");
else
printf("BPB simulation off.\n");
if (config.cpu.btic)
printf("BTIC simulation on.\n");
else
printf("BTIC simulation off.\n");
}
}
 
/* Forward declarations of functions */
void change_device ();
void end_device ();
void uart_nuarts ();
void uart_baseaddr ();
void uart_rxfile ();
void uart_txfile ();
void uart_jitter ();
void uart_irq ();
void uart_16550 ();
void uart_vapi_id ();
void dma_ndmas ();
void dma_baseaddr ();
void dma_irq ();
void dma_vapi_id ();
void memory_type ();
void memory_nmemories ();
void memory_ce ();
void memory_baseaddr ();
void memory_size ();
void memory_name ();
void memory_log ();
void memory_delayr ();
void memory_delayw ();
void eth_nethernets ();
void eth_baseaddr ();
void eth_dma ();
void eth_rx_channel ();
void eth_tx_channel ();
void eth_rxfile ();
void eth_txfile ();
void eth_vapi_id ();
 
unsigned long tempL;
unsigned long tempUL;
char tempS[STR_SIZE];
 
#define CPF_SUBSECTION 1
#define CPF_SUBFIELD 2
 
struct section sections[] = {
{"?", 0}, /* 0 */
{"mc", 0},
{"uart", 0},
{"dma", 0},
{"memory", 0},
{"cpu", 0},
{"sim", 0},
{"debug", 0},
{"VAPI", 0},
{"ethernet",0},
{"tick", 0} /* 10 */
};
 
/* *INDENT-OFF* */
 
/* Parameter definitions */
struct config_params {
int section;
int attr;
char *name;
char *type;
void (*func)();
void *addr;
} config_params[] = {
{1, 0, "enabled", "=%i", NULL, (void *)(&config.mc.enabled)},
{1, 0, "baseaddr", "=0x%x", NULL, (void *)(&config.mc.baseaddr)},
{1, 0, "POC", "=0x%x", NULL, (void *)(&config.mc.POC)},
 
{2, 0, "enabled", "=%i", NULL, (void *)(&config.uarts_enabled)},
{2, 0, "nuarts", "=%i", uart_nuarts, (void *)(&tempL)},
{2, 0, "device", "%i", change_device, (void *)(&tempL)},
{2, 0, "enddevice", "", end_device, NULL},
{2, 0, "baseaddr", "=0x%x", uart_baseaddr, (void *)(&tempUL)},
{2, 0, "irq", "=%i", uart_irq, (void *)(&tempL)},
{2, 0, "16550", "=%i", uart_16550, (void *)(&tempL)},
{2, 0, "jitter", "=%i", uart_jitter, (void *)(&tempL)},
{2, 0, "rxfile", "=\"%s\"", uart_rxfile, (void *)(&tempS[0])},
{2, 0, "txfile", "=\"%s\"", uart_txfile, (void *)(&tempS[0])},
{2, 0, "vapi_id", "=0x%x", uart_vapi_id, (void *)(&tempUL)},
 
{3, 0, "enabled", "=%i", NULL, (void *)(&config.dmas_enabled)},
{3, 0, "ndmas", "=%i", dma_ndmas, (void *)(&tempL)},
{3, 0, "device", "%i", change_device, (void *)(&tempL)},
{3, 0, "enddevice", "", end_device, NULL},
{3, 0, "baseaddr", "=0x%x", dma_baseaddr, (void *)(&tempUL)},
{3, 0, "irq", "=%i", dma_baseaddr, (void *)(&tempL)},
{3, 0, "vapi_id", "=0x%x", dma_vapi_id, (void *)(&tempUL)},
 
{4, 0, "random_seed", "=%i", NULL, (void *)(&config.memory.random_seed)},
{4, 0, "pattern", "=%i", NULL, (void *)(&config.memory.pattern)},
{4, 0, "type", "=%s ", memory_type, (void *)(&tempS[0])},
{4, 0, "nmemories", "=%i", memory_nmemories,(void *)(&tempL)},
{4, 0, "device", "%i", change_device, (void *)(&tempL)},
{4, 0, "enddevice", "", end_device, NULL},
{4, 0, "ce", "=%i", memory_ce, (void *)(&tempL)},
{4, 0, "baseaddr", "=0x%x", memory_baseaddr,(void *)(&tempUL)},
{4, 0, "size", "=0x%x", memory_size, (void *)(&tempUL)},
{4, 0, "name", "=%s ", memory_name, (void *)(&tempS[0])},
{4, 0, "log", "=%s ", memory_log, (void *)(&tempS[0])},
{4, 0, "delayr", "=%i", memory_delayr, (void *)(&tempL)},
{4, 0, "delayw", "=%i", memory_delayw, (void *)(&tempL)},
 
{5, 0, "ver", "=0x%x", NULL, (void *)(&config.cpu.ver)},
{5, 0, "rev", "=0x%x", NULL, (void *)(&config.cpu.rev)},
{5, 0, "upr", "=0x%x", NULL, (void *)(&config.cpu.upr)},
{5, 0, "hazards", "=%i", NULL, (void *)(&config.cpu.hazards)},
{5, 0, "superscalar", "=%i", NULL, (void *)(&config.cpu.superscalar)},
{5, 0, "dependstats", "=%i", NULL, (void *)(&config.cpu.dependstats)},
{5, 0, "slp", "=%i", NULL, (void *)(&config.cpu.slp)},
{5, 0, "bpb", "=%i", NULL, (void *)(&config.cpu.bpb)},
{5, 0, "btic", "=%i", NULL, (void *)(&config.cpu.btic)},
 
{6, 0, "debug", "=%i", NULL, (void *)(&config.sim.debug)},
{6, 0, "iprompt", "=%i", NULL, (void *)(&config.sim.iprompt)},
{6, 0, "verbose", "=%i", NULL, (void *)(&config.sim.verbose)},
{6, 0, "profile", "=%i", NULL, (void *)(&config.sim.profile)},
{6, 0, "prof_fn", "=\"%s\"", NULL, (void *)(&config.sim.prof_fn[0])},
{6, 0, "history", "=%i", NULL, (void *)(&config.sim.history)},
{6, 0, "exe_log", "=%i", NULL, (void *)(&config.sim.exe_log)},
{6, 0, "exe_log_fn", "=\"%s\"", NULL, (void *)(&config.sim.exe_log_fn[0])},
 
{7, 0, "enabled", "=%i", NULL, (void *)(&config.debug.enabled)},
{7, 0, "gdb_enabled", "=%i", NULL, (void *)(&config.debug.gdb_enabled)},
{7, 0, "server_port", "=%i", NULL, (void *)(&config.debug.server_port)},
 
{8, 0, "enabled", "=%i", NULL, (void *)(&config.vapi.enabled)},
{8, 0, "server_port", "=%i", NULL, (void *)(&config.vapi.server_port)},
{8, 0, "log_enabled", "=%i", NULL, (void *)(&config.vapi.log_enabled)},
{8, 0, "log_device_id", "=%i", NULL, (void *)(&config.vapi.log_device_id)},
{8, 0, "vapi_log_fn", "=\"%s\"", NULL, (void *)(&config.vapi.vapi_fn[0])},
 
{9, 0, "enabled", "=%i", NULL, (void *)(&config.ethernets_enabled)},
{9, 0, "nethernets", "=%i", eth_nethernets,(void *)(&tempL)},
{9, 0, "device", "%i", change_device, (void *)(&tempL)},
{9, 0, "enddevice", "", end_device, NULL},
{9, 0, "baseaddr", "=0x%x", eth_baseaddr, (void *)(&tempUL)},
{9, 0, "dma", "=%i", eth_dma, (void *)(&tempL)},
{9, 0, "rx_channel", "=%i", eth_rx_channel,(void *)(&tempL)},
{9, 0, "tx_channel", "=%i", eth_tx_channel,(void *)(&tempL)},
{9, 0, "rxfile", "=\"%s\"", eth_rxfile, (void *)(&tempS[0])},
{9, 0, "txfile", "=\"%s\"", eth_txfile, (void *)(&tempS[0])},
{9, 0, "vapi_id", "=0x%x", eth_vapi_id, (void *)(&tempUL)},
 
{10,0, "enabled", "=%i", NULL, (void *)(&config.tick.enabled)},
{10,0, "irq", "=%i", NULL, (void *)(&config.tick.irq)},
};
 
/* *INDENT-ON* */
 
int current_device = -1;
void change_device () {
current_device = tempL;
}
 
void end_device () {
current_device = -1;
}
 
void uart_nuarts () {
if (tempL >= 0 && tempL < MAX_UARTS)
config.nuarts = tempL;
else
ERROR("invalid number of devices.");
}
 
void uart_baseaddr () {
if (current_device >= 0 && current_device < config.nuarts)
config.uarts[current_device].baseaddr = tempUL;
else
ERROR("invalid device number.");
}
 
void uart_jitter () {
if (current_device >= 0 && current_device < config.nuarts)
config.uarts[current_device].jitter = tempL;
else
ERROR("invalid device number.");
}
 
void uart_irq () {
if (current_device >= 0 && current_device < config.nuarts)
config.uarts[current_device].irq = tempL;
else
ERROR("invalid device number.");
}
 
void uart_16550 () {
if (current_device >= 0 && current_device < config.nuarts)
config.uarts[current_device].uart16550 = tempL;
else
ERROR("invalid device number.");
}
 
void uart_rxfile () {
if (current_device >= 0 && current_device < config.nuarts)
strcpy (config.uarts[current_device].rxfile, tempS);
else
ERROR("invalid device number.");
}
 
void uart_txfile () {
if (current_device >= 0 && current_device < config.nuarts)
strcpy (config.uarts[current_device].txfile, tempS);
else
ERROR("invalid device number.");
}
 
void uart_vapi_id () {
if (current_device >= 0 && current_device < config.nuarts)
config.uarts[current_device].vapi_id = tempUL;
else
ERROR("invalid device number.");
}
 
void dma_ndmas () {
if (tempL >= 0 && tempL < MAX_DMAS)
config.ndmas = tempL;
else
ERROR("invalid number of devices.");
}
 
void dma_baseaddr () {
if (current_device >= 0 && current_device < config.ndmas)
config.dmas[current_device].baseaddr = tempUL;
else
ERROR("invalid device number.");
}
 
void dma_irq () {
if (current_device >= 0 && current_device < config.ndmas)
config.dmas[current_device].irq = tempL;
else
ERROR("invalid device number.");
}
 
void dma_vapi_id () {
if (current_device >= 0 && current_device < config.ndmas)
config.dmas[current_device].vapi_id = tempUL;
else
ERROR("invalid device number.");
}
 
void memory_nmemories () {
if (tempL >= 0 && tempL < MAX_MEMORIES)
config.memory.nmemories = tempL;
else
ERROR("invalid number of devices.");
}
 
void memory_type () {
if (strcmp (tempS, "unknown") == 0)
config.memory.type = MT_UNKNOWN;
else if (strcmp (tempS, "random") == 0)
config.memory.type = MT_RANDOM;
else if (strcmp (tempS, "pattern") == 0)
config.memory.type = MT_PATTERN;
else if (strcmp (tempS, "zero") == 0) {
config.memory.type = MT_PATTERN;
config.memory.pattern = 0;
} else {
char tmp[200];
sprintf (tmp, "invalid memory type '%s'.\n", tempS);
ERROR(tmp);
}
}
 
void memory_ce () {
if (current_device >= 0 && current_device < config.memory.nmemories)
config.memory.table[current_device].ce = tempL;
else
ERROR("invalid device number.");
}
 
void memory_baseaddr () {
if (current_device >= 0 && current_device < config.memory.nmemories)
config.memory.table[current_device].baseaddr = tempUL;
else
ERROR("invalid device number.");
}
 
void memory_size () {
if (current_device >= 0 && current_device < config.memory.nmemories)
config.memory.table[current_device].size = tempUL;
else
ERROR("invalid device number.");
}
 
void memory_name () {
if (current_device >= 0 && current_device < config.memory.nmemories)
strcpy (config.memory.table[current_device].name, tempS);
else
ERROR("invalid device number.");
}
 
void memory_log () {
if (current_device >= 0 && current_device < config.memory.nmemories)
strcpy (config.memory.table[current_device].log, tempS);
else
ERROR("invalid device number.");
}
 
void memory_delayr () {
if (current_device >= 0 && current_device < config.memory.nmemories)
config.memory.table[current_device].delayr = tempL;
else
ERROR("invalid device number.");
}
 
void memory_delayw () {
if (current_device >= 0 && current_device < config.memory.nmemories)
config.memory.table[current_device].delayw = tempL;
else
ERROR("invalid device number.");
}
 
void eth_nethernets () {
if (tempL >= 0 && tempL < MAX_ETHERNETS)
config.nethernets = tempL;
else
ERROR("invalid number of devices.");
}
 
void eth_baseaddr () {
if (current_device >= 0 && current_device < config.nethernets)
config.ethernets[current_device].baseaddr = tempUL;
else
ERROR("invalid device number.");
}
 
void eth_dma () {
if (current_device >= 0 && current_device < config.nethernets)
config.ethernets[current_device].dma = tempL;
else
ERROR("invalid device number.");
}
 
void eth_rx_channel () {
if (current_device >= 0 && current_device < config.nethernets)
config.ethernets[current_device].rx_channel = tempL;
else
ERROR("invalid device number.");
}
 
void eth_tx_channel () {
if (current_device >= 0 && current_device < config.nethernets)
config.ethernets[current_device].rx_channel = tempL;
else
ERROR("invalid device number.");
}
 
void eth_rxfile () {
if (current_device >= 0 && current_device < config.nethernets)
strcpy (config.ethernets[current_device].rxfile, tempS);
else
ERROR("invalid device number.");
}
 
void eth_txfile () {
if (current_device >= 0 && current_device < config.nethernets)
strcpy (config.ethernets[current_device].txfile, tempS);
else
ERROR("invalid device number.");
}
 
void eth_vapi_id () {
if (current_device >= 0 && current_device < config.nethernets)
config.ethernets[current_device].vapi_id = tempUL;
else
ERROR("nvalid device number.");
}
 
 
 
/* Read environment from a script file. Does not fail - assumes defaukt configuration instead.
The syntax of script file is:
param = value
section x
data
param = value
end
Example:
section mc
memory_table_file = sim.mem
enable = 1
POC = 0x47892344
end
*/
void read_script_file (char *filename)
{
FILE *f;
unsigned long memory_needed = 0;
char *home = getenv("HOME");
char ctmp[STR_SIZE];
int local = 1;
section = 0;
sprintf(ctmp, "%s/.or1k/%s", home, filename);
if ((f = fopen (filename, "rt")) != NULL
|| home != NULL && !(local = 0) && (f = fopen (ctmp, "rt")) != NULL) {
unsigned long start, length;
char type[STR_SIZE];
int nparam;
int rd, wd;
if (config.sim.verbose)
printf ("Reading script file from '%s':\n", local ? filename : ctmp);
while (!feof(f)) {
char param[STR_SIZE];
if (fscanf(f, "%s ", &param) != 1) break;
/* Is this a sections? */
if (strcmp (param, "section") == 0) {
int i;
section = 0;
if (fscanf (f, "%s\n", &param) != 1) {
fprintf (stderr, "%s: ERROR: Section name required.\n", local ? filename : ctmp);
exit (1);
}
for (i = 1; i < sizeof(sections) / sizeof(struct section); i++)
if (strcmp (sections[i].name, param) == 0) {
section = i;
break;
}
if (!section) {
char tmp[200];
sprintf (tmp, "Unknown section: %s; ignoring.", param);
WARNING(tmp);
/* just skip section */
while (fscanf (f, "%s\n", &param) != 1 && strcmp (param, "end"));
}
} else if (strcmp (param, "end") == 0) {
section = 0;
} else if (strncmp (param, "/*", 2) == 0) {
char c0 = 0, c1 = 0;
while (c0 != '*' || c1 != '/') {
c0 = c1;
c1 = fgetc(f);
if (feof(f)) {
fprintf (stderr, "%s: ERROR: Comment reached EOF.\n", local ? filename : ctmp);
exit (1);
}
}
} else {
int i, found = -1;
for (i = 0; i < sizeof(config_params)/sizeof(struct config_params); i++)
if (config_params[i].section == section && strcmp (config_params[i].name, param) == 0) {
found = i;
break;
}
if (found < 0) {
char tmp[200];
sprintf (tmp, "Invalid parameter: %s; ignoring.\n", param);
WARNING(tmp);
while (fgetc(f) != '\n' || feof(f));
continue;
}
 
/* Parse parameter value */
{
if (config_params[found].type[0])
if(fscanf_ex (f, config_params[found].type, config_params[found].addr, 0))
exit (1);
}
if (config_params[found].func)
config_params[found].func();
}
}
fclose (f);
runtime.sim.script_file_specified = 1;
} else
if (config.sim.verbose)
fprintf (stderr, "WARNING: Cannot read script file from '%s',\nneither '%s'.\n", filename, ctmp);
}
 
/* Utility for execution of set sim command. */
static int set_config (char *s)
{
char *sec, *item, *params;
int noparams = 0, i, noitem = 0;
while (*s && isblank (*s)) s++;
sec = s;
printf ("s:%s\n", s);
while (*s && *s != ' ') s++;
if (!(*s)) noitem = 1;
*s = 0;
printf ("sec:%s\n", sec);
section = 0;
for (i = 1; i < sizeof(sections) / sizeof(struct section); i++)
if (strcmp (sections[i].name, sec) == 0) {
section = i;
break;
}
 
if (!section) return 1;
if (noitem) return 2;
item = ++s;
 
while (*s && *s != ' ') s++;
if (!(*s)) {
noparams = 1;
params = "";
} else
params = s + 1;
*s = 0;
printf ("item:%s\n", item);
printf ("params:%s\n", params);
{
int i, found = -1;
for (i = 0; i < sizeof(config_params)/sizeof(struct config_params); i++)
if (config_params[i].section == section && strcmp (config_params[i].name, item) == 0) {
found = i;
break;
}
if (found < 0) return 2;
/* Parse parameter value */
if (config_params[found].type[0])
if(fscanf_ex (0, config_params[found].type, config_params[found].addr, params))
return 3;
if (config_params[found].func)
config_params[found].func();
}
return 0;
}
 
/* Executes set sim command, displays error. */
void set_config_command(char *s)
{
int i;
switch (set_config (s)) {
case 1:
printf ("Invalid or missing section name. One of valid sections must be specified:\n");
for (i = 1; i < sizeof(sections) / sizeof(struct section); i++)
printf ("%s ", sections[i].name);
printf ("\n");
break;
case 2:
printf ("Invalid or missing item name. One of valid items must be specified:\n");
for (i = 0; i < sizeof(config_params)/sizeof(struct config_params); i++)
if (config_params[i].section == section)
printf ("%s ", config_params[i].name);
printf ("\n");
break;
case 3:
printf ("Invalid parameters specified.\n");
break;
}
}

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