URL
https://opencores.org/ocsvn/bluespec-h264/bluespec-h264/trunk
Subversion Repositories bluespec-h264
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- from Rev 47 to Rev 48
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Rev 47 → Rev 48
/trunk/src_verilog/top.v
0,0 → 1,19
module top; |
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reg clk = 0; |
reg reset = 0; |
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always #5 clk <= ~clk; // this corresponds to 10ns duty cycle? |
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mkTH th( .CLK(clk), .RST_N(reset) ); |
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initial |
begin |
// This turns on VCD (plus) output |
$vcdpluson(0); |
clk <= 0; |
#600000; |
$finish; |
end |
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endmodule |