URL
https://opencores.org/ocsvn/can/can/trunk
Subversion Repositories can
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 53 to Rev 54
- ↔ Reverse comparison
Rev 53 → Rev 54
/tags/branch-release-1-0/syn/libero/pinedit.gcf
0,0 → 1,5
set_io "H5" "clkout_o"; |
set_io "M2" "tx_o"; |
set_io "J1" "wb_rst_i"; |
set_io "M3" "rx_i"; |
set_io "H1" "clk_i"; |
/tags/branch-release-1-0/syn/synplicity/can.prj
0,0 → 1,61
#-- Synplicity, Inc. |
#-- Version 7.2 |
#-- Project file /projects/zoidberg/igorm/can/syn/synplicity/can.prj |
#-- Written on Sat Mar 1 21:07:14 2003 |
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#add_file options |
add_file -verilog "$LIB/proasic/proasicplus.v" |
add_file -verilog "../../../memory/actel/ram_64x8_sync/actel_ram_64x8_sync.v" |
add_file -verilog "../../../memory/actel/ram_64x4_sync/actel_ram_64x4_sync.v" |
add_file -verilog "../../../memory/actel/ram_64x1_sync/actel_ram_64x1_sync.v" |
add_file -verilog "../../rtl/verilog/can_registers.v" |
add_file -verilog "../../rtl/verilog/can_bsp.v" |
add_file -verilog "../../rtl/verilog/can_btl.v" |
add_file -verilog "../../rtl/verilog/can_defines.v" |
add_file -verilog "../../rtl/verilog/can_register.v" |
add_file -verilog "../../rtl/verilog/can_register_asyn.v" |
add_file -verilog "../../rtl/verilog/can_register_asyn_syn.v" |
add_file -verilog "../../rtl/verilog/can_register_syn.v" |
add_file -verilog "../../rtl/verilog/can_top.v" |
add_file -verilog "../../rtl/verilog/can_fifo.v" |
add_file -verilog "../../rtl/verilog/can_acf.v" |
add_file -verilog "../../rtl/verilog/can_crc.v" |
add_file -verilog "../../rtl/verilog/can_ibo.v" |
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#implementation: "rev_1" |
impl -add rev_1 |
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#device options |
set_option -technology PA |
set_option -part APA150 |
set_option -speed_grade Std |
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#compilation/mapping options |
set_option -default_enum_encoding default |
set_option -symbolic_fsm_compiler 1 |
set_option -resource_sharing 1 |
set_option -top_module "can_top" |
|
#map options |
set_option -frequency 50.000 |
set_option -fanout_limit 12 |
set_option -maxfan_hard 0 |
set_option -disable_io_insertion 0 |
set_option -report_path 4000 |
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#simulation options |
set_option -write_verilog 0 |
set_option -write_vhdl 0 |
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#automatic place and route (vendor) options |
set_option -write_apr_constraint 1 |
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#set result format/file last |
project -result_file "rev_1/can_top.edn" |
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#implementation attributes |
set_option -compiler_compatible 0 |
set_option -include_path "../../rtl/verilog/;../../bench/verilog/" |
impl -active "rev_1" |
tags/branch-release-1-0/syn/synplicity/can.prj
Property changes :
Added: svn:executable
## -0,0 +1 ##
+*
\ No newline at end of property
Index: tags/branch-release-1-0/syn/synplicity/rev_1/dir_keeper
===================================================================
Cannot display: file marked as a binary type.
svn:mime-type = application/octet-stream
Index: tags/branch-release-1-0/syn/synplicity/rev_1/dir_keeper
===================================================================
--- tags/branch-release-1-0/syn/synplicity/rev_1/dir_keeper (nonexistent)
+++ tags/branch-release-1-0/syn/synplicity/rev_1/dir_keeper (revision 54)
tags/branch-release-1-0/syn/synplicity/rev_1/dir_keeper
Property changes :
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property