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URL https://opencores.org/ocsvn/or1k/or1k/trunk

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  • This comparison shows the changes necessary to convert path 
    /
    from Rev 537 to Rev 538
    ↔ Reverse comparison
  •

Rev 537 → Rev 538

/trunk/or1ksim/cpu/or32/execute.c
266,13 → 266,8
unsigned long eval_operand32 (int op_no, int *breakpoint)
{
debug (9, "%i %08X\n", op_no, op[op_no + MAX_OPERANDS]);
if (op[op_no + MAX_OPERANDS] & OPTYPE_DIS) {
if (op[op_no] & 0x03) {
except_handle (EXCEPT_ALIGN, op[op_no]);
return 0;
}
if (op[op_no + MAX_OPERANDS] & OPTYPE_DIS)
return eval_mem32 (op[op_no], breakpoint);
}
else if (op[op_no + MAX_OPERANDS] & OPTYPE_REG)
return eval_reg (op[op_no]);
else
287,7 → 282,6
debug (9, "%i %08X\n", op_no, op[op_no + MAX_OPERANDS]);
if (op[op_no + MAX_OPERANDS] & OPTYPE_DIS) {
if (op[op_no] & 0x01) {
except_handle (EXCEPT_ALIGN, op[op_no]);
return 0;
}
return eval_mem16 (op[op_no], breakpoint);
429,13 → 423,8
 
instructions++;
/* Added by CZ...catch alignment exception here */
if(pc_phy & 0x03)
{
except_handle(EXCEPT_ALIGN, 0);
return 0; /* We will fetch exception wrapper at new location. */
}
pc_phy &= ~0x03;
#if 0
if(pc_phy > MEMORY_START + MEMORY_LEN)
pc_phy %= MEMORY_START + MEMORY_LEN;
/trunk/or1ksim/cpu/dlx/Makefile.in
89,7 → 89,6
CC = @CC@
CFLAGS = @CFLAGS@
CPU_ARCH = @CPU_ARCH@
FPM = @FPM@
INCLUDES = @INCLUDES@
LOCAL_CFLAGS = @LOCAL_CFLAGS@
LOCAL_DEFS = @LOCAL_DEFS@
/trunk/or1ksim/cpu/common/abstract.c
45,7 → 45,7
 
/* This is an abstract+physical memory array rather than only physical
memory array */
static struct mem_entry *simmem;
static unsigned long *simmem32;
 
/* Pointer to memory area descriptions that are assigned to individual
peripheral devices. */
259,6 → 259,12
memaddr = simulate_dc_mmu_load(memaddr);
if (pending.valid)
return 0;
 
if (memaddr & 3) {
except_handle (EXCEPT_ALIGN, memaddr);
return 0;
}
if (DEBUG_ENABLED)
*breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr); /* 28/05/01 CZ */
temp = evalsim_mem32(memaddr);
290,6 → 296,10
 
if (verify_memoryarea(memaddr)) {
switch(cur_area->granularity) {
case 4:
temp = cur_area->readfunc(memaddr);
mem_cycles += cur_area->delayr;
break;
case 1:
temp = cur_area->readfunc(memaddr) << 24;
temp |= cur_area->readfunc(memaddr + 1) << 16;
302,10 → 312,6
temp |= cur_area->readfunc(memaddr + 2);
mem_cycles += cur_area->delayr * 2;
break;
case 4:
temp = cur_area->readfunc(memaddr);
mem_cycles += cur_area->delayr;
break;
}
if (cur_area->log)
fprintf (cur_area->log, "[%08x] -> read %08x\n", memaddr, temp);
326,6 → 332,12
memaddr = simulate_dc_mmu_load(memaddr);
if (pending.valid)
return 0;
if (memaddr & 1) {
except_handle (EXCEPT_ALIGN, memaddr);
return 0;
}
if (DEBUG_ENABLED)
*breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr); /* 28/05/01 CZ */
 
337,7 → 349,7
 
unsigned short evalsim_mem16(unsigned long memaddr)
{
unsigned short temp;
unsigned long temp;
 
if (verify_memoryarea(memaddr)) {
switch(cur_area->granularity) {
351,8 → 363,11
mem_cycles += cur_area->delayr;
break;
case 4:
printf("EXCEPTION: read 16-bit value from 32-bit region (address 0x%08lX)\n", cur_area->granularity * 8, memaddr);
cont_run = 0;
temp = evalsim_mem32 (memaddr & ~3ul);
if (memaddr & 2)
temp &= 0xffff;
else
temp >>= 16;
break;
}
if (cur_area->log)
370,7 → 385,7
 
unsigned char eval_mem8(unsigned long memaddr,int* breakpoint)
{
unsigned char temp;
unsigned long temp;
cur_vadd = memaddr;
memaddr = simulate_dc_mmu_load(memaddr);
if (pending.valid)
386,7 → 401,7
 
unsigned char evalsim_mem8(unsigned long memaddr)
{
unsigned char temp;
unsigned long temp;
 
if (verify_memoryarea(memaddr)) {
switch(cur_area->granularity) {
395,9 → 410,16
mem_cycles += cur_area->delayr;
break;
case 2:
temp = evalsim_mem16 (memaddr & ~1ul);
if (memaddr & 1)
temp &= 0xff;
else
temp >>= 8;
break;
case 4:
printf("EXCEPTION: read 8-bit value from %u-bit region (address 0x%08lX)\n", cur_area->granularity * 8, memaddr);
cont_run = 0;
temp = evalsim_mem32 (memaddr & ~3ul);
temp >>= 8 * (3 - (memaddr & 3));
temp &= 0xff;
break;
}
if (cur_area->log)
421,6 → 443,11
if (pending.valid == 1)
return;
 
if (memaddr & 3) {
except_handle (EXCEPT_ALIGN, memaddr);
return;
}
 
if (DEBUG_ENABLED) {
*breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr); /* 28/05/01 CZ */
*breakpoint += CheckDebugUnit(DebugStoreData,value);
437,6 → 464,10
if (cur_area->log)
fprintf (cur_area->log, "[%08x] -> write %08x\n", memaddr, value);
switch(cur_area->granularity) {
case 4:
cur_area->writefunc(memaddr, value);
mem_cycles += cur_area->delayw;
break;
case 1:
cur_area->writefunc(memaddr , (value >> 24) & 0xFF);
cur_area->writefunc(memaddr + 1, (value >> 16) & 0xFF);
449,10 → 480,6
cur_area->writefunc(memaddr + 2, value & 0xFFFF);
mem_cycles += cur_area->delayw * 2;
break;
case 4:
cur_area->writefunc(memaddr, value);
mem_cycles += cur_area->delayw;
break;
}
} else {
printf("EXCEPTION: write out of memory (32-bit access to %.8lx)\n", memaddr);
470,6 → 497,11
/* If we produced exception don't set anything */
if (pending.valid == 1)
return;
if (memaddr & 1) {
except_handle (EXCEPT_ALIGN, memaddr);
return;
}
 
if (DEBUG_ENABLED) {
*breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr); /* 28/05/01 CZ */
481,6 → 513,7
 
void setsim_mem16(unsigned long memaddr, unsigned short value)
{
unsigned long temp;
if (verify_memoryarea(memaddr)) {
if (cur_area->log)
fprintf (cur_area->log, "[%08x] -> write %08x\n", memaddr, value);
495,8 → 528,10
mem_cycles += cur_area->delayw;
break;
case 4:
printf("EXCEPTION: write 16-bit value to 32-bit region (address 0x%08lX)\n", memaddr);
cont_run = 0;
temp = evalsim_mem32 (memaddr & ~3ul);
temp &= 0xffff << ((memaddr & 2) ? 0 : 16);
temp |= (unsigned long)(value & 0xffff) << ((memaddr & 2) ? 16 : 0);
setsim_mem32 (memaddr & ~3ul, temp);
break;
}
} else {
526,15 → 561,30
 
void setsim_mem8(unsigned long memaddr, unsigned char value)
{
unsigned long temp;
if (verify_memoryarea(memaddr)) {
if (cur_area->log)
fprintf (cur_area->log, "[%08x] -> write %08x\n", memaddr, value);
if (cur_area->granularity == 1) {
switch (cur_area->granularity) {
case 1:
cur_area->writefunc(memaddr, value);
mem_cycles += cur_area->delayw;
} else {
printf("EXCEPTION: write 8-bit value to %u-bit region (address 0x%08lX)\n", cur_area->granularity * 8, memaddr);
cont_run = 0;
break;
case 2:
temp = evalsim_mem16 (memaddr & ~1ul);
temp &= 0xff << ((memaddr & 1) ? 0 : 8);
temp |= (unsigned short)(value & 0xff) << ((memaddr & 1) ? 8 : 0);
setsim_mem16 (memaddr & ~1ul, temp);
break;
case 4:
temp = evalsim_mem32 (memaddr & ~3ul);
printf ("%08x\n", temp);
temp &= ~(0xff << (8 * (3 - (memaddr & 3))));
printf ("%08x\n", temp);
temp |= (unsigned long)(value & 0xff) << (8 * (3 - (memaddr & 3)));
printf ("%08x\n", temp);
setsim_mem32 (memaddr & ~3ul, temp);
break;
}
} else {
printf("EXCEPTION: write out of memory (8-bit access to %.8lx)\n", memaddr);
591,12 → 641,12
}
}
 
unsigned long simmem_read_byte(unsigned long addr) {
return simmem[cur_area->misc + (addr & cur_area->size_mask)].data;
unsigned long simmem_read_word(unsigned long addr) {
return simmem32[(cur_area->misc + (addr & cur_area->size_mask)) >> 2];
}
 
void simmem_write_byte(unsigned long addr, unsigned long value) {
simmem[cur_area->misc + (addr & cur_area->size_mask)].data = (unsigned char)value;
void simmem_write_word(unsigned long addr, unsigned long value) {
simmem32[(cur_area->misc + (addr & cur_area->size_mask)) >> 2] = value;
}
 
unsigned long simmem_read_zero(unsigned long addr) {
629,7 → 679,7
if (config.sim.verbose)
debug (1, "%08X %08X (%i KB): %s (activated by CE%i; read delay = %icyc, write delay = %icyc)\n",
start, length, length >> 10, type, ce, rd, wd);
register_memoryarea(start, length, 1, &simmem_read_byte, &simmem_write_byte);
register_memoryarea(start, length, 4, &simmem_read_word, &simmem_write_word);
cur_area->misc = memory_needed;
cur_area->delayw = wd;
cur_area->delayr = rd;
644,12 → 694,12
} else {
if (config.sim.verbose)
fprintf (stderr, "WARNING: Memory not defined, assuming standard configuration.\n");
register_memoryarea(DEFAULT_MEMORY_START, DEFAULT_MEMORY_LEN, 1, &simmem_read_byte, &simmem_write_byte);
register_memoryarea(DEFAULT_MEMORY_START, DEFAULT_MEMORY_LEN, 4, &simmem_read_word, &simmem_write_word);
memory_needed += cur_area->size;
}
 
simmem = (struct mem_entry *) malloc (sizeof (struct mem_entry) * memory_needed);
if (!simmem) {
simmem32 = (unsigned long *) malloc (sizeof (unsigned long) * ((memory_needed + 3) / 4));
if (!simmem32) {
fprintf (stderr, "Failed to allocate sim memory. Aborting\n");
exit (-1);
}
663,9 → 713,9
 
/* Check list of registered devices. */
for(ptmp = dev_list; ptmp; ptmp = ptmp->next) {
if (ptmp->delayr < 0 && ptmp->readfunc == &simmem_read_byte)
if (ptmp->delayr < 0 && ptmp->readfunc == &simmem_read_word)
ptmp->readfunc = &simmem_read_zero;
if (ptmp->delayw < 0 && ptmp->writefunc == &simmem_write_byte)
if (ptmp->delayw < 0 && ptmp->writefunc == &simmem_write_word)
ptmp->writefunc = &simmem_write_null;
}
}
/trunk/or1ksim/cpu/common/abstract.h
35,12 → 35,6
#define CT_VIRTUAL 1
#define CT_PHYSICAL 2
 
/* This is an abstract memory type rather than physical memory type. It holds
disassembled instructions. */
struct mem_entry {
unsigned char data;
};
 
enum insn_type { it_unknown, it_exception, it_arith, it_shift, it_compare, it_branch,
it_jump, it_load, it_store, it_movimm, it_move, it_extend, it_nop, it_mac };
 
/trunk/or1ksim/testbench/Makefile.in
93,7 → 93,7
VERSION = @VERSION@
 
OR1K_TESTS = basic cache cfg dmatest eth mmu except_test pic
IND_TESTS = exit cbasic local_global mul mycompress dhry functest
IND_TESTS = exit cbasic local_global mul mycompress dhry functest mem_test
ACV_TESTS = acv_uart acv_gpio
MC_TESTS = mc_dram mc_ssram mc_async mc_sync
# Subdirectory tests
121,6 → 121,8
mycompress_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
functest_SOURCES = $(OR1K_SUPPORT_S) support.h functest.c
functest_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
mem_test_SOURCES = $(OR1K_SUPPORT_S) support.h mem_test.c
mem_test_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld
###############################################
 
######### MC Tests ############################
212,6 → 214,10
@OR1K_EXCEPT_FALSE@functest_OBJECTS = functest.o
functest_LDADD = $(LDADD)
functest_DEPENDENCIES = support/libsupport.a
@OR1K_EXCEPT_TRUE@mem_test_OBJECTS = except.o mem_test.o
@OR1K_EXCEPT_FALSE@mem_test_OBJECTS = mem_test.o
mem_test_LDADD = $(LDADD)
mem_test_DEPENDENCIES = support/libsupport.a
@OR1K_EXCEPT_TRUE@basic_OBJECTS = basic.o
@OR1K_EXCEPT_FALSE@basic_OBJECTS =
@OR1K_EXCEPT_TRUE@basic_DEPENDENCIES =
279,10 → 285,10
.deps/eth.P .deps/except.P .deps/except_mc.P .deps/except_test.P \
.deps/except_test_s.P .deps/exit.P .deps/functest.P \
.deps/local_global.P .deps/mc_async.P .deps/mc_common.P .deps/mc_dram.P \
.deps/mc_ssram.P .deps/mc_sync.P .deps/mmu.P .deps/mmu_asm.P \
.deps/mul.P .deps/mycompress.P .deps/pic.P
SOURCES = $(exit_SOURCES) $(cbasic_SOURCES) $(local_global_SOURCES) $(mul_SOURCES) $(mycompress_SOURCES) $(dhry_SOURCES) $(functest_SOURCES) $(basic_SOURCES) $(cache_SOURCES) $(cfg_SOURCES) $(dmatest_SOURCES) $(eth_SOURCES) $(mmu_SOURCES) $(except_test_SOURCES) $(pic_SOURCES) $(acv_uart_SOURCES) $(acv_gpio_SOURCES) $(mc_dram_SOURCES) $(mc_ssram_SOURCES) $(mc_async_SOURCES) $(mc_sync_SOURCES)
OBJECTS = $(exit_OBJECTS) $(cbasic_OBJECTS) $(local_global_OBJECTS) $(mul_OBJECTS) $(mycompress_OBJECTS) $(dhry_OBJECTS) $(functest_OBJECTS) $(basic_OBJECTS) $(cache_OBJECTS) $(cfg_OBJECTS) $(dmatest_OBJECTS) $(eth_OBJECTS) $(mmu_OBJECTS) $(except_test_OBJECTS) $(pic_OBJECTS) $(acv_uart_OBJECTS) $(acv_gpio_OBJECTS) $(mc_dram_OBJECTS) $(mc_ssram_OBJECTS) $(mc_async_OBJECTS) $(mc_sync_OBJECTS)
.deps/mc_ssram.P .deps/mc_sync.P .deps/mem_test.P .deps/mmu.P \
.deps/mmu_asm.P .deps/mul.P .deps/mycompress.P .deps/pic.P
SOURCES = $(exit_SOURCES) $(cbasic_SOURCES) $(local_global_SOURCES) $(mul_SOURCES) $(mycompress_SOURCES) $(dhry_SOURCES) $(functest_SOURCES) $(mem_test_SOURCES) $(basic_SOURCES) $(cache_SOURCES) $(cfg_SOURCES) $(dmatest_SOURCES) $(eth_SOURCES) $(mmu_SOURCES) $(except_test_SOURCES) $(pic_SOURCES) $(acv_uart_SOURCES) $(acv_gpio_SOURCES) $(mc_dram_SOURCES) $(mc_ssram_SOURCES) $(mc_async_SOURCES) $(mc_sync_SOURCES)
OBJECTS = $(exit_OBJECTS) $(cbasic_OBJECTS) $(local_global_OBJECTS) $(mul_OBJECTS) $(mycompress_OBJECTS) $(dhry_OBJECTS) $(functest_OBJECTS) $(mem_test_OBJECTS) $(basic_OBJECTS) $(cache_OBJECTS) $(cfg_OBJECTS) $(dmatest_OBJECTS) $(eth_OBJECTS) $(mmu_OBJECTS) $(except_test_OBJECTS) $(pic_OBJECTS) $(acv_uart_OBJECTS) $(acv_gpio_OBJECTS) $(mc_dram_OBJECTS) $(mc_ssram_OBJECTS) $(mc_async_OBJECTS) $(mc_sync_OBJECTS)
 
all: all-redirect
.SUFFIXES:
371,6 → 377,10
@rm -f functest
$(LINK) $(functest_LDFLAGS) $(functest_OBJECTS) $(functest_LDADD) $(LIBS)
 
mem_test: $(mem_test_OBJECTS) $(mem_test_DEPENDENCIES)
@rm -f mem_test
$(LINK) $(mem_test_LDFLAGS) $(mem_test_OBJECTS) $(mem_test_LDADD) $(LIBS)
 
basic: $(basic_OBJECTS) $(basic_DEPENDENCIES)
@rm -f basic
$(LINK) $(basic_LDFLAGS) $(basic_OBJECTS) $(basic_LDADD) $(LIBS)
/trunk/or1ksim/testbench/mem_test.c
0,0 → 1,72
/* Simple test, which tests whether memory accesses are performed correctly.
WARNING: Requires big endian host!!! */
 
#include "support.h"
 
unsigned long _ul, *pul;
unsigned short *pus;
unsigned char *puc;
 
int main ()
{
unsigned long cnt = 0;
_ul = 0x12345678;
pul = &_ul;
report (*pul);
cnt = (cnt + *pul) << 1;
 
pus = (unsigned short *)&_ul;
report (*pus);
cnt = (cnt + *pus) << 1;
pus++;
report (*pus);
cnt = (cnt + *pus) << 1;
puc = (unsigned char *)&_ul;
report (*puc);
cnt = (cnt + *puc) << 1;
puc++;
report (*puc);
cnt = (cnt + *puc) << 1;
puc++;
report (*puc);
cnt = (cnt + *puc) << 1;
puc++;
report (*puc);
cnt = (cnt + *puc) << 1;
*pul = 0xdeaddead;
report (*pul);
cnt = (cnt + *pul) << 1;
pus = (unsigned short *)&_ul;
*pus = 0x5678;
report (*pul);
cnt = (cnt + *pul) << 1;
pus++;
*pus = 0x1234;
report (*pul);
cnt = (cnt + *pul) << 1;
puc = (unsigned char *)&_ul;
*puc = 0xdd;
report (*pul);
cnt = (cnt + *pul) << 1;
puc++;
*puc = 0xcc;
report (*pul);
cnt = (cnt + *pul) << 1;
puc++;
*puc = 0xbb;
report (*pul);
cnt = (cnt + *pul) << 1;
puc++;
*puc = 0xaa;
report (*pul);
cnt = (cnt + *pul) << 1;
report (cnt);
cnt ^= 0xdeaddead ^ 0x5a92c7f4;
report(cnt);
return (cnt != 0xdeaddead);
}
trunk/or1ksim/testbench/mem_test.c Property changes : Added: svn:executable ## -0,0 +1 ## +* \ No newline at end of property Index: trunk/or1ksim/testbench/Makefile.am =================================================================== --- trunk/or1ksim/testbench/Makefile.am (revision 537) +++ trunk/or1ksim/testbench/Makefile.am (revision 538) @@ -22,7 +22,7 @@ ################### Tests ##################### # tests in this directory OR1K_TESTS = basic cache cfg dmatest eth mmu except_test pic -IND_TESTS = exit cbasic local_global mul mycompress dhry functest +IND_TESTS = exit cbasic local_global mul mycompress dhry functest mem_test ACV_TESTS = acv_uart acv_gpio MC_TESTS = mc_dram mc_ssram mc_async mc_sync # Subdirectory tests @@ -50,6 +50,8 @@ mycompress_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld functest_SOURCES = $(OR1K_SUPPORT_S) support.h functest.c functest_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld +mem_test_SOURCES = $(OR1K_SUPPORT_S) support.h mem_test.c +mem_test_LDFLAGS = -T$(OR1K_SRCDIR)/default.ld ############################################### ######### MC Tests ############################
/trunk/or1ksim/testbench/support/support.c
93,8 → 93,7
#else
void report(unsigned long value)
{
unsigned long spr = 0x1234;
printf("l.mtspr 0x%x, 0x%x\n", (unsigned) spr, (unsigned) value);
printf("report(0x%x);\n", (unsigned) value);
}
 
/* start_TIMER */
/trunk/or1ksim/toplevel.c
51,7 → 51,7
#include "coff.h"
 
/* CVS revision number. */
const char rcsrev[] = "$Revision: 1.59 $";
const char rcsrev[] = "$Revision: 1.60 $";
 
/* Continuos run versus single step tracing switch. */
int cont_run;
258,7 → 258,7
printf ("VAPI started, waiting for clients.\n");
}
lock_memory_table ();
 
sim_reset ();
/* Wait till all test are connected. */

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