URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Subversion Repositories or1k
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 542 to Rev 543
- ↔ Reverse comparison
Rev 542 → Rev 543
/trunk/or1ksim/cpu/common/abstract.c
228,7 → 228,7
|
/* Check list of registered devices. */ |
for(ptmp = dev_list; ptmp; ptmp = ptmp->next) |
if ((addr & ptmp->addr_mask) == ptmp->addr_compare) |
if (ptmp->valid && ((addr & ptmp->addr_mask) == (ptmp->addr_compare & ptmp->addr_mask))) |
return cur_area = ptmp; |
return cur_area = NULL; |
} |
679,6 → 679,7
register_memoryarea(start, length, 4, &simmem_read_word, &simmem_write_word); |
cur_area->misc = memory_needed; |
cur_area->chip_select = ce; |
cur_area->valid = 1; |
cur_area->delayw = wd; |
cur_area->delayr = rd; |
if (config.memory.table[i].log[0] != '\0') { |
715,6 → 716,13
ptmp->readfunc = &simmem_read_zero; |
if (ptmp->delayw < 0 && ptmp->writefunc == &simmem_write_word) |
ptmp->writefunc = &simmem_write_null; |
|
/* If this mem area is not for memory chip under MC control |
then this area is valid all the time */ |
if (ptmp->readfunc != &simmem_read_word) { |
ptmp->valid = 1; |
ptmp->chip_select = -1; |
} |
} |
} |
|
/trunk/or1ksim/cpu/common/abstract.h
61,6 → 61,7
int delayw; /* Write delay */ |
|
int chip_select; /* Needed by memory controller; specifies chip select number for this memory area. */ |
int valid; /* This bit reflect the memory controler valid bit */ |
FILE *log; /* log file if this device is to be logged, NULL otherwise */ |
|
unsigned long (*readfunc)(unsigned long); |
/trunk/or1ksim/peripheral/mc.c
41,9 → 41,9
|
while (mem_dev) { |
if (mem_dev->chip_select == cs) { |
printf("CS0 addr_mask = %.8lx addr_compare = %.8lx\n", mem_dev->addr_mask, mem_dev->addr_compare); |
mem_dev->addr_mask = mc.ba_mask << 21; |
mem_dev->addr_mask = 0xe0000000 | mc.ba_mask << 21; |
mem_dev->addr_compare = ((csc >> MC_CSC_SEL_OFFSET) & 0xff) << 21; |
mem_dev->valid = (csc >> MC_CSC_EN_OFFSET) & 0x01; |
|
if ((csc >> MC_CSC_MEMTYPE_OFFSET) && 0x07 == MC_CSC_MEMTYPE_ASYNC) { |
mem_dev->delayr = (tms & 0xff) + ((tms >> 8) & 0x0f); |
58,7 → 58,7
mem_dev->delayr = 2; |
mem_dev->delayw = 2; |
} |
break; |
return; |
} |
mem_dev = mem_dev->next; |
} |
82,6 → 82,8
break; |
case MC_BA_MASK: |
mc.ba_mask = value & MC_BA_MASK_VALID; |
for (chipsel = 0; chipsel < N_CE; chipsel++) |
set_csc_tms (chipsel, mc.csc[chipsel], mc.tms[chipsel]); |
break; |
default: |
if (addr >= MC_CSC(0) && addr <= MC_TMS(N_CE - 1)) { |
135,6 → 137,8
/* Read POC register and init memory controler regs. */ |
void mc_reset() |
{ |
struct dev_memarea *mem_dev = dev_list; |
|
if (config.mc.enabled) { |
printf("Resetting memory controller.\n"); |
memset(&mc, 0, sizeof(struct mc)); |
154,6 → 158,11
mc.tms[0] = MC_TMS_SYNC_VALID; |
} |
|
while (mem_dev) { |
mem_dev->valid = 0; |
mem_dev = mem_dev->next; |
} |
|
set_csc_tms (0, mc.csc[0], mc.tms[0]); |
|
register_memoryarea(config.mc.baseaddr, MC_ADDR_SPACE, 4, mc_read_word, mc_write_word); |
/trunk/or1ksim/toplevel.c
51,7 → 51,7
#include "coff.h" |
|
/* CVS revision number. */ |
const char rcsrev[] = "$Revision: 1.61 $"; |
const char rcsrev[] = "$Revision: 1.62 $"; |
|
/* Continuos run versus single step tracing switch. */ |
int cont_run; |
257,10 → 257,11
if (config.sim.verbose) |
printf ("VAPI started, waiting for clients.\n"); |
} |
lock_memory_table (); |
|
sim_reset (); |
|
lock_memory_table (); |
|
/* Wait till all test are connected. */ |
if (config.vapi.enabled) { |
int numu = vapi_num_unconnected (0); |