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URL https://opencores.org/ocsvn/zpu/zpu/trunk

Subversion Repositories zpu

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  • This comparison shows the changes necessary to convert path 
    /
    from Rev 57 to Rev 58
    ↔ Reverse comparison
  •

Rev 57 → Rev 58

/trunk/zpu/docs/zpu_arch.html
136,7 → 136,6
Pop value off stack and store it in the SP+xxxxx*4 memory location, where xxxxx is a positive integer.
</td>
<td>
Fix!
</td>
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150,7 → 149,7
Push value of memory location SP+xxxxx*4, where xxxxx is a positive integer, onto stack.
</td>
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Fix!
</td>
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164,7 → 163,7
Add value of memory location SP+xxxx*4 to value on top of stack.
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Fix!
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175,10 → 174,16
001x xxxx
</td>
<td>
Push PC to stack and set PC to 0x0+xxxxx*32. This is used to emulate opcodes. See zpupgk.vhd for list of emulate opcode values used. zpu_core.vhd contains reference implementations of these instructions rather than letting the ZPU execute the EMULATE instruction
Push PC to stack and set PC to 0x0+xxxxx*32. This is used to emulate opcodes. See
zpupgk.vhd for list of emulate opcode values used. zpu_core.vhd contains
reference implementations of these instructions rather than letting the ZPU execute the EMULATE instruction
<p>
One way to improve performance of the ZPU is to implement some of
the EMULATE instructions.
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Fix!
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192,7 → 197,7
Pushes program counter onto the stack.
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Fix!
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206,7 → 211,7
Pops address off stack and sets PC
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Fix!
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218,25 → 223,14
</td>
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Pops address stored on stack and loads the value of that address onto stack.
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Fix!
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<td>
LOAD
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<td>
0000 1000
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<td>
Pops address stored on stack and loads the value of that address onto stack.
<p>
Bit 0 and 1 of address are always 0.
Bit 0 and 1 of address are always treated as 0(i.e. ignored) by
the HDL implementations and C code is guaranteed by the programming
model never to use 32 bit LOAD on non-32 bit aligned addresses(i.e.
if a program does this, then it has a bug).
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Fix!
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249,10 → 243,10
<td>
Pops address, then value from stack and stores the value into the memory location of the address.
<p>
Bit 0 and 1 of address are always 0
Bit 0 and 1 of address are always treated as 0
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<td>
Fix!
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266,7 → 260,7
Pushes stack pointer.
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Fix!
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277,10 → 271,10
0000 1101
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<td>
Used to allocate/deallocate space on stack for variables or when changing threads.
Pops value off top of stack and sets SP to that value. Used to allocate/deallocate space on stack for variables or when changing threads.
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Fix!
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294,7 → 288,7
Pops two values on stack adds them and pushes the result
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Fix!
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308,7 → 302,7
Pops two values off the stack and does a bitwise-and & pushes the result onto the stack
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Fix!
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322,7 → 316,7
Pops two integers, does a bitwise or and pushes result
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Fix!
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337,7 → 331,7
 
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Fix!
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348,10 → 342,12
0000 1010
</td>
<td>
Reverses the bit order of the value on the stack, i.e. abc->cba, 100->001, 110->011, etc.
Reverses the bit order of the value on the stack, i.e. abc->cba, 100->001, 110->011, etc.
<p>
The raison d'etre for this instruction is mainly to emulate other instructions.
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<td>
Fix!
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362,10 → 358,11
0000 1011
</td>
<td>
No operation, clears IDIM flag as side effect
No operation, clears IDIM flag as side effect, i.e. used between two
consequtive IM instructions to push two values onto the stack.
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Fix!
</td>
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<tr>
381,7 → 378,7
pushIntStack(a+b);<br>
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Fix!
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396,7 → 393,7
setPc(popIntStack()+getPc());
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<td>
Fix!
</td>
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412,7 → 409,7
pushIntStack(b-a);<br>
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<td>
Fix!
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426,7 → 423,7
pushIntStack(popIntStack() ^ popIntStack());
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<td>
Fix!
</td>
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437,10 → 434,13
51
</td>
<td>
8 bit load instruction. Really only here for compatibility with
C programming model. Also it has a big impact on DMIPS test.
<p>
pushIntStack(cpuReadByte(popIntStack())&0xff);
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<td>
Fix!
</td>
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451,12 → 451,15
52
</td>
<td>
8 bit store instruction. Really only here for compatibility with
C programming model. Also it has a big impact on DMIPS test.
<p>
addr = popIntStack();<br>
val = popIntStack();<br>
cpuWriteByte(addr, val);
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<td>
Fix!
</td>
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467,10 → 470,15
34
</td>
<td>
16 bit load instruction. Really only here for compatibility with
C programming model.
<p>
pushIntStack(cpuReadWord(popIntStack()));
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Fix!
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481,12 → 489,15
35
</td>
<td>
16 bit store instruction. Really only here for compatibility with
C programming model.
<p>
addr = popIntStack();<br>
val = popIntStack();<br>
cpuWriteWord(addr, val);
</td>
<td>
Fix!
</td>
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503,7 → 514,7
pushIntStack((a < b) ? 1 : 0);<br>
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<td>
Fix!
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520,7 → 531,7
pushIntStack((a <= b) ? 1 : 0);
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<td>
Fix!
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539,7 → 550,7
pushIntStack((a < b) ? 1 : 0);
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<td>
Fix!
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558,7 → 569,7
pushIntStack((a <= b) ? 1 : 0);
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<td>
Fix!
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582,7 → 593,7
}
</td>
<td>
Fix!
</td>
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606,7 → 617,7
}<br>
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<td>
Fix!
</td>
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621,7 → 632,7
pushIntStack(popIntStack() * popIntStack());
</td>
<td>
Fix!
</td>
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642,7 → 653,7
pushIntStack(a / b);<br>
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<td>
Fix!
</td>
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663,7 → 674,7
pushIntStack(a % b); <br>
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<td>
Fix!
</td>
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684,7 → 695,7
pushIntStack(t);<br>
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<td>
Fix!
</td>
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705,7 → 716,7
pushIntStack(t);<br>
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<td>
Fix!
</td>
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726,7 → 737,7
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<td>
Fix!
</td>
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745,7 → 756,7
setPc(address); <br>
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<td>
Fix!
</td>
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762,7 → 773,7
push(pc + 1);<br>
setPc(address+pc); </td>
<td>
Fix!
</td>
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776,7 → 787,7
</td>
<td>
pushIntStack((popIntStack() == popIntStack()) ? 1 : 0); <td>
Fix!
</td>
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788,7 → 799,7
</td>
<td>
pushIntStack((popIntStack() != popIntStack()) ? 1 : 0); <td>
Fix!
</td>
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800,7 → 811,7
</td>
<td>
pushIntStack(-popIntStack());<td>
Fix!
</td>
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