OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

Compare Revisions

  • This comparison shows the changes necessary to convert path 
    /
    from Rev 586 to Rev 587
    ↔ Reverse comparison
  •

Rev 586 → Rev 587

/trunk/or1ksim/debug/debug_unit.c
27,7 → 27,7
limitations at this time.
*/
 
#define DEBUG_JTAG 1
//#define DEBUG_JTAG 0
 
#include <stdlib.h>
#include <stdio.h>
/trunk/or1ksim/cpu/common/abstract.c
269,8 → 269,6
mem_cycles += cur_area->delayr * 2;
break;
}
if (cur_area->log)
fprintf (cur_area->log, "[%08x] -> read %08x\n", memaddr, temp);
} else {
printf("EXCEPTION: read out of memory (32-bit access to %.8lx)\n", memaddr);
except_handle(EXCEPT_BUSERR, cur_vadd);
302,8 → 300,6
temp >>= 16;
break;
}
if (cur_area->log)
fprintf (cur_area->log, "[%08x] -> read %08x\n", memaddr, temp);
} else {
printf("EXCEPTION: read out of memory (16-bit access to %.8lx)\n", memaddr);
except_handle(EXCEPT_BUSERR, cur_vadd);
335,8 → 331,6
temp &= 0xff;
break;
}
if (cur_area->log)
fprintf (cur_area->log, "[%08x] -> read %08x\n", memaddr, temp);
} else {
printf("EXCEPTION: read out of memory (8-bit access to %.8lx)\n", memaddr);
except_handle(EXCEPT_BUSERR, cur_vadd);
355,6 → 349,8
if (config.debug.enabled)
*breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr); /* 28/05/01 CZ */
temp = evalsim_mem32(memaddr);
if (cur_area->log)
fprintf (cur_area->log, "[%08x] -> read %08x\n", memaddr, temp);
if (config.debug.enabled)
*breakpoint += CheckDebugUnit(DebugLoadData,temp); /* MM170901 */
return temp;
383,6 → 379,8
if (config.debug.enabled)
*breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr); /* 28/05/01 CZ */
temp = evalsim_mem32(memaddr);
if (cur_area->log)
fprintf (cur_area->log, "[%08x] -> read %08x\n", memaddr, temp);
if (config.debug.enabled)
*breakpoint += CheckDebugUnit(DebugLoadData,temp); /* MM170901 */
return temp;
402,6 → 400,8
if (config.debug.enabled)
*breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr); /* 28/05/01 CZ */
temp = evalsim_mem32(memaddr);
if (cur_area->log)
fprintf (cur_area->log, "[%08x] -> read %08x\n", memaddr, temp);
if (config.debug.enabled)
*breakpoint += CheckDebugUnit(DebugLoadData,temp); /* MM170901 */
return temp;
430,6 → 430,8
*breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr); /* 28/05/01 CZ */
 
temp = evalsim_mem16(memaddr);
if (cur_area->log)
fprintf (cur_area->log, "[%08x] -> read %08x\n", memaddr, temp);
if (config.debug.enabled)
*breakpoint += CheckDebugUnit(DebugLoadData,temp); /* MM170901 */
return temp;
453,44 → 455,18
*breakpoint += CheckDebugUnit(DebugLoadAddress,memaddr); /* 28/05/01 CZ */
 
temp = evalsim_mem8(memaddr);
if (cur_area->log)
fprintf (cur_area->log, "[%08x] -> read %08x\n", memaddr, temp);
if (config.debug.enabled)
*breakpoint += CheckDebugUnit(DebugLoadData,temp); /* MM170901 */
return temp;
}
 
/* Set mem, 32-bit. Big endian version. */
 
void set_mem32(unsigned long memaddr, unsigned long value,int* breakpoint)
{
if (config.sim.mprofile)
mprofile (memaddr, MPROF_32 | MPROF_WRITE);
 
if (memaddr & 3) {
except_handle (EXCEPT_ALIGN, memaddr);
return;
}
 
cur_vadd = memaddr;
memaddr = simulate_dc_mmu_store(memaddr);
/* If we produced exception don't set anything */
if (pending.valid)
return;
 
if (config.debug.enabled) {
*breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr); /* 28/05/01 CZ */
*breakpoint += CheckDebugUnit(DebugStoreData,value);
}
 
setsim_mem32(memaddr, value);
}
 
void setsim_mem32(unsigned long memaddr, unsigned long value)
{
struct dev_memarea *dev;
 
if (verify_memoryarea(memaddr)) {
if (cur_area->log)
fprintf (cur_area->log, "[%08x] -> write %08x\n", memaddr, value);
switch(cur_area->granularity) {
case 4:
cur_area->writefunc(memaddr, value);
515,38 → 491,10
}
}
 
/* Set mem, 16-bit. Big endian version. */
 
void set_mem16(unsigned long memaddr, unsigned short value,int* breakpoint)
{
if (config.sim.mprofile)
mprofile (memaddr, MPROF_16 | MPROF_WRITE);
if (memaddr & 1) {
except_handle (EXCEPT_ALIGN, memaddr);
return;
}
cur_vadd = memaddr;
memaddr = simulate_dc_mmu_store(memaddr);
/* If we produced exception don't set anything */
if (pending.valid)
return;
 
if (config.debug.enabled) {
*breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr); /* 28/05/01 CZ */
*breakpoint += CheckDebugUnit(DebugStoreData,value);
}
 
setsim_mem16(memaddr, value);
}
 
void setsim_mem16(unsigned long memaddr, unsigned short value)
{
unsigned long temp;
if (verify_memoryarea(memaddr)) {
if (cur_area->log)
fprintf (cur_area->log, "[%08x] -> write %08x\n", memaddr, value);
switch(cur_area->granularity) {
case 1:
cur_area->writefunc(memaddr, (value >> 8) & 0xFF);
570,32 → 518,10
}
}
 
/* Set mem, 8-bit. */
 
void set_mem8(unsigned long memaddr, unsigned char value,int* breakpoint)
{
if (config.sim.mprofile)
mprofile (memaddr, MPROF_8 | MPROF_WRITE);
cur_vadd = memaddr;
memaddr = simulate_dc_mmu_store(memaddr);
/* If we produced exception don't set anything */
if (pending.valid) return;
 
if (config.debug.enabled) {
*breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr); /* 28/05/01 CZ */
*breakpoint += CheckDebugUnit(DebugStoreData,value);
}
 
setsim_mem8(memaddr, value);
}
 
void setsim_mem8(unsigned long memaddr, unsigned char value)
{
unsigned long temp;
if (verify_memoryarea(memaddr)) {
if (cur_area->log)
fprintf (cur_area->log, "[%08x] -> write %08x\n", memaddr, value);
switch (cur_area->granularity) {
case 1:
cur_area->writefunc(memaddr, value);
620,6 → 546,87
}
}
 
/* Set mem, 32-bit. Big endian version. */
 
void set_mem32(unsigned long memaddr, unsigned long value,int* breakpoint)
{
if (config.sim.mprofile)
mprofile (memaddr, MPROF_32 | MPROF_WRITE);
 
if (memaddr & 3) {
except_handle (EXCEPT_ALIGN, memaddr);
return;
}
 
cur_vadd = memaddr;
memaddr = simulate_dc_mmu_store(memaddr);
/* If we produced exception don't set anything */
if (pending.valid)
return;
 
if (config.debug.enabled) {
*breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr); /* 28/05/01 CZ */
*breakpoint += CheckDebugUnit(DebugStoreData,value);
}
 
if (cur_area->log)
fprintf (cur_area->log, "[%08x] -> write %08x\n", memaddr, value);
 
setsim_mem32(memaddr, value);
}
 
/* Set mem, 16-bit. Big endian version. */
 
void set_mem16(unsigned long memaddr, unsigned short value,int* breakpoint)
{
if (config.sim.mprofile)
mprofile (memaddr, MPROF_16 | MPROF_WRITE);
if (memaddr & 1) {
except_handle (EXCEPT_ALIGN, memaddr);
return;
}
cur_vadd = memaddr;
memaddr = simulate_dc_mmu_store(memaddr);
/* If we produced exception don't set anything */
if (pending.valid)
return;
 
if (config.debug.enabled) {
*breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr); /* 28/05/01 CZ */
*breakpoint += CheckDebugUnit(DebugStoreData,value);
}
if (cur_area->log)
fprintf (cur_area->log, "[%08x] -> write %08x\n", memaddr, value);
 
setsim_mem16(memaddr, value);
}
 
/* Set mem, 8-bit. */
 
void set_mem8(unsigned long memaddr, unsigned char value,int* breakpoint)
{
if (config.sim.mprofile)
mprofile (memaddr, MPROF_8 | MPROF_WRITE);
cur_vadd = memaddr;
memaddr = simulate_dc_mmu_store(memaddr);
/* If we produced exception don't set anything */
if (pending.valid) return;
 
if (config.debug.enabled) {
*breakpoint += CheckDebugUnit(DebugStoreAddress,memaddr); /* 28/05/01 CZ */
*breakpoint += CheckDebugUnit(DebugStoreData,value);
}
 
if (cur_area->log)
fprintf (cur_area->log, "[%08x] -> write %08x\n", memaddr, value);
 
setsim_mem8(memaddr, value);
}
 
void dumpmemory(unsigned int from, unsigned int to, int disasm, int nl)
{
unsigned int i, j;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.