URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Subversion Repositories or1k
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 587 to Rev 588
- ↔ Reverse comparison
Rev 587 → Rev 588
/trunk/jtag/jp1.c
32,6 → 32,7
a standard one. */ |
#include <asm/io.h> |
#include <asm/system.h> |
#include "mc.h" |
|
#define GDB_IN "../sim/rtl_sim/run/gdb_in.dat" |
#define GDB_OUT "../sim/rtl_sim/run/gdb_out.dat" |
73,6 → 74,16
#define TMS (0x02) |
#define TDI (0x01) |
#else |
#ifdef XILINX |
#define TCLK_BIT (0x02) /* D1 pin 3 */ |
#define TRST_BIT (0x10) /* Not used */ |
#define TDI_BIT (0x01) /* D0 pin 2 */ |
#define TMS_BIT (0x04) /* D2 pin 4 */ |
#define TDO_BIT (0x10) /* S6 pin 13*/ |
#define TMS (0x02) |
#define TDI (0x01) |
//#define TDO_INV |
#else |
#define TCLK_BIT (0x04) /* D2 pin 4 */ |
#define TRST_BIT (0x08) /* D3 pin 5 */ |
#define TDI_BIT (0x10) /* D4 pin 6 */ |
81,6 → 92,7
#define TMS (0x02) |
#define TDI (0x01) |
#endif |
#endif |
#ifdef RTL_SIM |
# define JTAG_WAIT() usleep(1000) |
# define NUM_RETRIES (16) |
219,7 → 231,11
int data; |
#ifndef RTL_SIM |
data = inb (LPT_READ); |
#ifdef TDO_INV |
data = (data & TDO_BIT) != TDO_BIT; |
#else |
data = (data & TDO_BIT) == TDO_BIT; |
#endif |
#else |
FILE *fin = 0; |
char ch; |
348,6 → 364,9
debug2 ("\nreset("); |
jp1_out (0); |
JTAG_RETRY_WAIT(); |
/* In case we don't have TRST reset it manually */ |
for (i = 0; i < 8; i++) |
jp1_write_JTAG (TMS); |
jp1_out (TRST_BIT); |
JTAG_RETRY_WAIT(); |
jp1_write_JTAG (0); |
611,8 → 630,8
ULONGEST data; |
{ |
/* Set PC */ |
if (current_chain == SC_RISC_DEBUG && regno == 0x10) |
data = data - 4; |
// if (current_chain == SC_RISC_DEBUG && regno == 0x10) |
// data = data - 4; |
|
jtag_write_reg_support (regno, data); |
} |
649,10 → 668,34
unsigned int npc, ppc, r1, insn, result; |
current_chain = -1; |
jp1_reset_JTAG (); |
#if 0 |
#define MC_BASE_ADD 0x60000000 |
#define MC_CSR_VAL 0x04300300 |
#define MC_MASK_VAL 0x000000ff |
#define FLASH_BASE_ADD 0x04000000 |
#define FLASH_TMS_VAL 0x0010a10a |
#define SDRAM_BASE_ADD 0x00000000 |
#define SDRAM_TMS_VAL 0x07248230 |
|
jtag_set_chain (SC_REGISTER); |
jtag_write_reg (4, 0x00000001); |
|
jtag_set_chain (SC_WISHBONE); |
jtag_write_reg (MC_BASE_ADD + MC_CSC(0), (((FLASH_BASE_ADD & 0xffff0000) >> 5) | 0x25)); |
jtag_write_reg (MC_BASE_ADD + MC_TMS(0), FLASH_TMS_VAL); |
|
jtag_write_reg (MC_BASE_ADD + MC_BA_MASK, MC_MASK_VAL); |
jtag_write_reg (MC_BASE_ADD + MC_CSR, MC_CSR_VAL); |
|
jtag_write_reg (MC_BASE_ADD + MC_TMS(1), SDRAM_TMS_VAL); |
jtag_write_reg (MC_BASE_ADD + MC_CSC(1), (((SDRAM_BASE_ADD & 0xffff0000) >> 5) | 0x0411)); |
|
sleep(1); |
#endif |
|
#if 1 |
|
#define RAM_BASE 0x40000000 |
#define RAM_BASE 0x00000000 |
/* Stall risc */ |
jtag_set_chain (SC_REGISTER); |
jtag_write_reg (4, 0x00000001); |
710,7 → 753,8
r1 = jtag_read_reg (0x401); |
r1 = jtag_read_reg (0x401); |
|
printf("npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); |
printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); |
printf("Expected npc = %.8lx ppc = %.8lx r1 = %.8lx\n", 0x4000000c, 0x40000024, 5); |
result = npc + ppc + r1; |
|
|
750,7 → 794,8
jtag_set_chain (SC_WISHBONE); |
jtag_write_reg (RAM_BASE + 0x24, insn); |
|
printf("npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); |
printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); |
printf("Expected npc = %.8lx ppc = %.8lx r1 = %.8lx\n", 0x4000000c, 0x40000024, 8); |
result = npc + ppc + r1 + result; |
|
|
788,7 → 833,8
jtag_set_chain (SC_WISHBONE); |
jtag_write_reg (RAM_BASE + 0x20, insn); |
|
printf("npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); |
printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); |
printf("Expected npc = %.8lx ppc = %.8lx r1 = %.8lx\n", 0x40000024, 0x40000020, 11); |
result = npc + ppc + r1 + result; |
|
|
826,7 → 872,8
jtag_set_chain (SC_WISHBONE); |
jtag_write_reg (RAM_BASE + 0x1c, insn); |
|
printf("npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); |
printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); |
printf("Expected npc = %.8lx ppc = %.8lx r1 = %.8lx\n", 0x40000020, 0x4000001c, 24); |
result = npc + ppc + r1 + result; |
|
|
864,7 → 911,8
jtag_set_chain (SC_WISHBONE); |
jtag_write_reg (RAM_BASE + 0x18, insn); |
|
printf("npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); |
printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); |
printf("Expected npc = %.8lx ppc = %.8lx r1 = %.8lx\n", 0x4000001c, 0x40000018, 49); |
result = npc + ppc + r1 + result; |
|
/* Set trap insn very near previous one */ |
901,7 → 949,8
jtag_set_chain (SC_WISHBONE); |
jtag_write_reg (RAM_BASE + 0x1c, insn); |
|
printf("npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); |
printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); |
printf("Expected npc = %.8lx ppc = %.8lx r1 = %.8lx\n", 0x40000020, 0x4000001c, 50); |
result = npc + ppc + r1 + result; |
|
|
939,11 → 988,75
jtag_set_chain (SC_WISHBONE); |
jtag_write_reg (RAM_BASE + 0x0c, insn); |
|
printf("npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); |
printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); |
printf("Expected npc = %.8lx ppc = %.8lx r1 = %.8lx\n", 0x40000010, 0x4000000c, 99); |
result = npc + ppc + r1 + result; |
|
printf("result = %.8lx\n", result + 0x5eaddc4b); |
|
/* Set step bit */ |
jtag_set_chain (SC_RISC_DEBUG); |
jtag_write_reg ((6 << 11) + 16, 1 << 22); |
|
for (i = 0; i < 5; i++) |
{ |
/* Unstall */ |
jtag_set_chain (SC_REGISTER); |
jtag_write_reg (4, 0x00000000); |
jtag_set_chain (SC_RISC_DEBUG); |
} |
|
/* Read NPC */ |
jtag_set_chain (SC_RISC_DEBUG); |
npc = jtag_read_reg ((0 << 11) + 16); |
npc = jtag_read_reg ((0 << 11) + 16); |
|
/* Read PPC */ |
jtag_set_chain (SC_RISC_DEBUG); |
ppc = jtag_read_reg ((0 << 11) + 18); |
ppc = jtag_read_reg ((0 << 11) + 18); |
|
/* Read R1 */ |
jtag_set_chain (SC_RISC_DEBUG); |
r1 = jtag_read_reg (0x401); |
r1 = jtag_read_reg (0x401); |
|
printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); |
printf("Expected npc = %.8lx ppc = %.8lx r1 = %.8lx\n", 0x40000024, 0x40000020, 101); |
result = npc + ppc + r1 + result; |
|
/* Set PC */ |
jtag_set_chain (SC_RISC_DEBUG); |
jtag_write_reg ((0 << 11) + 16, RAM_BASE + 0x20); |
|
for (i = 0; i < 2; i++) |
{ |
/* Unstall */ |
jtag_set_chain (SC_REGISTER); |
jtag_write_reg (4, 0x00000000); |
jtag_set_chain (SC_RISC_DEBUG); |
} |
|
/* Read NPC */ |
jtag_set_chain (SC_RISC_DEBUG); |
npc = jtag_read_reg ((0 << 11) + 16); |
npc = jtag_read_reg ((0 << 11) + 16); |
|
/* Read PPC */ |
jtag_set_chain (SC_RISC_DEBUG); |
ppc = jtag_read_reg ((0 << 11) + 18); |
ppc = jtag_read_reg ((0 << 11) + 18); |
|
/* Read R1 */ |
jtag_set_chain (SC_RISC_DEBUG); |
r1 = jtag_read_reg (0x401); |
r1 = jtag_read_reg (0x401); |
|
printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1); |
printf("Expected npc = %.8lx ppc = %.8lx r1 = %.8lx\n", 0x4000000c, 0x40000024, 201); |
result = npc + ppc + r1 + result; |
|
printf("result = %.8lx\n", result + 0x5eaddaa9); |
|
#endif |
|
return err; |