OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

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    from Rev 592 to Rev 593
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  •

Rev 592 → Rev 593

/trunk/insight/gdb/remote-or1k.c
33,6 → 33,9
#include "remote-utils.h"
#include "gdb_string.h"
#include "tm.h"
#include "event-loop.h"
#include "event-top.h"
#include "inf-loop.h"
 
#include <signal.h>
#include <sys/types.h>
42,6 → 45,11
 
#define debug if (remote_debug) printf_unfiltered
 
/* Prototypes for local functions */
static void or1k_interrupt PARAMS ((int signo));
static void or1k_interrupt_twice PARAMS ((int signo));
static void interrupt_query PARAMS ((void));
 
/* The following prototype is necessary or the compiler will not
correctly promote the data argument to ULONGEST */
static void or1k_write_reg (unsigned int, ULONGEST);
181,7 → 189,11
/* Old SIGINT handler. */
static void (*ofunc) PARAMS ((int));
 
/* Tokens for use by the asynchronous signal handlers for SIGINT */
PTR sigint_or1k_twice_token;
PTR sigint_or1k_token;
 
 
/* Handle low-level error that we can't recover from. Note that just
error()ing out from target_wait or some such low-level place will cause
all hell to break loose--the rest of GDB will tend to get left in an
560,7 → 572,7
or1k_reset();
or1k_status = TARGET_STOPPED;
 
inferior_pid = 0;
/* obsolete inferior_pid = 0; */
}
 
/* Open a connection to the remote board. */
610,6 → 622,7
or1k_write_spr_reg (DMR1_SPRNUM, dmr1);
dmr1 &= ~DMR1_ST;
or1k_unstall ();
or1k_status = TARGET_STOPPED;
}
 
/* Close a connection to the remote board. */
620,7 → 633,6
{
if (or1k_is_open)
{
or1k_kill ();
if (current_or1k_target != NULL && current_or1k_target->to_done != NULL)
current_or1k_target->to_done ();
current_or1k_target = NULL;
699,9 → 711,10
target_terminal_inferior ();
}
 
static void or1k_interrupt_twice (int signo);
/* Send ^C to target to halt it. Target will respond, and send us a
packet. */
static void (*ofunc) PARAMS ((int));
 
 
/* The command line interface's stop routine. This function is installed
as a signal handler for SIGINT. The first time a user requests a
stop, we call remote_stop to send a break or ^C. If there is no
711,11 → 724,11
or1k_interrupt (signo)
int signo;
{
debug ("interrupt");
/* If this doesn't work, try more severe steps. */
signal (signo, or1k_interrupt_twice);
 
debug ("remote_interrupt called\n");
if (remote_debug)
fprintf_unfiltered (gdb_stdlog, "or1k_interrupt called\n");
 
interrupt_count++;
}
726,10 → 739,14
or1k_interrupt_twice (signo)
int signo;
{
debug ("interrupt2");
signal (signo, ofunc);
interrupt_query ();
signal (signo, or1k_interrupt);
quit_flag = 1;
if (interrupt_count++ >= 2) {
or1k_stop ();
signal (signo, ofunc);
interrupt_query ();
signal (signo, or1k_interrupt_twice);
interrupt_count = 1;
}
}
 
/* Resume execution of the target process. STEP says whether to single-step
747,6 → 764,12
unsigned int val;
unsigned int ppc_insn;
unsigned int pc_insn;
/* We must accumulate interrupt counts, when stepping. This may cause some
unwanted questions, if step is interrupted several consequtive times,
but this should not be the issue with normal usage */
if (step == 0)
interrupt_count = 0;
pc = read_pc();
npc = or1k_read_spr_reg (PC_SPRNUM);
960,7 → 983,6
unsigned long pc;
unsigned long ppc;
char buf[MAX_REGISTER_RAW_SIZE];
interrupt_count = 0;
 
debug ("wait %i %i\n", pid, or1k_status);
/* If we have not sent a single step or continue command, then the
979,7 → 1001,10
or1k_error ("Remote failure: %s", or1k_err_name (err));
 
/* Set new signal handler */
ofunc = signal (SIGINT, or1k_interrupt);
if (interrupt_count)
ofunc = signal (SIGINT, or1k_interrupt_twice);
else
ofunc = signal (SIGINT, or1k_interrupt);
 
/* Wait for risc to stop. */
do {
995,6 → 1020,7
debug ("%i", val);
} while ((val & 1) == 0);
 
//sleep(1);
drr = or1k_read_spr_reg (DRR_SPRNUM);
 
/* Restore old INT signal handler */
/trunk/insight/gdb/or1k-tdep.c
42,7 → 42,7
 
/* Group reg name size. See or1k_reg_names. */
int or1k_group_name_sizes[OR1K_NUM_SPR_GROUPS] = {
72, 0, 0, 6, 4, 2,
80, 0, 0, 6, 4, 2,
22, 16, 1, 3, 2, 8
};
 
65,6 → 65,7
"VR", "UPR", "CPUCFGR", "DMMUCFGR", "IMMUCFGR", "DCCFGR", "ICCFGR", "DCFGR",
"PCCFGR", "SPR0_9", "SPR0_10", "SPR0_11", "SPR0_12", "SPR0_13", "SPR0_14", "SPR0_15",
"NPC", "SR", "PPC", "SPR0_19", "SPR0_20", "SPR0_21", "SPR0_22", "SPR0_23",
"SPR0_24", "SPR0_25", "SPR0_26", "SPR0_27", "SPR0_28", "SPR0_29", "SPR0_30", "SPR0_31",
"EPCR0", "EPCR1", "EPCR2", "EPCR3", "EPCR4", "EPCR5", "EPCR6", "EPCR7",
"EPCR8", "EPCR9", "EPCR10", "EPCR11", "EPCR12", "EPCR13", "EPCR14", "EPCR15",
"EEAR0","EEAR1", "EEAR2", "EEAR3", "EEAR4", "EEAR5", "EEAR6", "EEAR7",
77,10 → 78,10
/* group 2 - Instruction MMU - not listed, generated */
 
/* group 3 - Data cache */
"DCCR", "DCBIR", "DCBPR", "DCBFR", "DCBWR", "DCBLR",
"DCCR", "DCBPR", "DCBFR", "DCBIR", "DCBWR", "DCBLR",
 
/* group 4 - Instruction cache */
"ICCR", "ICBLR", "ICBIR", "ICBPR",
"ICCR", "ICBPR", "ICBIR", "ICBLR",
 
/* group 5 - MAC */
"MACLO", "MACHI",
/trunk/insight/gdb/config/or1k/tm-or1k.h
356,7 → 356,11
(extract_address (REGBUF + REGISTER_BYTE (RV_REGNUM), \
REGISTER_RAW_SIZE (RV_REGNUM)))
 
#ifdef GDBTK
#define EXTRACT_STRUCT_VALUE_ADDRESS_P() 1
#else
#define EXTRACT_STRUCT_VALUE_ADDRESS_P 1
#endif
 
/* Advance PC across any function entry prologue instructions
to reach some "real" code. */
414,7 → 418,7
#define FUNCTION_START_OFFSET (0)
 
/* Floating point is IEEE compliant */
#define IEEE_FLOAT
#define IEEE_FLOAT 1
 
/* Is floating/vector unit present. */
#define OR1K_VF_PRESENT (or1k_implementation.vf_present)
/trunk/gdb-5.0/gdb/jtag.c
1005,6 → 1005,9
char *port_name;
char **argv;
 
int tmp, i;
unsigned int npc, ppc, r1, insn, result;
 
#ifdef DEBUG_JTAG
printf_unfiltered ("INIT\n");
fflush(stdout);
1088,6 → 1091,372
jtag_set_chain (SC_RISC_DEBUG);
 
free (port_name);
 
#if 1
 
#define RAM_BASE 0x40000000
/* Stall risc */
jtag_set_chain (SC_REGISTER);
jtag_write_reg (4, 0x00000001);
 
jtag_set_chain (SC_WISHBONE);
jtag_write_reg (RAM_BASE + 0x00, 0x9c200000); /* l.addi r1,r0,0x0 */
jtag_write_reg (RAM_BASE + 0x04, 0x18400000 + (RAM_BASE >> 16)); /* l.movhi r2,0x4000 */
jtag_write_reg (RAM_BASE + 0x08, 0xa8420000 + ((RAM_BASE + 0x30) & 0xffff)); /* l.ori r2,r2,0x0000 */
jtag_write_reg (RAM_BASE + 0x0c, 0x9c210001); /* l.addi r1,r1,1 */
jtag_write_reg (RAM_BASE + 0x10, 0x9c210001); /* l.addi r1,r1,1 */
jtag_write_reg (RAM_BASE + 0x14, 0xd4020800); /* l.sw 0(r2),r1 */
jtag_write_reg (RAM_BASE + 0x18, 0x9c210001); /* l.addi r1,r1,1 */
jtag_write_reg (RAM_BASE + 0x1c, 0x84620000); /* l.lwz r3,0(r2) */
jtag_write_reg (RAM_BASE + 0x20, 0x03fffffb); /* l.j loop2 */
jtag_write_reg (RAM_BASE + 0x24, 0xe0211800); /* l.add r1,r1,r3 */
jtag_write_reg (RAM_BASE + 0x24, 0xe0211800); /* l.add r1,r1,r3 */
 
/* Enable exceptions */
jtag_set_chain (SC_RISC_DEBUG);
jtag_write_reg ((0 << 11) + 17, 0x03);
 
/* Trap causes stall */
jtag_set_chain (SC_RISC_DEBUG);
jtag_write_reg ((6 << 11) + 20, 0x2000);
 
/* Set PC */
jtag_set_chain (SC_RISC_DEBUG);
jtag_write_reg ((0 << 11) + 16, RAM_BASE);
 
/* Set step bit */
jtag_set_chain (SC_RISC_DEBUG);
jtag_write_reg ((6 << 11) + 16, 1 << 22);
 
 
for (i = 0; i < 10; i++)
{
/* Unstall */
jtag_set_chain (SC_REGISTER);
jtag_write_reg (4, 0x00000000);
jtag_set_chain (SC_RISC_DEBUG);
}
 
/* Read NPC */
jtag_set_chain (SC_RISC_DEBUG);
npc = jtag_read_reg ((0 << 11) + 16);
npc = jtag_read_reg ((0 << 11) + 16);
 
/* Read PPC */
jtag_set_chain (SC_RISC_DEBUG);
ppc = jtag_read_reg ((0 << 11) + 18);
ppc = jtag_read_reg ((0 << 11) + 18);
 
/* Read R1 */
jtag_set_chain (SC_RISC_DEBUG);
r1 = jtag_read_reg (0x401);
r1 = jtag_read_reg (0x401);
 
printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1);
printf("Expected npc = %.8lx ppc = %.8lx r1 = %.8lx\n", 0x4000000c, 0x40000024, 5);
result = npc + ppc + r1;
 
 
/* Reset step bit */
jtag_set_chain (SC_RISC_DEBUG);
jtag_write_reg ((6 << 11) + 16, 0);
 
 
 
/* Set trap insn in delay slot */
jtag_set_chain (SC_WISHBONE);
insn = jtag_read_reg (RAM_BASE + 0x24);
insn = jtag_read_reg (RAM_BASE + 0x24);
jtag_write_reg (RAM_BASE + 0x24, 0x21000001);
/* Unstall */
jtag_set_chain (SC_REGISTER);
jtag_write_reg (4, 0x00000000);
jtag_set_chain (SC_RISC_DEBUG);
/* Read NPC */
jtag_set_chain (SC_RISC_DEBUG);
npc = jtag_read_reg ((0 << 11) + 16);
npc = jtag_read_reg ((0 << 11) + 16);
 
/* Read PPC */
jtag_set_chain (SC_RISC_DEBUG);
ppc = jtag_read_reg ((0 << 11) + 18);
ppc = jtag_read_reg ((0 << 11) + 18);
 
/* Read R1 */
jtag_set_chain (SC_RISC_DEBUG);
r1 = jtag_read_reg (0x401);
r1 = jtag_read_reg (0x401);
 
/* Set back original insn */
jtag_set_chain (SC_WISHBONE);
jtag_write_reg (RAM_BASE + 0x24, insn);
 
printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1);
printf("Expected npc = %.8lx ppc = %.8lx r1 = %.8lx\n", 0x4000000c, 0x40000024, 8);
result = npc + ppc + r1 + result;
 
 
/* Set trap insn in place of branch insn */
jtag_set_chain (SC_WISHBONE);
insn = jtag_read_reg (RAM_BASE + 0x20);
insn = jtag_read_reg (RAM_BASE + 0x20);
jtag_write_reg (RAM_BASE + 0x20, 0x21000001);
/* Set PC */
jtag_set_chain (SC_RISC_DEBUG);
jtag_write_reg ((0 << 11) + 16, RAM_BASE + 0x0c);
 
/* Unstall */
jtag_set_chain (SC_REGISTER);
jtag_write_reg (4, 0x00000000);
jtag_set_chain (SC_RISC_DEBUG);
/* Read NPC */
jtag_set_chain (SC_RISC_DEBUG);
npc = jtag_read_reg ((0 << 11) + 16);
npc = jtag_read_reg ((0 << 11) + 16);
 
/* Read PPC */
jtag_set_chain (SC_RISC_DEBUG);
ppc = jtag_read_reg ((0 << 11) + 18);
ppc = jtag_read_reg ((0 << 11) + 18);
 
/* Read R1 */
jtag_set_chain (SC_RISC_DEBUG);
r1 = jtag_read_reg (0x401);
r1 = jtag_read_reg (0x401);
 
/* Set back original insn */
jtag_set_chain (SC_WISHBONE);
jtag_write_reg (RAM_BASE + 0x20, insn);
 
printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1);
printf("Expected npc = %.8lx ppc = %.8lx r1 = %.8lx\n", 0x40000024, 0x40000020, 11);
result = npc + ppc + r1 + result;
 
 
/* Set trap insn before branch insn */
jtag_set_chain (SC_WISHBONE);
insn = jtag_read_reg (RAM_BASE + 0x1c);
insn = jtag_read_reg (RAM_BASE + 0x1c);
jtag_write_reg (RAM_BASE + 0x1c, 0x21000001);
/* Set PC */
jtag_set_chain (SC_RISC_DEBUG);
jtag_write_reg ((0 << 11) + 16, RAM_BASE + 0x20);
 
/* Unstall */
jtag_set_chain (SC_REGISTER);
jtag_write_reg (4, 0x00000000);
jtag_set_chain (SC_RISC_DEBUG);
/* Read NPC */
jtag_set_chain (SC_RISC_DEBUG);
npc = jtag_read_reg ((0 << 11) + 16);
npc = jtag_read_reg ((0 << 11) + 16);
 
/* Read PPC */
jtag_set_chain (SC_RISC_DEBUG);
ppc = jtag_read_reg ((0 << 11) + 18);
ppc = jtag_read_reg ((0 << 11) + 18);
 
/* Read R1 */
jtag_set_chain (SC_RISC_DEBUG);
r1 = jtag_read_reg (0x401);
r1 = jtag_read_reg (0x401);
 
/* Set back original insn */
jtag_set_chain (SC_WISHBONE);
jtag_write_reg (RAM_BASE + 0x1c, insn);
 
printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1);
printf("Expected npc = %.8lx ppc = %.8lx r1 = %.8lx\n", 0x40000020, 0x4000001c, 24);
result = npc + ppc + r1 + result;
 
 
/* Set trap insn behind lsu insn */
jtag_set_chain (SC_WISHBONE);
insn = jtag_read_reg (RAM_BASE + 0x18);
insn = jtag_read_reg (RAM_BASE + 0x18);
jtag_write_reg (RAM_BASE + 0x18, 0x21000001);
/* Set PC */
jtag_set_chain (SC_RISC_DEBUG);
jtag_write_reg ((0 << 11) + 16, RAM_BASE + 0x1c);
 
/* Unstall */
jtag_set_chain (SC_REGISTER);
jtag_write_reg (4, 0x00000000);
jtag_set_chain (SC_RISC_DEBUG);
/* Read NPC */
jtag_set_chain (SC_RISC_DEBUG);
npc = jtag_read_reg ((0 << 11) + 16);
npc = jtag_read_reg ((0 << 11) + 16);
 
/* Read PPC */
jtag_set_chain (SC_RISC_DEBUG);
ppc = jtag_read_reg ((0 << 11) + 18);
ppc = jtag_read_reg ((0 << 11) + 18);
 
/* Read R1 */
jtag_set_chain (SC_RISC_DEBUG);
r1 = jtag_read_reg (0x401);
r1 = jtag_read_reg (0x401);
 
/* Set back original insn */
jtag_set_chain (SC_WISHBONE);
jtag_write_reg (RAM_BASE + 0x18, insn);
 
printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1);
printf("Expected npc = %.8lx ppc = %.8lx r1 = %.8lx\n", 0x4000001c, 0x40000018, 49);
result = npc + ppc + r1 + result;
 
/* Set trap insn very near previous one */
jtag_set_chain (SC_WISHBONE);
insn = jtag_read_reg (RAM_BASE + 0x1c);
insn = jtag_read_reg (RAM_BASE + 0x1c);
jtag_write_reg (RAM_BASE + 0x1c, 0x21000001);
/* Set PC */
jtag_set_chain (SC_RISC_DEBUG);
jtag_write_reg ((0 << 11) + 16, RAM_BASE + 0x18);
 
/* Unstall */
jtag_set_chain (SC_REGISTER);
jtag_write_reg (4, 0x00000000);
jtag_set_chain (SC_RISC_DEBUG);
/* Read NPC */
jtag_set_chain (SC_RISC_DEBUG);
npc = jtag_read_reg ((0 << 11) + 16);
npc = jtag_read_reg ((0 << 11) + 16);
 
/* Read PPC */
jtag_set_chain (SC_RISC_DEBUG);
ppc = jtag_read_reg ((0 << 11) + 18);
ppc = jtag_read_reg ((0 << 11) + 18);
 
/* Read R1 */
jtag_set_chain (SC_RISC_DEBUG);
r1 = jtag_read_reg (0x401);
r1 = jtag_read_reg (0x401);
 
/* Set back original insn */
jtag_set_chain (SC_WISHBONE);
jtag_write_reg (RAM_BASE + 0x1c, insn);
 
printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1);
printf("Expected npc = %.8lx ppc = %.8lx r1 = %.8lx\n", 0x40000020, 0x4000001c, 50);
result = npc + ppc + r1 + result;
 
 
/* Set trap insn to the start */
jtag_set_chain (SC_WISHBONE);
insn = jtag_read_reg (RAM_BASE + 0x0c);
insn = jtag_read_reg (RAM_BASE + 0x0c);
jtag_write_reg (RAM_BASE + 0x0c, 0x21000001);
/* Set PC */
jtag_set_chain (SC_RISC_DEBUG);
jtag_write_reg ((0 << 11) + 16, RAM_BASE + 0x1c);
 
/* Unstall */
jtag_set_chain (SC_REGISTER);
jtag_write_reg (4, 0x00000000);
jtag_set_chain (SC_RISC_DEBUG);
/* Read NPC */
jtag_set_chain (SC_RISC_DEBUG);
npc = jtag_read_reg ((0 << 11) + 16);
npc = jtag_read_reg ((0 << 11) + 16);
 
/* Read PPC */
jtag_set_chain (SC_RISC_DEBUG);
ppc = jtag_read_reg ((0 << 11) + 18);
ppc = jtag_read_reg ((0 << 11) + 18);
 
/* Read R1 */
jtag_set_chain (SC_RISC_DEBUG);
r1 = jtag_read_reg (0x401);
r1 = jtag_read_reg (0x401);
 
/* Set back original insn */
jtag_set_chain (SC_WISHBONE);
jtag_write_reg (RAM_BASE + 0x0c, insn);
 
printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1);
printf("Expected npc = %.8lx ppc = %.8lx r1 = %.8lx\n", 0x40000010, 0x4000000c, 99);
result = npc + ppc + r1 + result;
 
 
/* Set step bit */
jtag_set_chain (SC_RISC_DEBUG);
jtag_write_reg ((6 << 11) + 16, 1 << 22);
 
for (i = 0; i < 5; i++)
{
/* Unstall */
jtag_set_chain (SC_REGISTER);
jtag_write_reg (4, 0x00000000);
jtag_set_chain (SC_RISC_DEBUG);
}
 
/* Read NPC */
jtag_set_chain (SC_RISC_DEBUG);
npc = jtag_read_reg ((0 << 11) + 16);
npc = jtag_read_reg ((0 << 11) + 16);
 
/* Read PPC */
jtag_set_chain (SC_RISC_DEBUG);
ppc = jtag_read_reg ((0 << 11) + 18);
ppc = jtag_read_reg ((0 << 11) + 18);
 
/* Read R1 */
jtag_set_chain (SC_RISC_DEBUG);
r1 = jtag_read_reg (0x401);
r1 = jtag_read_reg (0x401);
 
printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1);
printf("Expected npc = %.8lx ppc = %.8lx r1 = %.8lx\n", 0x40000024, 0x40000020, 101);
result = npc + ppc + r1 + result;
 
/* Set PC */
jtag_set_chain (SC_RISC_DEBUG);
jtag_write_reg ((0 << 11) + 16, RAM_BASE + 0x20);
 
for (i = 0; i < 2; i++)
{
/* Unstall */
jtag_set_chain (SC_REGISTER);
jtag_write_reg (4, 0x00000000);
jtag_set_chain (SC_RISC_DEBUG);
}
 
/* Read NPC */
jtag_set_chain (SC_RISC_DEBUG);
npc = jtag_read_reg ((0 << 11) + 16);
npc = jtag_read_reg ((0 << 11) + 16);
 
/* Read PPC */
jtag_set_chain (SC_RISC_DEBUG);
ppc = jtag_read_reg ((0 << 11) + 18);
ppc = jtag_read_reg ((0 << 11) + 18);
 
/* Read R1 */
jtag_set_chain (SC_RISC_DEBUG);
r1 = jtag_read_reg (0x401);
r1 = jtag_read_reg (0x401);
 
printf("Read npc = %.8lx ppc = %.8lx r1 = %.8lx\n", npc, ppc, r1);
printf("Expected npc = %.8lx ppc = %.8lx r1 = %.8lx\n", 0x4000000c, 0x40000024, 201);
result = npc + ppc + r1 + result;
 
printf("result = %.8lx\n", result + 0x5eaddaa9);
 
#endif
}
 
void
/trunk/gdb-5.0/gdb/event-top.c
967,6 → 967,7
void
handle_sigint (int sig)
{
printf ("!!!\n");
signal (sig, handle_sigint);
 
/* If immediate_quit is set, we go ahead and process the SIGINT right
/trunk/gdb-5.0/gdb/remote-or1k.c
33,6 → 33,9
#include "remote-utils.h"
#include "gdb_string.h"
#include "tm.h"
#include "event-loop.h"
#include "event-top.h"
#include "inf-loop.h"
 
#include <signal.h>
#include <sys/types.h>
42,6 → 45,11
 
#define debug if (remote_debug) printf_unfiltered
 
/* Prototypes for local functions */
static void or1k_interrupt PARAMS ((int signo));
static void or1k_interrupt_twice PARAMS ((int signo));
static void interrupt_query PARAMS ((void));
 
/* The following prototype is necessary or the compiler will not
correctly promote the data argument to ULONGEST */
static void or1k_write_reg (unsigned int, ULONGEST);
181,7 → 189,11
/* Old SIGINT handler. */
static void (*ofunc) PARAMS ((int));
 
/* Tokens for use by the asynchronous signal handlers for SIGINT */
PTR sigint_or1k_twice_token;
PTR sigint_or1k_token;
 
 
/* Handle low-level error that we can't recover from. Note that just
error()ing out from target_wait or some such low-level place will cause
all hell to break loose--the rest of GDB will tend to get left in an
560,7 → 572,7
or1k_reset();
or1k_status = TARGET_STOPPED;
 
inferior_pid = 0;
/* obsolete inferior_pid = 0; */
}
 
/* Open a connection to the remote board. */
610,6 → 622,7
or1k_write_spr_reg (DMR1_SPRNUM, dmr1);
dmr1 &= ~DMR1_ST;
or1k_unstall ();
or1k_status = TARGET_STOPPED;
}
 
/* Close a connection to the remote board. */
620,7 → 633,6
{
if (or1k_is_open)
{
or1k_kill ();
if (current_or1k_target != NULL && current_or1k_target->to_done != NULL)
current_or1k_target->to_done ();
current_or1k_target = NULL;
699,9 → 711,10
target_terminal_inferior ();
}
 
static void or1k_interrupt_twice (int signo);
/* Send ^C to target to halt it. Target will respond, and send us a
packet. */
static void (*ofunc) PARAMS ((int));
 
 
/* The command line interface's stop routine. This function is installed
as a signal handler for SIGINT. The first time a user requests a
stop, we call remote_stop to send a break or ^C. If there is no
711,11 → 724,11
or1k_interrupt (signo)
int signo;
{
debug ("interrupt");
/* If this doesn't work, try more severe steps. */
signal (signo, or1k_interrupt_twice);
 
debug ("remote_interrupt called\n");
if (remote_debug)
fprintf_unfiltered (gdb_stdlog, "or1k_interrupt called\n");
 
interrupt_count++;
}
726,10 → 739,14
or1k_interrupt_twice (signo)
int signo;
{
debug ("interrupt2");
signal (signo, ofunc);
interrupt_query ();
signal (signo, or1k_interrupt);
quit_flag = 1;
if (interrupt_count++ >= 2) {
or1k_stop ();
signal (signo, ofunc);
interrupt_query ();
signal (signo, or1k_interrupt_twice);
interrupt_count = 1;
}
}
 
/* Resume execution of the target process. STEP says whether to single-step
747,6 → 764,12
unsigned int val;
unsigned int ppc_insn;
unsigned int pc_insn;
/* We must accumulate interrupt counts, when stepping. This may cause some
unwanted questions, if step is interrupted several consequtive times,
but this should not be the issue with normal usage */
if (step == 0)
interrupt_count = 0;
pc = read_pc();
npc = or1k_read_spr_reg (PC_SPRNUM);
960,7 → 983,6
unsigned long pc;
unsigned long ppc;
char buf[MAX_REGISTER_RAW_SIZE];
interrupt_count = 0;
 
debug ("wait %i %i\n", pid, or1k_status);
/* If we have not sent a single step or continue command, then the
979,7 → 1001,10
or1k_error ("Remote failure: %s", or1k_err_name (err));
 
/* Set new signal handler */
ofunc = signal (SIGINT, or1k_interrupt);
if (interrupt_count)
ofunc = signal (SIGINT, or1k_interrupt_twice);
else
ofunc = signal (SIGINT, or1k_interrupt);
 
/* Wait for risc to stop. */
do {
995,6 → 1020,7
debug ("%i", val);
} while ((val & 1) == 0);
 
//sleep(1);
drr = or1k_read_spr_reg (DRR_SPRNUM);
 
/* Restore old INT signal handler */
/trunk/gdb-5.0/gdb/or1k-tdep.c
42,7 → 42,7
 
/* Group reg name size. See or1k_reg_names. */
int or1k_group_name_sizes[OR1K_NUM_SPR_GROUPS] = {
72, 0, 0, 6, 4, 2,
80, 0, 0, 6, 4, 2,
22, 16, 1, 3, 2, 8
};
 
65,6 → 65,7
"VR", "UPR", "CPUCFGR", "DMMUCFGR", "IMMUCFGR", "DCCFGR", "ICCFGR", "DCFGR",
"PCCFGR", "SPR0_9", "SPR0_10", "SPR0_11", "SPR0_12", "SPR0_13", "SPR0_14", "SPR0_15",
"NPC", "SR", "PPC", "SPR0_19", "SPR0_20", "SPR0_21", "SPR0_22", "SPR0_23",
"SPR0_24", "SPR0_25", "SPR0_26", "SPR0_27", "SPR0_28", "SPR0_29", "SPR0_30", "SPR0_31",
"EPCR0", "EPCR1", "EPCR2", "EPCR3", "EPCR4", "EPCR5", "EPCR6", "EPCR7",
"EPCR8", "EPCR9", "EPCR10", "EPCR11", "EPCR12", "EPCR13", "EPCR14", "EPCR15",
"EEAR0","EEAR1", "EEAR2", "EEAR3", "EEAR4", "EEAR5", "EEAR6", "EEAR7",
77,10 → 78,10
/* group 2 - Instruction MMU - not listed, generated */
 
/* group 3 - Data cache */
"DCCR", "DCBIR", "DCBPR", "DCBFR", "DCBWR", "DCBLR",
"DCCR", "DCBPR", "DCBFR", "DCBIR", "DCBWR", "DCBLR",
 
/* group 4 - Instruction cache */
"ICCR", "ICBLR", "ICBIR", "ICBPR",
"ICCR", "ICBPR", "ICBIR", "ICBLR",
 
/* group 5 - MAC */
"MACLO", "MACHI",
/trunk/gdb-5.0/gdb/config/or1k/tm-or1k.h
356,7 → 356,11
(extract_address (REGBUF + REGISTER_BYTE (RV_REGNUM), \
REGISTER_RAW_SIZE (RV_REGNUM)))
 
#ifdef GDBTK
#define EXTRACT_STRUCT_VALUE_ADDRESS_P() 1
#else
#define EXTRACT_STRUCT_VALUE_ADDRESS_P 1
#endif
 
/* Advance PC across any function entry prologue instructions
to reach some "real" code. */
414,7 → 418,7
#define FUNCTION_START_OFFSET (0)
 
/* Floating point is IEEE compliant */
#define IEEE_FLOAT
#define IEEE_FLOAT 1
 
/* Is floating/vector unit present. */
#define OR1K_VF_PRESENT (or1k_implementation.vf_present)

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