OpenCores
URL https://opencores.org/ocsvn/product_code_iterative_decoder/product_code_iterative_decoder/trunk

Subversion Repositories product_code_iterative_decoder

Compare Revisions

  • This comparison shows the changes necessary to convert path
    /
    from Rev 6 to Rev 7
    Reverse comparison

Rev 6 → Rev 7

/trunk/doc/product_code_iterative_decoder.pdf Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream
/trunk/doc/product_code_iterative_decoder.tex
1,5 → 1,5
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% $Id: product_code_iterative_decoder.tex,v 1.1.1.1 2005-11-15 01:52:10 arif_endro Exp $
% $Id: product_code_iterative_decoder.tex,v 1.2 2005-12-26 04:55:49 arif_endro Exp $
%
% Title : Product Code Iterative Decoder
%
102,7 → 102,7
\vspace{1.5cm}
\normalsize
\textbf{Arif E. Nugroho}\\
$\overline{arif\_endro@opencores.org}$
$\overline{\textbf{arif\_endro@opencores.org}}$
 
\vspace{1.50cm}
\begin{figure}[H]
214,6 → 214,13
\vspace{2cm}
\section{Simulation}
 
\begin{figure}[H]
\center
\includegraphics[width=12cm,height=6cm]{screenshot.eps}
\caption{Simulation waveform}
\label{simulation waveform}
\end{figure}
 
This design has been simulated using ModelSim 6.0 SE, here is the
summary of bit errors on different signal to noise ratio (SNR) of input
signal:
239,7 → 246,7
\label{area}
\end{table}
 
The maximum clock frequency is 64.070 MHz (Minimum period 15.608ns)
The maximum clock frequency is 64.045 MHz (Minimum period 15.614ns)
 
\begin{thebibliography}{1}
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.