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https://opencores.org/ocsvn/or1k/or1k/trunk
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- This comparison shows the changes necessary to convert path
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- from Rev 617 to Rev 618
- ↔ Reverse comparison
Rev 617 → Rev 618
/trunk/mp3/bench/verilog/or1200_monitor.v
44,6 → 44,9
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.7 2002/01/19 14:10:39 lampret |
// Fixed OR1200_XILINX_RAM32X1D. |
// |
// Revision 1.6 2002/01/18 07:57:56 lampret |
// Added support for reading XILINX_RAM32X1D register file. |
// |
205,7 → 208,7
always @(posedge `OR1200_TOP.or1200_cpu.or1200_ctrl.clk) |
if (!`OR1200_TOP.or1200_cpu.or1200_ctrl.wb_freeze) begin |
#2; |
if (((`OR1200_TOP.or1200_cpu.or1200_ctrl.wb_insn[31:26] != `OR1200_OR32_NOP) || !`OR1200_TOP.or1200_cpu.or1200_ctrl.wb_insn[0]) |
if (((`OR1200_TOP.or1200_cpu.or1200_ctrl.wb_insn[31:26] != `OR1200_OR32_NOP) || !`OR1200_TOP.or1200_cpu.or1200_ctrl.wb_insn[16]) |
&& !(`OR1200_TOP.or1200_cpu.or1200_except.except_flushpipe && `OR1200_TOP.or1200_cpu.or1200_except.ex_dslot)) |
display_arch_state; |
if (`OR1200_TOP.or1200_cpu.or1200_ctrl.wb_insn == 32'h1500_0001) begin // small hack to stop simulation (l.nop 1) |