URL
https://opencores.org/ocsvn/openrisc/openrisc/trunk
Subversion Repositories openrisc
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 619 to Rev 620
- ↔ Reverse comparison
Rev 619 → Rev 620
/openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/Makefile
27,7 → 27,8
PORT_SRC = $(RTOS_SOURCE_DIR)/portable/GCC/OpenRISC/port.c |
PORT_ASM = $(RTOS_SOURCE_DIR)/portable/GCC/OpenRISC/portasm.S |
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DEMO_SRC = main.c ./drivers/uart.c |
DEMO_SRC = main.c |
ARCH_ASM = ./arch/reset.S |
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INC = -I. -I../../Source/include -I./arch -I./drivers -I../Common/include \ |
-I$(RTOS_SOURCE_DIR)/portable/GCC/OpenRISC |
48,10 → 49,10
PORT_OBJ = $(PORT_SRC:.c=.o) |
DEMO_OBJ = $(DEMO_SRC:.c=.o) |
PORT_ASM_OBJ = $(PORT_ASM:.S=.o) |
ARCH_OBJ = ./arch/reset.o ./arch/int.o ./arch/support.o ./arch/interrupts.o |
ARCH_ASM_OBJ = $(ARCH_ASM:.S=.o) |
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LDFLAGS = -T ./arch/link.ld -Map $(PROG).map |
LIBS = -L./drivers -ldrivers \ |
LIBS = -L./arch -larch -L./drivers -ldrivers \ |
-L$(CCPATH)/lib/gcc/$(TARGET)/$(GCCVER) \ |
-L$(CCPATH)/$(TARGET)/lib \ |
-lgcc -lc -lm |
61,7 → 62,7
@$(CC) -c $(CFLAGS) -o $@ $< |
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%.o: %.S |
@echo " CC $<" |
@echo " ASM $<" |
@$(CC) -c $(CFLAGS) -o $@ $< |
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all: $(PROG).or32 |
68,7 → 69,7
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$(PROG).or32 : $(PORT_ASM_OBJ) $(PORT_OBJ) $(RTOS_OBJ) $(DEMO_OBJ) Makefile arch drivers |
@echo Link.... |
@$(LD) -o $@ $(LDFLAGS) --start-group $(ARCH_OBJ) $(PORT_ASM_OBJ) $(PORT_OBJ) $(RTOS_OBJ) $(DEMO_OBJ) $(LIBS) --end-group |
@$(LD) -o $@ $(LDFLAGS) --start-group $(ARCH_ASM_OBJ) $(PORT_ASM_OBJ) $(PORT_OBJ) $(RTOS_OBJ) $(DEMO_OBJ) $(LIBS) --end-group |
@$(OBJDUMP) -S $(PROG).or32 >> $(PROG).asm |
@echo Complete $@ |
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/openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/arch/Makefile
2,14 → 2,26
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CFLAGS += -DIC=0 -DDC=0 |
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all: support.o int.o reset.o interrupts.o |
SRC_C = support.c int.c interrupts.c |
SRC_S = reset.S |
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OBJ_C = $(SRC_C:.c=.o) |
OBJ_S = $(SRC_S:.S=.o) |
OBJS = $(OBJ_C) $(OBJ_S) |
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all: libarch.a |
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libarch.a: $(OBJS) |
@$(AR) cru $@ $(OBJ_C) |
@$(RANLIB) $@ |
@echo Complete $@ |
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%.o: %.c |
@echo " CC $<" |
@$(CC) -c $(CFLAGS) $(INCDIRS) -o $@ $< |
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%.o: %.S |
@echo " CC $<" |
@echo " ASM $<" |
@$(CC) -c $(CFLAGS) $(INCDIRS) -o $@ $< |
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clean: |
/openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/drivers/uart.c
28,6 → 28,9
void uart_init(void) { |
int divisor; |
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/* Diable interrupt */ |
REG8(UART_BASE + UART_IER) = 0x0; |
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/* Reset receiver and transmiter */ |
/* Set RX interrupt for each byte */ |
REG8(UART_BASE + UART_FCR) = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_1; |
/openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/drivers/Makefile
3,10 → 3,17
INCDIR = -I../arch |
CFLAGS += $(INCDIR) |
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SRC_C = uart.c |
SRC_S = |
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OBJ_C = $(SRC_C:.c=.o) |
OBJ_S = $(SRC_S:.S=.o) |
OBJS = $(OBJ_C) $(OBJ_S) |
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all: libdrivers.a |
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libdrivers.a: uart.o |
@$(AR) cru $@ $< |
libdrivers.a: $(OBJS) |
@$(AR) cru $@ $(OBJS) |
@$(RANLIB) $@ |
@echo Complete $@ |
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