URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Subversion Repositories or1k
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 64 to Rev 65
- ↔ Reverse comparison
Rev 64 → Rev 65
/trunk/or1ksim/cpu/common/stats.c
33,6 → 33,7
struct mstats_entry mstats; /* misc units stats */ |
struct cachestats_entry ic_stats; /* instruction cache stats */ |
struct cachestats_entry dc_stats; /* data cache stats */ |
struct mmustats_entry dmmu_stats; /* data cache stats */ |
struct raw_stats raw_stats; /* RAW hazard stats */ |
struct slp_stats slp_stats; /* SLP stats */ |
|
262,4 → 263,5
printf("IC read: hit %d(%d%%), miss %d\n", ic_stats.readhit, (ic_stats.readhit * 100) / SD(ic_stats.readhit + ic_stats.readmiss), ic_stats.readmiss); |
printf("DC read: hit %d(%d%%), miss %d\n", dc_stats.readhit, (dc_stats.readhit * 100) / SD(dc_stats.readhit + dc_stats.readmiss), dc_stats.readmiss); |
printf("DC write: hit %d(%d%%), miss %d\n", dc_stats.writehit, (dc_stats.writehit * 100) / SD(dc_stats.writehit + dc_stats.writemiss), dc_stats.writemiss); |
printf("DMMU read: hit %d(%d%%), miss %d\n", dmmu_stats.loads_tlbhit, (dmmu_stats.loads_tlbhit * 100) / SD(dmmu_stats.loads_tlbhit + dmmu_stats.loads_tlbmiss), dmmu_stats.loads_tlbmiss); |
} |
/trunk/or1ksim/cpu/common/stats.h
86,6 → 86,15
int writemiss; |
}; /* cache stats */ |
|
struct mmustats_entry { |
int loads_tlbhit; |
int loads_tlbmiss; |
int loads_pagefaults; |
int stores_tlbhit; |
int stores_tlbmiss; |
int stores_pagefaults; |
}; /* MMU stats */ |
|
struct raw_stats { |
int reg[64]; |
int range[RAW_RANGE]; |
112,6 → 121,7
extern struct fstats_entry fstats[FSTATS_LEN]; |
extern struct cachestats_entry ic_stats; |
extern struct cachestats_entry dc_stats; |
extern struct mmustats_entry dmmu_stats; |
extern struct raw_stats raw_stats; |
extern struct slp_stats slp_stats; |
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