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    from Rev 64 to Rev 65
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Rev 64 → Rev 65

/pltbutils/branches/dev0007/examples/vhdl/tb_example2/tb_example2.vhd
1,6 → 1,6
----------------------------------------------------------------------
---- ----
---- PlTbUtils Example Testbench ----
---- PlTbUtils Testbench Example 2 ----
---- ----
---- This file is part of the PlTbUtils project ----
---- http://opencores.org/project,pltbutils ----
51,15 → 51,15
use work.pltbutils_func_pkg.all;
use work.pltbutils_comp_pkg.all;
 
entity tb_example is
entity tb_example2 is
generic (
G_WIDTH : integer := 8;
G_CLK_PERIOD : time := 10 ns;
G_DISABLE_BUGS : integer range 0 to 1 := 0
);
end entity tb_example;
end entity tb_example2;
 
architecture bhv of tb_example is
architecture bhv of tb_example2 is
 
-- Simulation status- and control signals
-- for accessing .stop_sim and for viewing in waveform window
100,7 → 100,7
stop_sim_i => pltbs.stop_sim
);
tc0 : entity work.tc_example
tc0 : entity work.tc_example2
generic map (
G_WIDTH => G_WIDTH,
G_DISABLE_BUGS => G_DISABLE_BUGS
/pltbutils/branches/dev0007/examples/vhdl/tb_example2/tc_example2.vhd
50,7 → 50,7
use ieee.std_logic_1164.all;
use work.pltbutils_func_pkg.all;
 
entity tc_example is
entity tc_example2 is
generic (
G_WIDTH : integer := 8;
G_DISABLE_BUGS : integer range 0 to 1 := 0
65,4 → 65,4
sum : in std_logic_vector(G_WIDTH-1 downto 0);
carry_out : in std_logic
);
end entity tc_example;
end entity tc_example2;
/pltbutils/branches/dev0007/examples/vhdl/tb_example2/tb_example2_files.lst
1,3 → 1,3
tc_example.vhd
tc_example2.vhd
tc1.vhd
tb_example.vhd
tb_example2.vhd
/pltbutils/branches/dev0007/examples/vhdl/tb_example2/tc1.vhd
6,19 → 6,14
---- This file is part of the PlTbUtils project ----
---- http://opencores.org/project,pltbutils ----
---- ----
---- Description: ----
---- Description: ----
---- PlTbUtils is a collection of functions, procedures and ----
---- components for easily creating stimuli and checking response ----
---- in automatic self-checking testbenches. ----
---- ----
---- This file is a template, which can be used as a base when ----
---- testbenches which use PlTbUtils. ----
---- Copy this file to your preferred location and rename the ----
---- copied file and its contents, by replacing the word ----
---- "template" with a name for your design. ----
---- Also remove informative comments enclosed in < ... > . ----
---- This file is an example which demonstrates how PlTbUtils ----
---- can be used. ---- ----
---- ----
---- ----
---- To Do: ----
---- - ----
---- ----
59,7 → 54,7
 
-- NOTE: The purpose of the following code is to demonstrate some of the
-- features of PlTbUtils, not to do a thorough verification.
architecture tc1 of tc_example is
architecture tc1 of tc_example2 is
begin
p_tc1 : process
variable pltbv : pltbv_t := C_PLTBV_INIT;

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