Subversion Repositories zpu
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Index
-
-
- Getting started -
- Introduction +
- Getting started - FPGA +
- Getting started - software +
- Architecture introduction
- Instruction set
- Custom startup code (aka crt0.s)
- Implementing your own ZPU @@ -15,13 +16,99 @@
- About zpu_core.vhd
- Next generation ZPU
Getting started
-The ZPU comes with a few simulation examples. + + +Getting started - FPGA
+The simplest version of the ZPU uses BRAM. When getting accustomed to the ZPU, a BRAM ZPU with a UART +is a good place to start.-Start with VHDL synthesis examples +You'll find a working simulation script in hdl/example/simzpu_small.do and hdl/example_medium/simzpu_medium.do, which +show simulation of the small(zpu_core_small.vhd) and medium sized ZPU(zpu_core.vhd). hdl/example/simzpu_interrupt.do +shows use of interrupts. +
+When implementing the ZPU, copy the following files and modify them to your needs: +
-
+
- hdl/example/zpu_config.vhd - set up RAM size here +
- hdl/example/helloworld.vhd - dual port BRAM implementation. +
Generating VHDL BRAM initialization
+ +
+../install/bin/zpu-elf-objcopy -O binary hello.elf hello.bin
+java -classpath ../simulator/zpusim.jar com.zylin.zpu.simulator.tools.MakeRam hello.bin >hello.bram
+
+
+Running example simulation
+The hdl/example directory has a simulation written for Xilinx WebPack ModelSim. From the ModelSim command prompt: +-
+
- cd c:/<installfolder>/hdl/example +
- do zpusim_small.do +
+After running the hello world simulation (see zpusim.do), two files are written to the hdl/example directory: +
-
+
- log.txt - contains the "Hello world!" text written to the debug channel/simplified UART. +
- trace.txt - a trace file for the CPU. The instruction set simulator has the capability of taking +this file as input in order to verify that the HDL implementation matches the instruction set simulator. +When a mismatch is found, the GDB debugger will break. Very handy for debugging custom ZPU implementations. +
HDL Directories & files
+-
+
- example - contains example files & working ZPU. Start here. +
- wishbone - contains wishbone interface for the ZPU +
- zpu3 - if you are interested in developing ZPU cores and not only using them, then this directory contains various stuff of more or less historical interest. +
- zpu4 - if you are interested in developing ZPU cores and not only using them, then this is the active development version. You'll also want to copy out the +files you need from this folder to your own project. +
Getting started - software
+The ZPU comes with a standard GCC toolchain and an instruction set simulator. This allows compiling, running & debugging simple test programs. The Simulator has +some very basic peripherals defined: counter, timer interrupt and a debug output port. +Installing
+-
+
- Install Cygwin. http://www.cygwin.com +
- Install Java +
- Start Cygwin bash +
- cd zpu/sw +
- sh setup.sh +
- /tmp/zpu/install/bin now has the .exe files for the GCC toolchain & GDB +
- Optionally you may set up PATH variables to point to /tmp/zpu/install/bin
+source env.sh +
Hello world example
+The ZPU toolchain comes with newlib & libstdc++ support which means that many C/C++ programs can be compiled without modification. +
+
+cd zpu/sw/helloworld
+
+../install/bin/zpu-elf-gcc -phi hello.c -o hello.elf
+
Running the hello world example in GDB
+-
+
- cd zpu/sw/helloworld +
- Launch the simulator from a seperate bash shell:
+java -classpath ../simulator/zpusim.jar -Xmx512m com.zylin.zpu.simulator.Phi 4444 +
+
+ - Launch GDB:
+../install/bin/zpu-elf-gdb hello.elf +
- Connect to target, load and run application:
+
+(gdb) target remote localhost:4444+
+(gdb) load
+(gdb) continue
++
+
+
Introduction
+Architecture introduction
The ZPU is a zero operand, or stack based CPU. The opcodes have a fixed width of 8 bits.Phi memory map
The ZPU architecture does not define a memory map as such, but the GCC + libgloss + ecos hal library uses the -memory map below. +memory map below. "Phi" is just a three letter word for the particular memory layout below that came about +while developing the ZPU.
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