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https://opencores.org/ocsvn/or1k/or1k/trunk
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- This comparison shows the changes necessary to convert path
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- from Rev 667 to Rev 668
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Rev 667 → Rev 668
/trunk/or1200/rtl/verilog/or1200_dmmu_top.v
44,6 → 44,9
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.4 2002/02/11 04:33:17 lampret |
// Speed optimizations (removed duplicate _cyc_ and _stb_). Fixed D/IMMU cache-inhibit attr. |
// |
// Revision 1.3 2002/01/28 01:16:00 lampret |
// Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways. |
// |
179,7 → 182,7
assign spr_dat_o = 32'h00000000; |
assign dcdmmu_adr_o = dcpu_adr_i; |
assign dcpu_tag_o = dcdmmu_tag_i; |
assign dcdmmu_cyc_o = dcpu_cycstb_i; |
assign dcdmmu_cycstb_o = dcpu_cycstb_i; |
assign dcpu_err_o = dcdmmu_err_i; |
assign dcdmmu_ci_o = `OR1200_DMMU_CI; |
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