URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Subversion Repositories or1k
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 692 to Rev 693
- ↔ Reverse comparison
Rev 692 → Rev 693
/trunk/or1ksim/debug/debug_unit.c
436,7 → 436,11
unsigned long drr = mfspr (SPR_DRR); |
|
&debug_ignore_exception; |
printf ("0x%08x 0x%08x \n", dsr, drr); |
|
#if DEBUG_JTAG |
printf ("dsr 0x%08x drr 0x%08x \n", dsr, drr); |
#endif |
|
switch(except) { |
case EXCEPT_RESET: drr |= result = dsr & SPR_DSR_RSTE; break; |
case EXCEPT_BUSERR: drr |= result = dsr & SPR_DSR_BUSEE; break; |
454,7 → 458,9
default: |
break; |
} |
printf ("0x%08x 0x%08x %i\n", dsr, drr, result); |
#if DEBUG_JTAG |
printf ("dsr 0x%08x drr 0x%08x result %i\n", dsr, drr, result); |
#endif |
|
mtspr (SPR_DRR, drr); |
set_stall_state (result != 0); |
/trunk/or1ksim/cpu/or32/execute.c
296,8 → 296,10
data = 0; |
dis = 0; |
} |
if(opd->type & OPTYPE_LAST) |
if(opd->type & OPTYPE_LAST) { |
num_op = no; |
return; |
} |
opd++; |
} |
num_op = no; |
537,10 → 539,10
unsigned long i = iqueue[0].insn_addr; |
|
if (i == 0xffffffff) return; |
if (config.sim.exe_log_marker && instructions % config.sim.exe_log_marker == 0) { |
fprintf (runtime.sim.fexe_log, "--------------------- %8i instruction ---------------------\n", instructions); |
} |
if (config.sim.exe_log_start <= instructions && (config.sim.exe_log_end <= 0 || instructions <= config.sim.exe_log_end)) { |
if (config.sim.exe_log_marker && instructions % config.sim.exe_log_marker == 0) { |
fprintf (runtime.sim.fexe_log, "--------------------- %8i instruction ---------------------\n", instructions); |
} |
switch (config.sim.exe_log_type) { |
case EXE_LOG_HARDWARE: |
fprintf (runtime.sim.fexe_log, "\nEXECUTED(): %.8lx: ", i); |
/trunk/or1ksim/cpu/or1k/except.c
59,8 → 59,8
pending.saved = pc - 4; |
else |
pending.saved = pc; |
printf("Exception 0x%x (%s): insn_addr 0x%x, EA 0x%x, pc: 0x%x, pcnext: 0x%x\n", |
except, EXCEPT_NAME(except), iqueue[0].insn_addr, ea, pc, pcnext); |
if (config.sim.verbose) printf("Exception 0x%x (%s) at 0x%x, EA: 0x%x, pc: 0x%x, pcnext: 0x%x\n", |
except, EXCEPT_NAME(except), iqueue[0].insn_addr, ea, pc, pcnext); |
} |
} |
|
73,18 → 73,10
#else |
|
if (delay_insn) { |
printf("INFO: Exception during execution of delay slot insn.\n"); |
if (config.sim.verbose) printf("INFO: Exception during execution of delay slot insn.\n"); |
pc -= 4; |
} |
#if 0 |
if ((pcnext != (pc + 4)) && (except != EXCEPT_ITLBMISS)) { /* Always execute delay slot insn */ |
printf("XXXXXXXXXXXXXX\n"); |
fetch(); /* before starting with exception */ |
decode(&iqueue[0]); /* (itlbmiss is special case) */ |
execute(); |
} |
#endif |
|
|
pc_saved = pc & ~0x3; |
if (except == EXCEPT_ILLEGAL) |
mtspr(SPR_EPCR_BASE, pending.saved); |