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https://opencores.org/ocsvn/ae18/ae18/trunk
Subversion Repositories ae18
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- This comparison shows the changes necessary to convert path
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- from Rev 7 to Rev 8
- ↔ Reverse comparison
Rev 7 → Rev 8
/trunk/rtl/verilog/ae18_aram.v
10,7 → 10,7
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/* |
* |
* $Id: ae18_aram.v,v 1.3 2006-12-29 18:04:22 sybreon Exp $ |
* $Id: ae18_aram.v,v 1.4 2006-12-29 18:04:51 sybreon Exp $ |
* |
* Copyright (C) 2006 Shawn Tan Ser Ngiap <shawn.tan@aeste.net> |
* |
/trunk/rtl/verilog/ae18_sram.v
1,16 → 1,16
// -*- Mode: Verilog -*- |
// Filename : ae18_sram.v |
// Description : AE18 Synchronous RAM |
// Author : |
// Author : Shawn Tan Ser Ngiap <shawn.tan@aeste.net> |
// Created On : Fri Dec 29 05:12:03 2006 |
// Last Modified By: . |
// Last Modified On: . |
// Last Modified By: Shawn Tan |
// Last Modified On: 2006-12-29 |
// Update Count : 0 |
// Status : Unknown, Use with caution! |
// Status : Beta/Stable |
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/* |
* |
* $Id: ae18_sram.v,v 1.1 2006-12-29 08:17:16 sybreon Exp $ |
* $Id: ae18_sram.v,v 1.2 2006-12-29 18:03:07 sybreon Exp $ |
* |
* Copyright (C) 2006 Shawn Tan Ser Ngiap <shawn.tan@aeste.net> |
* |
31,8 → 31,9
* DESCRIPTION |
* AE18 small block of RAM. |
* |
* 2006-12-29 |
* Initial checkin |
* HISTORY |
* $Log: not supported by cvs2svn $ |
* |
*/ |
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module ae18_sram (/*AUTOARG*/ |