URL
https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk
Subversion Repositories dbg_interface
Compare Revisions
- This comparison shows the changes necessary to convert path
/
- from Rev 70 to Rev 71
- ↔ Reverse comparison
Rev 70 → Rev 71
/trunk/rtl/verilog/tap_top.v
45,6 → 45,9
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.7 2002/11/06 14:30:10 mohor |
// Trst active high. Inverted on higher layer. |
// |
// Revision 1.6 2002/04/22 12:55:56 mohor |
// tdo_padoen_o changed to tdo_padoe_o. Signal is active high. |
// |
84,13 → 87,16
ShiftDR, Exit1DR, UpdateDR, UpdateDR_q, CaptureDR, |
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// Instructions |
IDCODESelected, CHAIN_SELECTSelected, DEBUGSelected, EXTESTSelected, |
IDCODESelected, CHAIN_SELECTSelected, DEBUGSelected, EXTESTSelected, MBISTSelected, |
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// TDO from dbg module |
TDOData_dbg, BypassRegister, |
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// From Boundary Scan Chain |
bs_chain_i |
bs_chain_i, |
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// From Mbist Chain |
mbist_so_i |
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); |
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116,6 → 122,7
output CHAIN_SELECTSelected; |
output DEBUGSelected; |
output EXTESTSelected; |
output MBISTSelected; |
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input TDOData_dbg; |
output BypassRegister; |
123,6 → 130,8
// From Boundary Scan Chain |
input bs_chain_i; |
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// From Mbist Chain |
input mbist_so_i; |
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reg tdo_pad_o; |
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151,7 → 160,7
reg SAMPLE_PRELOADSelected; |
reg IDCODESelected; |
reg CHAIN_SELECTSelected; |
reg INTESTSelected; |
reg MBISTSelected; |
reg CLAMPSelected; |
reg CLAMPZSelected; |
reg HIGHZSelected; |
536,7 → 545,7
SAMPLE_PRELOADSelected = 0; |
IDCODESelected = 0; |
CHAIN_SELECTSelected = 0; |
INTESTSelected = 0; |
MBISTSelected = 0; |
CLAMPSelected = 0; |
CLAMPZSelected = 0; |
HIGHZSelected = 0; |
548,7 → 557,7
`SAMPLE_PRELOAD: SAMPLE_PRELOADSelected = 1; // Sample preload |
`IDCODE: IDCODESelected = 1; // ID Code |
`CHAIN_SELECT: CHAIN_SELECTSelected = 1; // Chain select |
`INTEST: INTESTSelected = 1; // Internal test |
`MBIST: MBISTSelected = 1; // Mbist test |
`CLAMP: CLAMPSelected = 1; // Clamp |
`CLAMPZ: CLAMPZSelected = 1; // ClampZ |
`HIGHZ: HIGHZSelected = 1; // High Z |
567,7 → 576,7
**********************************************************************************/ |
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// This multiplexer can be expanded with number of user registers |
always @ (LatchedJTAG_IR or TDOInstruction or TDOData_dbg or TDOBypassed or bs_chain_i or ShiftIR or Exit1IR) |
always @ (LatchedJTAG_IR or TDOInstruction or TDOData_dbg or TDOBypassed or bs_chain_i or mbist_so_i or ShiftIR or Exit1IR) |
begin |
if(ShiftIR | Exit1IR) |
tdo_pad_o <=#Tp TDOInstruction; |
579,6 → 588,7
`DEBUG: tdo_pad_o <=#Tp TDOData_dbg; // Debug |
`SAMPLE_PRELOAD: tdo_pad_o <=#Tp bs_chain_i; // Sampling/Preloading |
`EXTEST: tdo_pad_o <=#Tp bs_chain_i; // External test |
`INTEST: tdo_pad_o <=#Tp mbist_so_i; // External test |
default: tdo_pad_o <=#Tp TDOBypassed; // BYPASS instruction |
endcase |
end |
/trunk/rtl/verilog/dbg_defines.v
45,6 → 45,9
// CVS Revision History |
// |
// $Log: not supported by cvs2svn $ |
// Revision 1.12 2003/09/17 14:38:57 simons |
// WB_CNTL register added, some syncronization fixes. |
// |
// Revision 1.11 2003/08/28 13:55:21 simons |
// Three more chains added for cpu debug access. |
// |
97,10 → 100,10
//`define TRACE_ENABLED // Uncomment this define to activate the trace |
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// Define number of cpus supported by the dbg interface |
`define RISC_NUM 8 |
`define RISC_NUM 2 |
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// Define IDCODE Value |
`define IDCODE_VALUE 32'hdeadbeef |
`define IDCODE_VALUE 32'h14951185 |
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// Define master clock (RISC clock) |
//`define RISC_CLOCK 50 // Half period = 50 ns => MCLK = 10 Mhz |
129,15 → 132,6
`define OPSELECTIONCOUNTER 8 //2^3 |
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// OpSelect (dbg_op_i) signal meaning |
//`define DEBUG_READ_PC 0 |
//`define DEBUG_READ_LSEA 1 |
//`define DEBUG_READ_LDATA 2 |
//`define DEBUG_READ_SDATA 3 |
//`define DEBUG_READ_SPR 4 |
//`define DEBUG_WRITE_SPR 5 |
//`define DEBUG_READ_INSTR 6 |
//`define Reserved 7 |
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`define DEBUG_READ_0 0 |
`define DEBUG_WRITE_0 1 |
`define DEBUG_READ_1 2 |
157,6 → 151,7
`define CLAMPZ 4'b0110 |
`define HIGHZ 4'b0111 |
`define DEBUG 4'b1000 |
`define MBIST 4'b1001 |
`define BYPASS 4'b1111 |
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// Chains |